25 |
|
|
26 |
|
|
27 |
|
// Addressing modes |
28 |
< |
enum { |
28 |
> |
enum AddrMode { |
29 |
|
A_IMPL, |
30 |
|
A_ACCU, // A |
31 |
|
A_IMM, // #zz |
42 |
|
}; |
43 |
|
|
44 |
|
// Mnemonics |
45 |
< |
enum { |
45 |
> |
enum Mnemonic { |
46 |
|
M_ADC, M_AND, M_ASL, M_BCC, M_BCS, M_BEQ, M_BIT, M_BMI, M_BNE, M_BPL, |
47 |
|
M_BRK, M_BVC, M_BVS, M_CLC, M_CLD, M_CLI, M_CLV, M_CMP, M_CPX, M_CPY, |
48 |
|
M_DEC, M_DEX, M_DEY, M_EOR, M_INC, M_INX, M_INY, M_JMP, M_JSR, M_LDA, |
60 |
|
}; |
61 |
|
|
62 |
|
// Mnemonic for each opcode |
63 |
< |
static const char mnemonic[256] = { |
63 |
> |
static const Mnemonic mnemonic[256] = { |
64 |
|
M_BRK , M_ORA , M_IJAM, M_ISLO, M_INOP, M_ORA, M_ASL , M_ISLO, // 00 |
65 |
|
M_PHP , M_ORA , M_ASL , M_IANC, M_INOP, M_ORA, M_ASL , M_ISLO, |
66 |
|
M_BPL , M_ORA , M_IJAM, M_ISLO, M_INOP, M_ORA, M_ASL , M_ISLO, // 10 |
96 |
|
}; |
97 |
|
|
98 |
|
// Addressing mode for each opcode |
99 |
< |
static const char adr_mode[256] = { |
99 |
> |
static const AddrMode adr_mode[256] = { |
100 |
|
A_IMPL, A_INDX, A_IMPL, A_INDX, A_ZERO , A_ZERO , A_ZERO , A_ZERO, // 00 |
101 |
|
A_IMPL, A_IMM , A_ACCU, A_IMM , A_ABS , A_ABS , A_ABS , A_ABS, |
102 |
|
A_REL , A_INDY, A_IMPL, A_INDY, A_ZEROX, A_ZEROX, A_ZEROX, A_ZEROX, // 10 |
137 |
|
static const char mnem_3[] = "cdlcsqtielkcscdivpxycxyrcxypraxyrpaapaplrisccdiaxyxyxasa?cerrpbmpsxaaaxcxasxyoe"; |
138 |
|
|
139 |
|
// Instruction length for each addressing mode |
140 |
< |
static const char adr_length[] = {1, 1, 2, 2, 2, 2, 2, 3, 3, 3, 3, 2, 2}; |
140 |
> |
static const int adr_length[] = {1, 1, 2, 2, 2, 2, 2, 3, 3, 3, 3, 2, 2}; |
141 |
|
|
142 |
|
|
143 |
|
/* |
146 |
|
|
147 |
|
int disass_6502(FILE *f, uint32 adr, uint8 op, uint8 lo, uint8 hi) |
148 |
|
{ |
149 |
< |
char mode = adr_mode[op], mnem = mnemonic[op]; |
149 |
> |
AddrMode mode = adr_mode[op]; |
150 |
> |
Mnemonic mnem = mnemonic[op]; |
151 |
|
|
152 |
|
// Display instruction bytes in hex |
153 |
|
switch (adr_length[mode]) { |