--- SheepShaver/src/rom_patches.cpp	2004/05/31 09:04:42	1.29
+++ SheepShaver/src/rom_patches.cpp	2004/06/29 20:25:54	1.31
@@ -847,7 +847,8 @@ static bool patch_nanokernel_boot(void)
 			lp[7] = htonl(0x00040004);	// Inst cache assoc/Data cache assoc
 			lp[8] = htonl(0x00400002);	// TLB total size/TLB assoc
 			break;
-		case 8:		// 750
+		case 8:		// 750, 750FX
+		case 0x7000:
 			lp[0] = htonl(0x1000);		// Page size
 			lp[1] = htonl(0x8000);		// Data cache size
 			lp[2] = htonl(0x8000);		// Inst cache size
@@ -871,8 +872,11 @@ static bool patch_nanokernel_boot(void)
 			lp[8] = htonl(0x00800002);	// TLB total size/TLB assoc
 			break;
 //		case 11:	// X704?
-		case 12:	// 7400, 7410
+		case 12:	// 7400, 7410, 7450, 7455, 7457
 		case 0x800c:
+		case 0x8000:
+		case 0x8001:
+		case 0x8002:
 			lp[0] = htonl(0x1000);		// Page size
 			lp[1] = htonl(0x8000);		// Data cache size
 			lp[2] = htonl(0x8000);		// Inst cache size
@@ -1122,13 +1126,9 @@ static bool patch_68k_emul(void)
 	// Extra routine for 68k emulator start
 	lp = (uint32 *)(ROM_BASE + 0x36f900);
 	*lp++ = htonl(0x7c2903a6);					// mtctr	r1
-#if EMULATED_PPC
-	*lp++ = htonl(NativeOpcode(NATIVE_DISABLE_INTERRUPT));
-#else
 	*lp++ = htonl(0x80200000 + XLM_IRQ_NEST);	// lwz		r1,XLM_IRQ_NEST
 	*lp++ = htonl(0x38210001);					// addi		r1,r1,1
 	*lp++ = htonl(0x90200000 + XLM_IRQ_NEST);	// stw		r1,XLM_IRQ_NEST
-#endif
 	*lp++ = htonl(0x80200000 + XLM_KERNEL_DATA);// lwz		r1,XLM_KERNEL_DATA
 	*lp++ = htonl(0x90c10018);					// stw		r6,0x18(r1)
 	*lp++ = htonl(0x7cc902a6);					// mfctr	r6
@@ -1156,13 +1156,9 @@ static bool patch_68k_emul(void)
 	// Extra routine for Mixed Mode
 	lp = (uint32 *)(ROM_BASE + 0x36fa00);
 	*lp++ = htonl(0x7c2903a6);					// mtctr	r1
-#if EMULATED_PPC
-	*lp++ = htonl(NativeOpcode(NATIVE_DISABLE_INTERRUPT));
-#else
 	*lp++ = htonl(0x80200000 + XLM_IRQ_NEST);	// lwz		r1,XLM_IRQ_NEST
 	*lp++ = htonl(0x38210001);					// addi		r1,r1,1
 	*lp++ = htonl(0x90200000 + XLM_IRQ_NEST);	// stw		r1,XLM_IRQ_NEST
-#endif
 	*lp++ = htonl(0x80200000 + XLM_KERNEL_DATA);// lwz		r1,XLM_KERNEL_DATA
 	*lp++ = htonl(0x90c10018);					// stw		r6,0x18(r1)
 	*lp++ = htonl(0x7cc902a6);					// mfctr	r6
@@ -1190,13 +1186,9 @@ static bool patch_68k_emul(void)
 	// Extra routine for Reset/FC1E opcode
 	lp = (uint32 *)(ROM_BASE + 0x36fb00);
 	*lp++ = htonl(0x7c2903a6);					// mtctr	r1
-#if EMULATED_PPC
-	*lp++ = htonl(NativeOpcode(NATIVE_DISABLE_INTERRUPT));
-#else
 	*lp++ = htonl(0x80200000 + XLM_IRQ_NEST);	// lwz		r1,XLM_IRQ_NEST
 	*lp++ = htonl(0x38210001);					// addi		r1,r1,1
 	*lp++ = htonl(0x90200000 + XLM_IRQ_NEST);	// stw		r1,XLM_IRQ_NEST
-#endif
 	*lp++ = htonl(0x80200000 + XLM_KERNEL_DATA);// lwz		r1,XLM_KERNEL_DATA
 	*lp++ = htonl(0x90c10018);					// stw		r6,0x18(r1)
 	*lp++ = htonl(0x7cc902a6);					// mfctr	r6
@@ -1224,13 +1216,9 @@ static bool patch_68k_emul(void)
 	// Extra routine for FE0A opcode (QuickDraw 3D needs this)
 	lp = (uint32 *)(ROM_BASE + 0x36fc00);
 	*lp++ = htonl(0x7c2903a6);					// mtctr	r1
-#if EMULATED_PPC
-	*lp++ = htonl(NativeOpcode(NATIVE_DISABLE_INTERRUPT));
-#else
 	*lp++ = htonl(0x80200000 + XLM_IRQ_NEST);	// lwz		r1,XLM_IRQ_NEST
 	*lp++ = htonl(0x38210001);					// addi		r1,r1,1
 	*lp++ = htonl(0x90200000 + XLM_IRQ_NEST);	// stw		r1,XLM_IRQ_NEST
-#endif
 	*lp++ = htonl(0x80200000 + XLM_KERNEL_DATA);// lwz		r1,XLM_KERNEL_DATA
 	*lp++ = htonl(0x90c10018);					// stw		r6,0x18(r1)
 	*lp++ = htonl(0x7cc902a6);					// mfctr	r6
@@ -1397,15 +1385,10 @@ static bool patch_nanokernel(void)
 	uint32 npc = (uint32)(lp + 1) - ROM_BASE;
 
 	lp = (uint32 *)(ROM_BASE + 0x318000);
-#if EMULATED_PPC
-	*lp++ = htonl(NativeOpcode(NATIVE_ENABLE_INTERRUPT));
-	*lp = htonl(0x48000000 + ((npc - 0x318004) & 0x03fffffc));	// b		ROM_BASE+0x312c2c
-#else
 	*lp++ = htonl(0x81400000 + XLM_IRQ_NEST);	// lwz	r10,XLM_IRQ_NEST
 	*lp++ = htonl(0x394affff);					// subi	r10,r10,1
 	*lp++ = htonl(0x91400000 + XLM_IRQ_NEST);	// stw	r10,XLM_IRQ_NEST
 	*lp = htonl(0x48000000 + ((npc - 0x31800c) & 0x03fffffc));	// b		ROM_BASE+0x312c2c
-#endif
 
 /*
 	// Disable FE0A/FE06 opcodes