124 |
|
D(bug("Offset Type Name\n")); |
125 |
|
while (parcel_offset != 0) { |
126 |
|
const uint32 *parcel_data = (uint32 *)(src + parcel_offset); |
127 |
< |
parcel_offset = ntohl(parcel_data[0]); |
127 |
> |
uint32 next_offset = ntohl(parcel_data[0]); |
128 |
|
uint32 parcel_type = ntohl(parcel_data[1]); |
129 |
|
D(bug("%08x %c%c%c%c %s\n", parcel_offset, |
130 |
|
(parcel_type >> 24) & 0xff, (parcel_type >> 16) & 0xff, |
134 |
|
uint32 lzss_size = ((uint32)src + parcel_offset) - ((uint32)parcel_data + lzss_offset); |
135 |
|
decode_lzss((uint8 *)parcel_data + lzss_offset, dest, lzss_size); |
136 |
|
} |
137 |
+ |
parcel_offset = next_offset; |
138 |
|
} |
139 |
|
} |
140 |
|
|
447 |
|
0x4e, 0x75 // rts |
448 |
|
}; |
449 |
|
|
450 |
< |
#ifdef __linux__ |
450 |
> |
#if EMULATED_PPC |
451 |
> |
#define SERIAL_TRAMPOLINES 1 |
452 |
> |
static uint32 serial_nothing_tvect[2] = {tswap32(POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_NOTHING)), 0}; |
453 |
> |
static uint32 serial_open_tvect[2] = {tswap32(POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_OPEN)), 0}; |
454 |
> |
static uint32 serial_prime_in_tvect[2] = {tswap32(POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_PRIME_IN)), 0}; |
455 |
> |
static uint32 serial_prime_out_tvect[2] = {tswap32(POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_PRIME_OUT)), 0}; |
456 |
> |
static uint32 serial_control_tvect[2] = {tswap32(POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_CONTROL)), 0}; |
457 |
> |
static uint32 serial_status_tvect[2] = {tswap32(POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_STATUS)), 0}; |
458 |
> |
static uint32 serial_close_tvect[2] = {tswap32(POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_CLOSE)), 0}; |
459 |
> |
#elif defined(__linux__) |
460 |
> |
#define SERIAL_TRAMPOLINES 1 |
461 |
|
static uint32 serial_nothing_tvect[2] = {(uint32)SerialNothing, 0}; |
462 |
|
static uint32 serial_open_tvect[2] = {(uint32)SerialOpen, 0}; |
463 |
|
static uint32 serial_prime_in_tvect[2] = {(uint32)SerialPrimeIn, 0}; |
474 |
|
0x00000000, 0x00000000, |
475 |
|
0xaafe0700, 0x00000000, |
476 |
|
0x00000000, 0x00179822, |
477 |
< |
#ifdef __linux__ |
477 |
> |
#ifdef SERIAL_TRAMPOLINES |
478 |
|
0x00010004, (uint32)serial_nothing_tvect, |
479 |
|
#else |
480 |
|
0x00010004, (uint32)SerialNothing, |
482 |
|
0x00000000, 0x00000000, |
483 |
|
0xaafe0700, 0x00000000, |
484 |
|
0x00000000, 0x00179822, |
485 |
< |
#ifdef __linux__ |
485 |
> |
#ifdef SERIAL_TRAMPOLINES |
486 |
|
0x00010004, (uint32)serial_prime_in_tvect, |
487 |
|
#else |
488 |
|
0x00010004, (uint32)SerialPrimeIn, |
490 |
|
0x00000000, 0x00000000, |
491 |
|
0xaafe0700, 0x00000000, |
492 |
|
0x00000000, 0x00179822, |
493 |
< |
#ifdef __linux__ |
493 |
> |
#ifdef SERIAL_TRAMPOLINES |
494 |
|
0x00010004, (uint32)serial_control_tvect, |
495 |
|
#else |
496 |
|
0x00010004, (uint32)SerialControl, |
498 |
|
0x00000000, 0x00000000, |
499 |
|
0xaafe0700, 0x00000000, |
500 |
|
0x00000000, 0x00179822, |
501 |
< |
#ifdef __linux__ |
501 |
> |
#ifdef SERIAL_TRAMPOLINES |
502 |
|
0x00010004, (uint32)serial_status_tvect, |
503 |
|
#else |
504 |
|
0x00010004, (uint32)SerialStatus, |
506 |
|
0x00000000, 0x00000000, |
507 |
|
0xaafe0700, 0x00000000, |
508 |
|
0x00000000, 0x00179822, |
509 |
< |
#ifdef __linux__ |
509 |
> |
#ifdef SERIAL_TRAMPOLINES |
510 |
|
0x00010004, (uint32)serial_nothing_tvect, |
511 |
|
#else |
512 |
|
0x00010004, (uint32)SerialNothing, |
521 |
|
0x00000000, 0x00000000, |
522 |
|
0xaafe0700, 0x00000000, |
523 |
|
0x00000000, 0x00179822, |
524 |
< |
#ifdef __linux__ |
524 |
> |
#ifdef SERIAL_TRAMPOLINES |
525 |
|
0x00010004, (uint32)serial_open_tvect, |
526 |
|
#else |
527 |
|
0x00010004, (uint32)SerialOpen, |
529 |
|
0x00000000, 0x00000000, |
530 |
|
0xaafe0700, 0x00000000, |
531 |
|
0x00000000, 0x00179822, |
532 |
< |
#ifdef __linux__ |
532 |
> |
#ifdef SERIAL_TRAMPOLINES |
533 |
|
0x00010004, (uint32)serial_prime_out_tvect, |
534 |
|
#else |
535 |
|
0x00010004, (uint32)SerialPrimeOut, |
537 |
|
0x00000000, 0x00000000, |
538 |
|
0xaafe0700, 0x00000000, |
539 |
|
0x00000000, 0x00179822, |
540 |
< |
#ifdef __linux__ |
540 |
> |
#ifdef SERIAL_TRAMPOLINES |
541 |
|
0x00010004, (uint32)serial_control_tvect, |
542 |
|
#else |
543 |
|
0x00010004, (uint32)SerialControl, |
545 |
|
0x00000000, 0x00000000, |
546 |
|
0xaafe0700, 0x00000000, |
547 |
|
0x00000000, 0x00179822, |
548 |
< |
#ifdef __linux__ |
548 |
> |
#ifdef SERIAL_TRAMPOLINES |
549 |
|
0x00010004, (uint32)serial_status_tvect, |
550 |
|
#else |
551 |
|
0x00010004, (uint32)SerialStatus, |
553 |
|
0x00000000, 0x00000000, |
554 |
|
0xaafe0700, 0x00000000, |
555 |
|
0x00000000, 0x00179822, |
556 |
< |
#ifdef __linux__ |
556 |
> |
#ifdef SERIAL_TRAMPOLINES |
557 |
|
0x00010004, (uint32)serial_close_tvect, |
558 |
|
#else |
559 |
|
0x00010004, (uint32)SerialClose, |
568 |
|
0x00000000, 0x00000000, |
569 |
|
0xaafe0700, 0x00000000, |
570 |
|
0x00000000, 0x00179822, |
571 |
< |
#ifdef __linux__ |
571 |
> |
#ifdef SERIAL_TRAMPOLINES |
572 |
|
0x00010004, (uint32)serial_nothing_tvect, |
573 |
|
#else |
574 |
|
0x00010004, (uint32)SerialNothing, |
576 |
|
0x00000000, 0x00000000, |
577 |
|
0xaafe0700, 0x00000000, |
578 |
|
0x00000000, 0x00179822, |
579 |
< |
#ifdef __linux__ |
579 |
> |
#ifdef SERIAL_TRAMPOLINES |
580 |
|
0x00010004, (uint32)serial_prime_in_tvect, |
581 |
|
#else |
582 |
|
0x00010004, (uint32)SerialPrimeIn, |
584 |
|
0x00000000, 0x00000000, |
585 |
|
0xaafe0700, 0x00000000, |
586 |
|
0x00000000, 0x00179822, |
587 |
< |
#ifdef __linux__ |
587 |
> |
#ifdef SERIAL_TRAMPOLINES |
588 |
|
0x00010004, (uint32)serial_control_tvect, |
589 |
|
#else |
590 |
|
0x00010004, (uint32)SerialControl, |
592 |
|
0x00000000, 0x00000000, |
593 |
|
0xaafe0700, 0x00000000, |
594 |
|
0x00000000, 0x00179822, |
595 |
< |
#ifdef __linux__ |
595 |
> |
#ifdef SERIAL_TRAMPOLINES |
596 |
|
0x00010004, (uint32)serial_status_tvect, |
597 |
|
#else |
598 |
|
0x00010004, (uint32)SerialStatus, |
600 |
|
0x00000000, 0x00000000, |
601 |
|
0xaafe0700, 0x00000000, |
602 |
|
0x00000000, 0x00179822, |
603 |
< |
#ifdef __linux__ |
603 |
> |
#ifdef SERIAL_TRAMPOLINES |
604 |
|
0x00010004, (uint32)serial_nothing_tvect, |
605 |
|
#else |
606 |
|
0x00010004, (uint32)SerialNothing, |
615 |
|
0x00000000, 0x00000000, |
616 |
|
0xaafe0700, 0x00000000, |
617 |
|
0x00000000, 0x00179822, |
618 |
< |
#ifdef __linux__ |
618 |
> |
#ifdef SERIAL_TRAMPOLINES |
619 |
|
0x00010004, (uint32)serial_open_tvect, |
620 |
|
#else |
621 |
|
0x00010004, (uint32)SerialOpen, |
623 |
|
0x00000000, 0x00000000, |
624 |
|
0xaafe0700, 0x00000000, |
625 |
|
0x00000000, 0x00179822, |
626 |
< |
#ifdef __linux__ |
626 |
> |
#ifdef SERIAL_TRAMPOLINES |
627 |
|
0x00010004, (uint32)serial_prime_out_tvect, |
628 |
|
#else |
629 |
|
0x00010004, (uint32)SerialPrimeOut, |
631 |
|
0x00000000, 0x00000000, |
632 |
|
0xaafe0700, 0x00000000, |
633 |
|
0x00000000, 0x00179822, |
634 |
< |
#ifdef __linux__ |
634 |
> |
#ifdef SERIAL_TRAMPOLINES |
635 |
|
0x00010004, (uint32)serial_control_tvect, |
636 |
|
#else |
637 |
|
0x00010004, (uint32)SerialControl, |
639 |
|
0x00000000, 0x00000000, |
640 |
|
0xaafe0700, 0x00000000, |
641 |
|
0x00000000, 0x00179822, |
642 |
< |
#ifdef __linux__ |
642 |
> |
#ifdef SERIAL_TRAMPOLINES |
643 |
|
0x00010004, (uint32)serial_status_tvect, |
644 |
|
#else |
645 |
|
0x00010004, (uint32)SerialStatus, |
647 |
|
0x00000000, 0x00000000, |
648 |
|
0xaafe0700, 0x00000000, |
649 |
|
0x00000000, 0x00179822, |
650 |
< |
#ifdef __linux__ |
650 |
> |
#ifdef SERIAL_TRAMPOLINES |
651 |
|
0x00010004, (uint32)serial_close_tvect, |
652 |
|
#else |
653 |
|
0x00010004, (uint32)SerialClose, |
679 |
|
|
680 |
|
|
681 |
|
/* |
682 |
+ |
* Copy PowerPC code to ROM image and reverse bytes if necessary |
683 |
+ |
*/ |
684 |
+ |
|
685 |
+ |
static inline void memcpy_powerpc_code(void *dst, const void *src, size_t len) |
686 |
+ |
{ |
687 |
+ |
#ifdef WORDS_BIGENDIAN |
688 |
+ |
(void)memcpy(dst, src, len); |
689 |
+ |
#else |
690 |
+ |
uint32 *d = (uint32 *)dst; |
691 |
+ |
uint32 *s = (uint32 *)src; |
692 |
+ |
for (int i = 0; i < len/4; i++) |
693 |
+ |
d[i] = htonl(s[i]); |
694 |
+ |
#endif |
695 |
+ |
} |
696 |
+ |
|
697 |
+ |
|
698 |
+ |
/* |
699 |
|
* Install ROM patches (RAMBase and KernelDataAddr must be set) |
700 |
|
*/ |
701 |
|
|
718 |
|
ROMType = ROMTYPE_ZANZIBAR; |
719 |
|
else if (!memcmp((void *)(ROM_BASE + 0x30d064), "Boot Gazelle", 12)) |
720 |
|
ROMType = ROMTYPE_GAZELLE; |
721 |
+ |
else if (!memcmp((void *)(ROM_BASE + 0x30d064), "Boot Gossamer", 13)) |
722 |
+ |
ROMType = ROMTYPE_GOSSAMER; |
723 |
|
else if (!memcmp((void *)(ROM_BASE + 0x30d064), "NewWorld", 8)) |
724 |
|
ROMType = ROMTYPE_NEWWORLD; |
725 |
|
else |
769 |
|
lp[0xfd8 >> 2] = htonl(ROM_BASE + 0x2a); // 68k reset vector |
770 |
|
|
771 |
|
// Skip SR/BAT/SDR init |
772 |
< |
if (ROMType == ROMTYPE_GAZELLE || ROMType == ROMTYPE_NEWWORLD) { |
772 |
> |
if (ROMType == ROMTYPE_GAZELLE || ROMType == ROMTYPE_GOSSAMER || ROMType == ROMTYPE_NEWWORLD) { |
773 |
|
lp = (uint32 *)(ROM_BASE + 0x310000); |
774 |
|
*lp++ = htonl(POWERPC_NOP); |
775 |
|
*lp = htonl(0x38000000); |
776 |
|
} |
777 |
< |
static const uint32 sr_init_loc[] = {0x3101b0, 0x3101b0, 0x3101b0, 0x3101ec, 0x310200}; |
777 |
> |
static const uint32 sr_init_loc[] = {0x3101b0, 0x3101b0, 0x3101b0, 0x3101ec, 0x3101fc, 0x310200}; |
778 |
|
lp = (uint32 *)(ROM_BASE + 0x310008); |
779 |
|
*lp = htonl(0x48000000 | (sr_init_loc[ROMType] - 8) & 0xffff); // b ROM_BASE+0x3101b0 |
780 |
|
lp = (uint32 *)(ROM_BASE + sr_init_loc[ROMType]); |
784 |
|
*lp = htonl(0x3de00010); // lis r15,0x0010 (size of kernel memory) |
785 |
|
|
786 |
|
// Don't read PVR |
787 |
< |
static const uint32 pvr_loc[] = {0x3103b0, 0x3103b4, 0x3103b4, 0x310400, 0x310438}; |
787 |
> |
static const uint32 pvr_loc[] = {0x3103b0, 0x3103b4, 0x3103b4, 0x310400, 0x310430, 0x310438}; |
788 |
|
lp = (uint32 *)(ROM_BASE + pvr_loc[ROMType]); |
789 |
|
*lp = htonl(0x81800000 + XLM_PVR); // lwz r12,(theoretical PVR) |
790 |
|
|
932 |
|
*lp = htonl(POWERPC_NOP); |
933 |
|
|
934 |
|
// Don't read PVR |
935 |
< |
static const uint32 pvr_ofs[] = {0x138, 0x138, 0x138, 0x140, 0x148}; |
935 |
> |
static const uint32 pvr_ofs[] = {0x138, 0x138, 0x138, 0x140, 0x148, 0x148}; |
936 |
|
lp = (uint32 *)(ROM_BASE + loc + pvr_ofs[ROMType]); |
937 |
|
*lp = htonl(0x82e00000 + XLM_PVR); // lwz r23,(theoretical PVR) |
938 |
|
lp = (uint32 *)(ROM_BASE + loc + 0x170); |
939 |
< |
if (ntohl(*lp) == 0x7eff42a6) // NewWorld ROM |
939 |
> |
if (ntohl(*lp) == 0x7eff42a6) // NewWorld or Gossamer ROM |
940 |
|
*lp = htonl(0x82e00000 + XLM_PVR); // lwz r23,(theoretical PVR) |
941 |
|
lp = (uint32 *)(ROM_BASE + 0x313134); |
942 |
|
if (ntohl(*lp) == 0x7e5f42a6) |
944 |
|
lp = (uint32 *)(ROM_BASE + 0x3131f4); |
945 |
|
if (ntohl(*lp) == 0x7e5f42a6) // NewWorld ROM |
946 |
|
*lp = htonl(0x82400000 + XLM_PVR); // lwz r18,(theoretical PVR) |
947 |
+ |
lp = (uint32 *)(ROM_BASE + 0x314600); |
948 |
+ |
if (ntohl(*lp) == 0x7d3f42a6) |
949 |
+ |
*lp = htonl(0x81200000 + XLM_PVR); // lzw r9,(theoritical PVR) |
950 |
|
|
951 |
|
// Don't read SDR1 |
952 |
< |
static const uint32 sdr1_ofs[] = {0x174, 0x174, 0x174, 0x17c, 0x19c}; |
952 |
> |
static const uint32 sdr1_ofs[] = {0x174, 0x174, 0x174, 0x17c, 0x19c, 0x19c}; |
953 |
|
lp = (uint32 *)(ROM_BASE + loc + sdr1_ofs[ROMType]); |
954 |
|
*lp++ = htonl(0x3d00dead); // lis r8,0xdead (pointer to page table) |
955 |
|
*lp++ = htonl(0x3ec0001f); // lis r22,0x001f (size of page table) |
956 |
|
*lp = htonl(POWERPC_NOP); |
957 |
|
|
958 |
|
// Don't clear page table |
959 |
< |
static const uint32 pgtb_ofs[] = {0x198, 0x198, 0x198, 0x1a0, 0x1c4}; |
959 |
> |
static const uint32 pgtb_ofs[] = {0x198, 0x198, 0x198, 0x1a0, 0x1c0, 0x1c4}; |
960 |
|
lp = (uint32 *)(ROM_BASE + loc + pgtb_ofs[ROMType]); |
961 |
|
*lp = htonl(POWERPC_NOP); |
962 |
|
|
963 |
|
// Don't invalidate TLB |
964 |
< |
static const uint32 tlb_ofs[] = {0x1a0, 0x1a0, 0x1a0, 0x1a8, 0x1cc}; |
964 |
> |
static const uint32 tlb_ofs[] = {0x1a0, 0x1a0, 0x1a0, 0x1a8, 0x1c8, 0x1cc}; |
965 |
|
lp = (uint32 *)(ROM_BASE + loc + tlb_ofs[ROMType]); |
966 |
|
*lp = htonl(POWERPC_NOP); |
967 |
|
|
968 |
|
// Don't create RAM descriptor table |
969 |
< |
static const uint32 desc_ofs[] = {0x350, 0x350, 0x350, 0x358, 0x37c}; |
969 |
> |
static const uint32 desc_ofs[] = {0x350, 0x350, 0x350, 0x358, 0x378, 0x37c}; |
970 |
|
lp = (uint32 *)(ROM_BASE + loc + desc_ofs[ROMType]); |
971 |
|
*lp = htonl(POWERPC_NOP); |
972 |
|
|
973 |
|
// Don't load SRs and BATs |
974 |
< |
static const uint32 sr_ofs[] = {0x3d8, 0x3d8, 0x3d8, 0x3e0, 0x404}; |
974 |
> |
static const uint32 sr_ofs[] = {0x3d8, 0x3d8, 0x3d8, 0x3e0, 0x400, 0x404}; |
975 |
|
lp = (uint32 *)(ROM_BASE + loc + sr_ofs[ROMType]); |
976 |
|
*lp = htonl(POWERPC_NOP); |
977 |
|
|
978 |
|
// Don't mess with SRs |
979 |
< |
static const uint32 sr2_ofs[] = {0x312118, 0x312118, 0x312118, 0x312118, 0x3121b4}; |
979 |
> |
static const uint32 sr2_ofs[] = {0x312118, 0x312118, 0x312118, 0x312118, 0x312118, 0x3121b4}; |
980 |
|
lp = (uint32 *)(ROM_BASE + sr2_ofs[ROMType]); |
981 |
|
*lp = htonl(POWERPC_BLR); |
982 |
|
|
983 |
|
// Don't check performance monitor |
984 |
< |
static const uint32 pm_ofs[] = {0x313148, 0x313148, 0x313148, 0x313148, 0x313218}; |
984 |
> |
static const uint32 pm_ofs[] = {0x313148, 0x313148, 0x313148, 0x313148, 0x313158, 0x313218}; |
985 |
|
lp = (uint32 *)(ROM_BASE + pm_ofs[ROMType]); |
986 |
|
while (ntohl(*lp) != 0x7e58eba6) lp++; |
987 |
|
*lp++ = htonl(POWERPC_NOP); |
1017 |
|
*lp++ = htonl(POWERPC_NOP); |
1018 |
|
|
1019 |
|
// Jump to 68k emulator |
1020 |
< |
static const uint32 jump68k_ofs[] = {0x40c, 0x40c, 0x40c, 0x414, 0x438}; |
1020 |
> |
static const uint32 jump68k_ofs[] = {0x40c, 0x40c, 0x40c, 0x414, 0x434, 0x438}; |
1021 |
|
lp = (uint32 *)(ROM_BASE + loc + jump68k_ofs[ROMType]); |
1022 |
|
*lp++ = htonl(0x80610634); // lwz r3,0x0634(r1) (pointer to Emulator Data) |
1023 |
|
*lp++ = htonl(0x8081119c); // lwz r4,0x119c(r1) (pointer to opcode table) |
1038 |
|
uint32 base; |
1039 |
|
|
1040 |
|
// Overwrite twi instructions |
1041 |
< |
static const uint32 twi_loc[] = {0x36e680, 0x36e6c0, 0x36e6c0, 0x36e6c0, 0x36e740}; |
1041 |
> |
static const uint32 twi_loc[] = {0x36e680, 0x36e6c0, 0x36e6c0, 0x36e6c0, 0x36e740, 0x36e740}; |
1042 |
|
base = twi_loc[ROMType]; |
1043 |
|
lp = (uint32 *)(ROM_BASE + base); |
1044 |
|
*lp++ = htonl(0x48000000 + 0x36f900 - base); // b 0x36f900 (Emulator start) |
1059 |
|
*lp = htonl(POWERPC_ILLEGAL); |
1060 |
|
|
1061 |
|
#if EMULATED_PPC |
1062 |
< |
// Install EMUL_RETURN, EXEC_RETURN and EMUL_OP opcodes |
1062 |
> |
// Install EMUL_RETURN, EXEC_RETURN, EXEC_NATIVE and EMUL_OP opcodes |
1063 |
|
lp = (uint32 *)(ROM_BASE + 0x380000 + (M68K_EMUL_RETURN << 3)); |
1064 |
|
*lp++ = htonl(POWERPC_EMUL_OP); |
1065 |
|
*lp++ = htonl(0x4bf66e80); // b 0x366084 |
1066 |
|
*lp++ = htonl(POWERPC_EMUL_OP | 1); |
1067 |
|
*lp++ = htonl(0x4bf66e78); // b 0x366084 |
1068 |
+ |
*lp++ = htonl(POWERPC_EMUL_OP | 2); |
1069 |
+ |
*lp++ = htonl(0x4bf66e70); // b 0x366084 |
1070 |
|
for (int i=0; i<OP_MAX; i++) { |
1071 |
< |
*lp++ = htonl(POWERPC_EMUL_OP | (i + 2)); |
1072 |
< |
*lp++ = htonl(0x4bf66e70 - i*8); // b 0x366084 |
1071 |
> |
*lp++ = htonl(POWERPC_EMUL_OP | (i + 3)); |
1072 |
> |
*lp++ = htonl(0x4bf66e68 - i*8); // b 0x366084 |
1073 |
|
} |
1074 |
|
#else |
1075 |
|
// Install EMUL_RETURN, EXEC_RETURN and EMUL_OP opcodes |
1078 |
|
*lp++ = htonl(0x4bf705fc); // b 0x36f800 |
1079 |
|
*lp++ = htonl(0x80000000 + XLM_EXEC_RETURN_PROC); // lwz r0,XLM_EXEC_RETURN_PROC |
1080 |
|
*lp++ = htonl(0x4bf705f4); // b 0x36f800 |
1081 |
+ |
*lp++ = htonl(0x00dead00); // Let SheepShaver crash, since |
1082 |
+ |
*lp++ = htonl(0x00beef00); // no native opcode is available |
1083 |
|
for (int i=0; i<OP_MAX; i++) { |
1084 |
|
*lp++ = htonl(0x38a00000 + i); // li r5,OP_* |
1085 |
< |
*lp++ = htonl(0x4bf705f4 - i*8); // b 0x36f808 |
1085 |
> |
*lp++ = htonl(0x4bf705ec - i*8); // b 0x36f808 |
1086 |
|
} |
1087 |
|
|
1088 |
|
// Extra routines for EMUL_RETURN/EXEC_RETURN/EMUL_OP |
1098 |
|
// Extra routine for 68k emulator start |
1099 |
|
lp = (uint32 *)(ROM_BASE + 0x36f900); |
1100 |
|
*lp++ = htonl(0x7c2903a6); // mtctr r1 |
1101 |
+ |
#if EMULATED_PPC |
1102 |
+ |
*lp++ = POWERPC_NATIVE_OP(NATIVE_DISABLE_INTERRUPT); |
1103 |
+ |
#else |
1104 |
|
*lp++ = htonl(0x80200000 + XLM_IRQ_NEST); // lwz r1,XLM_IRQ_NEST |
1105 |
|
*lp++ = htonl(0x38210001); // addi r1,r1,1 |
1106 |
|
*lp++ = htonl(0x90200000 + XLM_IRQ_NEST); // stw r1,XLM_IRQ_NEST |
1107 |
+ |
#endif |
1108 |
|
*lp++ = htonl(0x80200000 + XLM_KERNEL_DATA);// lwz r1,XLM_KERNEL_DATA |
1109 |
|
*lp++ = htonl(0x90c10018); // stw r6,0x18(r1) |
1110 |
|
*lp++ = htonl(0x7cc902a6); // mfctr r6 |
1132 |
|
// Extra routine for Mixed Mode |
1133 |
|
lp = (uint32 *)(ROM_BASE + 0x36fa00); |
1134 |
|
*lp++ = htonl(0x7c2903a6); // mtctr r1 |
1135 |
+ |
#if EMULATED_PPC |
1136 |
+ |
*lp++ = POWERPC_NATIVE_OP(NATIVE_DISABLE_INTERRUPT); |
1137 |
+ |
#else |
1138 |
|
*lp++ = htonl(0x80200000 + XLM_IRQ_NEST); // lwz r1,XLM_IRQ_NEST |
1139 |
|
*lp++ = htonl(0x38210001); // addi r1,r1,1 |
1140 |
|
*lp++ = htonl(0x90200000 + XLM_IRQ_NEST); // stw r1,XLM_IRQ_NEST |
1141 |
+ |
#endif |
1142 |
|
*lp++ = htonl(0x80200000 + XLM_KERNEL_DATA);// lwz r1,XLM_KERNEL_DATA |
1143 |
|
*lp++ = htonl(0x90c10018); // stw r6,0x18(r1) |
1144 |
|
*lp++ = htonl(0x7cc902a6); // mfctr r6 |
1164 |
|
*lp = htonl(0x4e800020); // blr |
1165 |
|
|
1166 |
|
// Extra routine for Reset/FC1E opcode |
1167 |
< |
lp = (uint32 *)(ROM_BASE + 0x36fc00); |
1167 |
> |
lp = (uint32 *)(ROM_BASE + 0x36fb00); |
1168 |
|
*lp++ = htonl(0x7c2903a6); // mtctr r1 |
1169 |
+ |
#if EMULATED_PPC |
1170 |
+ |
*lp++ = POWERPC_NATIVE_OP(NATIVE_DISABLE_INTERRUPT); |
1171 |
+ |
#else |
1172 |
|
*lp++ = htonl(0x80200000 + XLM_IRQ_NEST); // lwz r1,XLM_IRQ_NEST |
1173 |
|
*lp++ = htonl(0x38210001); // addi r1,r1,1 |
1174 |
|
*lp++ = htonl(0x90200000 + XLM_IRQ_NEST); // stw r1,XLM_IRQ_NEST |
1175 |
+ |
#endif |
1176 |
|
*lp++ = htonl(0x80200000 + XLM_KERNEL_DATA);// lwz r1,XLM_KERNEL_DATA |
1177 |
|
*lp++ = htonl(0x90c10018); // stw r6,0x18(r1) |
1178 |
|
*lp++ = htonl(0x7cc902a6); // mfctr r6 |
1189 |
|
*lp++ = htonl(0x80e10660); // lwz r7,$0660(r1) |
1190 |
|
*lp++ = htonl(0x7d8802a6); // mflr r12 |
1191 |
|
*lp++ = htonl(0x50e74001); // rlwimi. r7,r7,8,$80000000 |
1192 |
< |
*lp++ = htonl(0x814105f4); // lwz r10,0x05f8(r1) |
1192 |
> |
*lp++ = htonl(0x814105f8); // lwz r10,0x05f8(r1) |
1193 |
|
*lp++ = htonl(0x7d4803a6); // mtlr r10 |
1194 |
|
*lp++ = htonl(0x7d8a6378); // mr r10,r12 |
1195 |
|
*lp++ = htonl(0x3d600002); // lis r11,0x0002 |
1200 |
|
// Extra routine for FE0A opcode (QuickDraw 3D needs this) |
1201 |
|
lp = (uint32 *)(ROM_BASE + 0x36fc00); |
1202 |
|
*lp++ = htonl(0x7c2903a6); // mtctr r1 |
1203 |
+ |
#if EMULATED_PPC |
1204 |
+ |
*lp++ = POWERPC_NATIVE_OP(NATIVE_DISABLE_INTERRUPT); |
1205 |
+ |
#else |
1206 |
|
*lp++ = htonl(0x80200000 + XLM_IRQ_NEST); // lwz r1,XLM_IRQ_NEST |
1207 |
|
*lp++ = htonl(0x38210001); // addi r1,r1,1 |
1208 |
|
*lp++ = htonl(0x90200000 + XLM_IRQ_NEST); // stw r1,XLM_IRQ_NEST |
1209 |
+ |
#endif |
1210 |
|
*lp++ = htonl(0x80200000 + XLM_KERNEL_DATA);// lwz r1,XLM_KERNEL_DATA |
1211 |
|
*lp++ = htonl(0x90c10018); // stw r6,0x18(r1) |
1212 |
|
*lp++ = htonl(0x7cc902a6); // mfctr r6 |
1223 |
|
*lp++ = htonl(0x80e10660); // lwz r7,$0660(r1) |
1224 |
|
*lp++ = htonl(0x7d8802a6); // mflr r12 |
1225 |
|
*lp++ = htonl(0x50e74001); // rlwimi. r7,r7,8,$80000000 |
1226 |
< |
*lp++ = htonl(0x814105f4); // lwz r10,0x05fc(r1) |
1226 |
> |
*lp++ = htonl(0x814105fc); // lwz r10,0x05fc(r1) |
1227 |
|
*lp++ = htonl(0x7d4803a6); // mtlr r10 |
1228 |
|
*lp++ = htonl(0x7d8a6378); // mr r10,r12 |
1229 |
|
*lp++ = htonl(0x3d600002); // lis r11,0x0002 |
1341 |
|
*lp = htonl(POWERPC_BCTR); |
1342 |
|
|
1343 |
|
lp = (uint32 *)(ROM_BASE + 0x318000); |
1344 |
+ |
#if EMULATED_PPC |
1345 |
+ |
*lp++ = POWERPC_NATIVE_OP(NATIVE_ENABLE_INTERRUPT); |
1346 |
+ |
*lp = htonl(0x48000000 + ((xlp - 0x8004) & 0x03fffffc)); // b ROM_BASE+0x312c2c |
1347 |
+ |
#else |
1348 |
|
*lp++ = htonl(0x81400000 + XLM_IRQ_NEST); // lwz r10,XLM_IRQ_NEST |
1349 |
|
*lp++ = htonl(0x394affff); // subi r10,r10,1 |
1350 |
|
*lp++ = htonl(0x91400000 + XLM_IRQ_NEST); // stw r10,XLM_IRQ_NEST |
1351 |
|
*lp = htonl(0x48000000 + ((xlp - 0x800c) & 0x03fffffc)); // b ROM_BASE+0x312c2c |
1352 |
+ |
#endif |
1353 |
+ |
|
1354 |
|
/* |
1355 |
|
// Disable FE0A/FE06 opcodes |
1356 |
|
lp = (uint32 *)(ROM_BASE + 0x3144ac); |
1396 |
|
// Patch UniversalInfo |
1397 |
|
if (ROMType == ROMTYPE_NEWWORLD) { |
1398 |
|
static const uint8 univ_info_dat[] = {0x3f, 0xff, 0x04, 0x00}; |
1399 |
< |
if ((base = find_rom_data(0x14000, 0x16000, univ_info_dat, sizeof(univ_info_dat))) == 0) return false; |
1399 |
> |
if ((base = find_rom_data(0x14000, 0x18000, univ_info_dat, sizeof(univ_info_dat))) == 0) return false; |
1400 |
|
D(bug("universal_info %08lx\n", base)); |
1401 |
|
lp = (uint32 *)(ROM_BASE + base - 0x14); |
1402 |
|
lp[0x00 >> 2] = htonl(ADDR_MAP_PATCH_SPACE - (base - 0x14)); |
1420 |
|
lp[0x28 >> 2] = htonl(0x00000861); |
1421 |
|
lp[0x58 >> 2] = htonl(0x30200000); |
1422 |
|
lp[0x60 >> 2] = htonl(0x0000003d); |
1423 |
+ |
} else if (ROMType == ROMTYPE_GOSSAMER) { |
1424 |
+ |
base = 0x12d20; |
1425 |
+ |
lp = (uint32 *)(ROM_BASE + base - 0x14); |
1426 |
+ |
lp[0x00 >> 2] = htonl(ADDR_MAP_PATCH_SPACE - (base - 0x14)); |
1427 |
+ |
lp[0x10 >> 2] = htonl(0xcc003d11); // Make it like the PowerMac 9500 UniversalInfo |
1428 |
+ |
lp[0x14 >> 2] = htonl(0x3fff0401); |
1429 |
+ |
lp[0x18 >> 2] = htonl(0x0300001c); |
1430 |
+ |
lp[0x1c >> 2] = htonl(0x000108c4); |
1431 |
+ |
lp[0x24 >> 2] = htonl(0xc301bf26); |
1432 |
+ |
lp[0x28 >> 2] = htonl(0x00000861); |
1433 |
+ |
lp[0x58 >> 2] = htonl(0x30410000); |
1434 |
+ |
lp[0x60 >> 2] = htonl(0x0000003d); |
1435 |
|
} |
1436 |
|
|
1437 |
|
// Construct AddrMap for NewWorld ROM |
1438 |
< |
if (ROMType == ROMTYPE_NEWWORLD || ROMType == ROMTYPE_ZANZIBAR) { |
1438 |
> |
if (ROMType == ROMTYPE_NEWWORLD || ROMType == ROMTYPE_ZANZIBAR || ROMType == ROMTYPE_GOSSAMER) { |
1439 |
|
lp = (uint32 *)(ROM_BASE + ADDR_MAP_PATCH_SPACE); |
1440 |
|
memset(lp - 10, 0, 0x128); |
1441 |
|
lp[-10] = htonl(0x0300001c); |
1561 |
|
*wp++ = htons(M68K_EMUL_OP_XPRAM2); |
1562 |
|
*wp = htons(0x4ed3); // jmp (a3) |
1563 |
|
|
1564 |
< |
static const uint32 nvram3_loc[] = {0x582f0, 0xa0a0, 0x7e50, 0xa1d0, 0}; |
1565 |
< |
wp = (uint16 *)(ROM_BASE + nvram3_loc[ROMType]); |
1564 |
> |
static const uint8 nvram3_dat[] = {0x4e, 0xd3, 0x06, 0x41, 0x13, 0x00}; |
1565 |
> |
if ((base = find_rom_data(0x7000, 0xb000, nvram3_dat, sizeof(nvram3_dat))) == 0) return false; |
1566 |
> |
D(bug("nvram3 %08lx\n", base)); |
1567 |
> |
wp = (uint16 *)(ROM_BASE + base + 2); |
1568 |
> |
*wp++ = htons(M68K_EMUL_OP_XPRAM3); |
1569 |
> |
*wp = htons(0x4ed3); // jmp (a3) |
1570 |
> |
|
1571 |
> |
static const uint32 nvram4_loc[] = {0x582f0, 0xa0a0, 0x7e50, 0xa1d0, 0x538d0, 0}; |
1572 |
> |
wp = (uint16 *)(ROM_BASE + nvram4_loc[ROMType]); |
1573 |
|
*wp++ = htons(0x202f); // move.l 4(sp),d0 |
1574 |
|
*wp++ = htons(0x0004); |
1575 |
|
*wp++ = htons(M68K_EMUL_OP_NVRAM1); |
1582 |
|
*wp = htons(0x0004); |
1583 |
|
} |
1584 |
|
|
1585 |
< |
static const uint32 nvram4_loc[] = {0x58460, 0xa0f0, 0x7f40, 0xa220, 0}; |
1586 |
< |
wp = (uint16 *)(ROM_BASE + nvram4_loc[ROMType]); |
1585 |
> |
static const uint32 nvram5_loc[] = {0x58460, 0xa0f0, 0x7f40, 0xa220, 0x53a20, 0}; |
1586 |
> |
wp = (uint16 *)(ROM_BASE + nvram5_loc[ROMType]); |
1587 |
|
if (ROMType == ROMTYPE_ZANZIBAR || ROMType == ROMTYPE_GAZELLE) { |
1588 |
|
*wp++ = htons(0x202f); // move.l 4(sp),d0 |
1589 |
|
*wp++ = htons(0x0004); |
1760 |
|
if ((base = find_rom_data(0x13000, 0x20000, gc_mask2_dat, sizeof(gc_mask2_dat))) == 0) return false; |
1761 |
|
D(bug("gc_mask2 %08lx\n", base)); |
1762 |
|
wp = (uint16 *)(ROM_BASE + base); |
1763 |
+ |
if (ROMType == ROMTYPE_GOSSAMER) |
1764 |
+ |
*wp++ = htons(M68K_NOP); |
1765 |
|
for (int i=0; i<5; i++) { |
1766 |
|
*wp++ = htons(M68K_NOP); |
1767 |
|
*wp++ = htons(M68K_NOP); |
1769 |
|
*wp++ = htons(M68K_NOP); |
1770 |
|
wp += 2; |
1771 |
|
} |
1772 |
< |
if (ROMType == ROMTYPE_ZANZIBAR) { |
1772 |
> |
if (ROMType == ROMTYPE_ZANZIBAR || ROMType == ROMTYPE_GOSSAMER) { |
1773 |
|
for (int i=0; i<6; i++) { |
1774 |
|
*wp++ = htons(M68K_NOP); |
1775 |
|
*wp++ = htons(M68K_NOP); |
1795 |
|
|
1796 |
|
// Patch GetCPUSpeed (via 0x27a) (some ROMs have two of them) |
1797 |
|
static const uint8 cpu_speed_dat[] = {0x20, 0x30, 0x81, 0xf2, 0x5f, 0xff, 0xef, 0xd8, 0x00, 0x04, 0x4c, 0x7c}; |
1798 |
< |
if ((base = find_rom_data(0x6000, 0x9000, cpu_speed_dat, sizeof(cpu_speed_dat))) == 0) return false; |
1798 |
> |
if ((base = find_rom_data(0x6000, 0xa000, cpu_speed_dat, sizeof(cpu_speed_dat))) == 0) return false; |
1799 |
|
D(bug("cpu_speed %08lx\n", base)); |
1800 |
|
wp = (uint16 *)(ROM_BASE + base); |
1801 |
|
*wp++ = htons(0x203c); // move.l #(MHz<<16)|MHz,d0 |
1802 |
|
*wp++ = htons(CPUClockSpeed / 1000000); |
1803 |
|
*wp++ = htons(CPUClockSpeed / 1000000); |
1804 |
|
*wp = htons(M68K_RTS); |
1805 |
< |
if ((base = find_rom_data(base, 0x9000, cpu_speed_dat, sizeof(cpu_speed_dat))) != 0) { |
1805 |
> |
if ((base = find_rom_data(base, 0xa000, cpu_speed_dat, sizeof(cpu_speed_dat))) != 0) { |
1806 |
|
D(bug("cpu_speed2 %08lx\n", base)); |
1807 |
|
wp = (uint16 *)(ROM_BASE + base); |
1808 |
|
*wp++ = htons(0x203c); // move.l #(MHz<<16)|MHz,d0 |
1846 |
|
static const uint8 tm_task_dat[] = {0x30, 0x3c, 0x4e, 0x2b, 0xa9, 0xc9}; |
1847 |
|
if ((base = find_rom_data(0x2e0, 0x320, tm_task_dat, sizeof(tm_task_dat))) == 0) return false; |
1848 |
|
D(bug("tm_task %08lx\n", base)); |
1849 |
< |
wp = (uint16 *)(ROM_BASE + base + 28); |
1849 |
> |
wp = (uint16 *)(ROM_BASE + base + 28); // FIXME: this is not right for all nw ROMs |
1850 |
|
*wp++ = htons(M68K_NOP); |
1851 |
|
*wp++ = htons(M68K_NOP); |
1852 |
|
*wp++ = htons(M68K_NOP); |
1853 |
|
*wp++ = htons(M68K_NOP); |
1854 |
|
*wp++ = htons(M68K_NOP); |
1855 |
|
*wp = htons(M68K_NOP); |
1856 |
+ |
} else if (ROMType == ROMTYPE_GOSSAMER) { |
1857 |
+ |
static const uint8 tm_task_dat[] = {0x30, 0x3c, 0x4e, 0x2b, 0xa9, 0xc9}; |
1858 |
+ |
if ((base = find_rom_data(0x2a0, 0x2e0, tm_task_dat, sizeof(tm_task_dat))) == 0) return false; |
1859 |
+ |
D(bug("tm_task %08lx\n", base)); |
1860 |
+ |
wp = (uint16 *)(ROM_BASE + base + 22); |
1861 |
+ |
*wp++ = htons(M68K_NOP); |
1862 |
+ |
*wp++ = htons(M68K_NOP); |
1863 |
+ |
*wp++ = htons(M68K_NOP); |
1864 |
|
} else { |
1865 |
|
static const uint8 tm_task_dat[] = {0x20, 0x3c, 0x73, 0x79, 0x73, 0x61}; |
1866 |
|
if ((base = find_rom_data(0x280, 0x300, tm_task_dat, sizeof(tm_task_dat))) == 0) return false; |
1872 |
|
} |
1873 |
|
|
1874 |
|
// Don't read PVR from 0x5fffef80 in DriverServicesLib (via 0x316) |
1875 |
< |
if (ROMType != ROMTYPE_NEWWORLD) { |
1875 |
> |
if (ROMType != ROMTYPE_NEWWORLD && ROMType != ROMTYPE_GOSSAMER) { |
1876 |
|
uint32 dsl_offset = find_rom_resource(FOURCC('n','l','i','b'), -16401); |
1877 |
|
if (ROMType == ROMTYPE_ZANZIBAR) { |
1878 |
|
static const uint8 dsl_pvr_dat[] = {0x40, 0x82, 0x00, 0x40, 0x38, 0x60, 0xef, 0x80, 0x3c, 0x63, 0x60, 0x00, 0x80, 0x83, 0x00, 0x00, 0x54, 0x84, 0x84, 0x3e}; |
1958 |
|
D(bug("scsi_var2 %08lx\n", base)); |
1959 |
|
wp = (uint16 *)(ROM_BASE + base); |
1960 |
|
*wp++ = htons(0x7000); // moveq #0,d0 |
1961 |
< |
*wp = htons(M68K_RTS); // bra |
1961 |
> |
*wp = htons(M68K_RTS); |
1962 |
> |
} |
1963 |
> |
} |
1964 |
> |
else if (ROMType == ROMTYPE_GOSSAMER) { |
1965 |
> |
static const uint8 scsi_var_dat[] = {0x70, 0x01, 0xa0, 0x89, 0x4a, 0x6e, 0xfe, 0xac, 0x4f, 0xef, 0x00, 0x10, 0x66, 0x00}; |
1966 |
> |
if ((base = find_rom_data(0x1d700, 0x1d800, scsi_var_dat, sizeof(scsi_var_dat))) != 0) { |
1967 |
> |
D(bug("scsi_var %08lx\n", base)); |
1968 |
> |
wp = (uint16 *)(ROM_BASE + base + 12); |
1969 |
> |
*wp = htons(0x6000); // bra |
1970 |
> |
} |
1971 |
> |
|
1972 |
> |
static const uint8 scsi_var2_dat[] = {0x4e, 0x56, 0xfc, 0x5a, 0x48, 0xe7, 0x1f, 0x38}; |
1973 |
> |
if ((base = find_rom_data(0x1d900, 0x1da00, scsi_var2_dat, sizeof(scsi_var2_dat))) != 0) { |
1974 |
> |
D(bug("scsi_var2 %08lx\n", base)); |
1975 |
> |
wp = (uint16 *)(ROM_BASE + base); |
1976 |
> |
*wp++ = htons(0x7000); // moveq #0,d0 |
1977 |
> |
*wp = htons(M68K_RTS); |
1978 |
|
} |
1979 |
|
} |
1980 |
|
#endif |
2030 |
|
memcpy((void *)(ROM_BASE + sony_offset + 0x200), cdrom_driver, sizeof(cdrom_driver)); |
2031 |
|
|
2032 |
|
// Install serial drivers |
2033 |
< |
memcpy((void *)(ROM_BASE + sony_offset + 0x300), ain_driver, sizeof(ain_driver)); |
2034 |
< |
memcpy((void *)(ROM_BASE + sony_offset + 0x400), aout_driver, sizeof(aout_driver)); |
2035 |
< |
memcpy((void *)(ROM_BASE + sony_offset + 0x500), bin_driver, sizeof(bin_driver)); |
2036 |
< |
memcpy((void *)(ROM_BASE + sony_offset + 0x600), bout_driver, sizeof(bout_driver)); |
2033 |
> |
memcpy_powerpc_code((void *)(ROM_BASE + sony_offset + 0x300), ain_driver, sizeof(ain_driver)); |
2034 |
> |
memcpy_powerpc_code((void *)(ROM_BASE + sony_offset + 0x400), aout_driver, sizeof(aout_driver)); |
2035 |
> |
memcpy_powerpc_code((void *)(ROM_BASE + sony_offset + 0x500), bin_driver, sizeof(bin_driver)); |
2036 |
> |
memcpy_powerpc_code((void *)(ROM_BASE + sony_offset + 0x600), bout_driver, sizeof(bout_driver)); |
2037 |
|
|
2038 |
|
// Copy icons to ROM |
2039 |
|
SonyDiskIconAddr = ROM_BASE + sony_offset + 0x800; |
2054 |
|
*wp = htons(M68K_RTS); |
2055 |
|
|
2056 |
|
// Don't install serial drivers from ROM |
2057 |
< |
if (ROMType == ROMTYPE_ZANZIBAR || ROMType == ROMTYPE_NEWWORLD) { |
2057 |
> |
if (ROMType == ROMTYPE_ZANZIBAR || ROMType == ROMTYPE_NEWWORLD || ROMType == ROMTYPE_GOSSAMER) { |
2058 |
|
wp = (uint16 *)(ROM_BASE + find_rom_resource(FOURCC('S','E','R','D'), 0)); |
2059 |
|
*wp = htons(M68K_RTS); |
2060 |
|
} else { |
2113 |
|
wp = (uint16 *)(ROM_BASE + base); |
2114 |
|
if (ROMType == ROMTYPE_ZANZIBAR) |
2115 |
|
*wp = htons(M68K_RTS); |
2116 |
< |
else |
2116 |
> |
else if (ntohs(wp[-4]) == 0x61ff) |
2117 |
> |
*wp = htons(M68K_RTS); |
2118 |
> |
else if (ntohs(wp[-2]) == 0x6700) |
2119 |
|
wp[-2] = htons(0x6000); // bra |
2120 |
|
|
2121 |
|
// Patch PowerOff() |
2145 |
|
|
2146 |
|
if (ROMType == ROMTYPE_NEWWORLD) { |
2147 |
|
static const uint8 via_int3_dat[] = {0x48, 0xe7, 0xf0, 0xf0, 0x76, 0x01, 0x60, 0x26}; |
2148 |
< |
if ((base = find_rom_data(0x15000, 0x18000, via_int3_dat, sizeof(via_int3_dat))) == 0) return false; |
2148 |
> |
if ((base = find_rom_data(0x15000, 0x19000, via_int3_dat, sizeof(via_int3_dat))) == 0) return false; |
2149 |
|
D(bug("via_int3 %08lx\n", base)); |
2150 |
|
wp = (uint16 *)(ROM_BASE + base); // CHRP level 1 handler |
2151 |
|
*wp++ = htons(M68K_JMP); |
2237 |
|
M68kRegisters r; |
2238 |
|
uint8 pb[SIZEOF_IOParam]; |
2239 |
|
|
2240 |
+ |
// Install floppy driver |
2241 |
+ |
if (ROMType == ROMTYPE_NEWWORLD) { |
2242 |
+ |
|
2243 |
+ |
// Force installation of floppy driver with NewWorld ROMs |
2244 |
+ |
r.a[0] = ROM_BASE + sony_offset; |
2245 |
+ |
r.d[0] = (uint32)SonyRefNum; |
2246 |
+ |
Execute68kTrap(0xa43d, &r); // DrvrInstallRsrvMem() |
2247 |
+ |
r.a[0] = ReadMacInt32(ReadMacInt32(0x11c) + ~SonyRefNum * 4); // Get driver handle from Unit Table |
2248 |
+ |
Execute68kTrap(0xa029, &r); // HLock() |
2249 |
+ |
uint32 dce = ReadMacInt32(r.a[0]); |
2250 |
+ |
WriteMacInt32(dce + dCtlDriver, ROM_BASE + sony_offset); |
2251 |
+ |
WriteMacInt16(dce + dCtlFlags, SonyDriverFlags); |
2252 |
+ |
} |
2253 |
+ |
|
2254 |
+ |
#if DISABLE_SCSI && 0 |
2255 |
+ |
// Fake SCSIGlobals |
2256 |
+ |
static const uint8 fake_scsi_globals[32] = {0,}; |
2257 |
+ |
WriteMacInt32(0xc0c, (uint32)fake_scsi_globals); |
2258 |
+ |
#endif |
2259 |
+ |
|
2260 |
|
// Open .Sony driver |
2261 |
|
WriteMacInt8((uint32)pb + ioPermssn, 0); |
2262 |
|
WriteMacInt32((uint32)pb + ioNamePtr, (uint32)"\005.Sony"); |