[ViewVC] Diff of: cebix/SheepShaver/src/rom

Comparing SheepShaver/src/rom_patches.cpp (file contents):
Revision 1.8 by gbeauche, 2003-09-28T21:27:33Z vs.
Revision 1.17 by gbeauche, 2003-10-07T19:28:09Z

#	Line 58 \| Line 58
58
59
60		// Other ROM addresses
61	<	const uint32 CHECK_LOAD_PATCH_SPACE = 0x2f7f00;
62	<	const uint32 PUT_SCRAP_PATCH_SPACE = 0x2f7f80;
63	<	const uint32 GET_SCRAP_PATCH_SPACE = 0x2f7fc0;
64	<	const uint32 ADDR_MAP_PATCH_SPACE = 0x2f8000;
61	>	const uint32 CHECK_LOAD_PATCH_SPACE = 0x2fcf00;
62	>	const uint32 PUT_SCRAP_PATCH_SPACE = 0x2fcf80;
63	>	const uint32 GET_SCRAP_PATCH_SPACE = 0x2fcfc0;
64	>	const uint32 ADDR_MAP_PATCH_SPACE = 0x2fd000;
65
66		// Global variables
67		int ROMType; // ROM type
#	Line 131 \| Line 131 \| *void decode_parcels(const uint8 src, ui**
131		(parcel_type >> 8) & 0xff, parcel_type & 0xff, &parcel_data[6]));
132		if (parcel_type == FOURCC('r','o','m',' ')) {
133		uint32 lzss_offset = ntohl(parcel_data[2]);
134	<	uint32 lzss_size = ((uint32)src + parcel_offset) - ((uint32)parcel_data + lzss_offset);
134	>	uint32 lzss_size = ((uintptr)src + next_offset) - ((uintptr)parcel_data + lzss_offset);
135		decode_lzss((uint8 *)parcel_data + lzss_offset, dest, lzss_size);
136		}
137		parcel_offset = next_offset;
#	Line 449 \| Line 449 \| static const uint8 cdrom_driver[] = { //
449
450		#if EMULATED_PPC
451		#define SERIAL_TRAMPOLINES 1
452	<	static uint32 serial_nothing_tvect[2] = {POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_NOTHING), 0};
453	<	static uint32 serial_open_tvect[2] = {POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_OPEN), 0};
454	<	static uint32 serial_prime_in_tvect[2] = {POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_PRIME_IN), 0};
455	<	static uint32 serial_prime_out_tvect[2] = {POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_PRIME_OUT), 0};
456	<	static uint32 serial_control_tvect[2] = {POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_CONTROL), 0};
457	<	static uint32 serial_status_tvect[2] = {POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_STATUS), 0};
458	<	static uint32 serial_close_tvect[2] = {POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_CLOSE), 0};
452	>	static uint32 serial_nothing_tvect[2] = {tswap32(POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_NOTHING)), 0};
453	>	static uint32 serial_open_tvect[2] = {tswap32(POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_OPEN)), 0};
454	>	static uint32 serial_prime_in_tvect[2] = {tswap32(POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_PRIME_IN)), 0};
455	>	static uint32 serial_prime_out_tvect[2] = {tswap32(POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_PRIME_OUT)), 0};
456	>	static uint32 serial_control_tvect[2] = {tswap32(POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_CONTROL)), 0};
457	>	static uint32 serial_status_tvect[2] = {tswap32(POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_STATUS)), 0};
458	>	static uint32 serial_close_tvect[2] = {tswap32(POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_CLOSE)), 0};
459		#elif defined(__linux__)
460		#define SERIAL_TRAMPOLINES 1
461		static uint32 serial_nothing_tvect[2] = {(uint32)SerialNothing, 0};
#	Line 679 \| Line 679 \| static const uint8 adbop_patch[] = { //
679
680
681		/*
682	+	* Copy PowerPC code to ROM image and reverse bytes if necessary
683	+	*/
684	+
685	+	static inline void memcpy_powerpc_code(void dst, const void src, size_t len)
686	+	{
687	+	#ifdef WORDS_BIGENDIAN
688	+	(void)memcpy(dst, src, len);
689	+	#else
690	+	uint32 d = (uint32 )dst;
691	+	uint32 s = (uint32 )src;
692	+	for (int i = 0; i < len/4; i++)
693	+	d[i] = htonl(s[i]);
694	+	#endif
695	+	}
696	+
697	+
698	+	/*
699		* Install ROM patches (RAMBase and KernelDataAddr must be set)
700		*/
701
#	Line 701 \| Line 718 \| bool PatchROM(void)
718		ROMType = ROMTYPE_ZANZIBAR;
719		else if (!memcmp((void *)(ROM_BASE + 0x30d064), "Boot Gazelle", 12))
720		ROMType = ROMTYPE_GAZELLE;
721	+	else if (!memcmp((void *)(ROM_BASE + 0x30d064), "Boot Gossamer", 13))
722	+	ROMType = ROMTYPE_GOSSAMER;
723		else if (!memcmp((void *)(ROM_BASE + 0x30d064), "NewWorld", 8))
724		ROMType = ROMTYPE_NEWWORLD;
725		else
726		return false;
727
728	+	// Check that other ROM addresses point to really free regions
729	+	if (ntohl((uint32 )(ROM_BASE + CHECK_LOAD_PATCH_SPACE)) != 0x6b636b63)
730	+	return false;
731	+	if (ntohl((uint32 )(ROM_BASE + PUT_SCRAP_PATCH_SPACE)) != 0x6b636b63)
732	+	return false;
733	+	if (ntohl((uint32 )(ROM_BASE + GET_SCRAP_PATCH_SPACE)) != 0x6b636b63)
734	+	return false;
735	+	if (ntohl((uint32 )(ROM_BASE + ADDR_MAP_PATCH_SPACE)) != 0x6b636b63)
736	+	return false;
737	+
738		// Apply patches
739		if (!patch_nanokernel_boot()) return false;
740		if (!patch_68k_emul()) return false;
#	Line 750 \| Line 779 \| static bool patch_nanokernel_boot(void)
779		lp[0xfd8 >> 2] = htonl(ROM_BASE + 0x2a); // 68k reset vector
780
781		// Skip SR/BAT/SDR init
782	<	if (ROMType == ROMTYPE_GAZELLE \|\| ROMType == ROMTYPE_NEWWORLD) {
782	>	if (ROMType == ROMTYPE_GAZELLE \|\| ROMType == ROMTYPE_GOSSAMER \|\| ROMType == ROMTYPE_NEWWORLD) {
783		lp = (uint32 *)(ROM_BASE + 0x310000);
784		*lp++ = htonl(POWERPC_NOP);
785		*lp = htonl(0x38000000);
786		}
787	<	static const uint32 sr_init_loc[] = {0x3101b0, 0x3101b0, 0x3101b0, 0x3101ec, 0x310200};
787	>	static const uint32 sr_init_loc[] = {0x3101b0, 0x3101b0, 0x3101b0, 0x3101ec, 0x3101fc, 0x310200};
788		lp = (uint32 *)(ROM_BASE + 0x310008);
789		*lp = htonl(0x48000000 \| (sr_init_loc[ROMType] - 8) & 0xffff); // b ROM_BASE+0x3101b0
790		lp = (uint32 *)(ROM_BASE + sr_init_loc[ROMType]);
#	Line 765 \| Line 794 \| static bool patch_nanokernel_boot(void)
794		*lp = htonl(0x3de00010); // lis r15,0x0010 (size of kernel memory)
795
796		// Don't read PVR
797	<	static const uint32 pvr_loc[] = {0x3103b0, 0x3103b4, 0x3103b4, 0x310400, 0x310438};
797	>	static const uint32 pvr_loc[] = {0x3103b0, 0x3103b4, 0x3103b4, 0x310400, 0x310430, 0x310438};
798		lp = (uint32 *)(ROM_BASE + pvr_loc[ROMType]);
799		*lp = htonl(0x81800000 + XLM_PVR); // lwz r12,(theoretical PVR)
800
#	Line 913 \| Line 942 \| static bool patch_nanokernel_boot(void)
942		*lp = htonl(POWERPC_NOP);
943
944		// Don't read PVR
945	<	static const uint32 pvr_ofs[] = {0x138, 0x138, 0x138, 0x140, 0x148};
945	>	static const uint32 pvr_ofs[] = {0x138, 0x138, 0x138, 0x140, 0x148, 0x148};
946		lp = (uint32 *)(ROM_BASE + loc + pvr_ofs[ROMType]);
947		*lp = htonl(0x82e00000 + XLM_PVR); // lwz r23,(theoretical PVR)
948		lp = (uint32 *)(ROM_BASE + loc + 0x170);
949	<	if (ntohl(*lp) == 0x7eff42a6) // NewWorld ROM
949	>	if (ntohl(*lp) == 0x7eff42a6) // NewWorld or Gossamer ROM
950		*lp = htonl(0x82e00000 + XLM_PVR); // lwz r23,(theoretical PVR)
951		lp = (uint32 *)(ROM_BASE + 0x313134);
952		if (ntohl(*lp) == 0x7e5f42a6)
#	Line 930 \| Line 959 \| static bool patch_nanokernel_boot(void)
959		*lp = htonl(0x81200000 + XLM_PVR); // lzw r9,(theoritical PVR)
960
961		// Don't read SDR1
962	<	static const uint32 sdr1_ofs[] = {0x174, 0x174, 0x174, 0x17c, 0x19c};
962	>	static const uint32 sdr1_ofs[] = {0x174, 0x174, 0x174, 0x17c, 0x19c, 0x19c};
963		lp = (uint32 *)(ROM_BASE + loc + sdr1_ofs[ROMType]);
964		*lp++ = htonl(0x3d00dead); // lis r8,0xdead (pointer to page table)
965		*lp++ = htonl(0x3ec0001f); // lis r22,0x001f (size of page table)
966		*lp = htonl(POWERPC_NOP);
967
968		// Don't clear page table
969	<	static const uint32 pgtb_ofs[] = {0x198, 0x198, 0x198, 0x1a0, 0x1c4};
969	>	static const uint32 pgtb_ofs[] = {0x198, 0x198, 0x198, 0x1a0, 0x1c0, 0x1c4};
970		lp = (uint32 *)(ROM_BASE + loc + pgtb_ofs[ROMType]);
971		*lp = htonl(POWERPC_NOP);
972
973		// Don't invalidate TLB
974	<	static const uint32 tlb_ofs[] = {0x1a0, 0x1a0, 0x1a0, 0x1a8, 0x1cc};
974	>	static const uint32 tlb_ofs[] = {0x1a0, 0x1a0, 0x1a0, 0x1a8, 0x1c8, 0x1cc};
975		lp = (uint32 *)(ROM_BASE + loc + tlb_ofs[ROMType]);
976		*lp = htonl(POWERPC_NOP);
977
978		// Don't create RAM descriptor table
979	<	static const uint32 desc_ofs[] = {0x350, 0x350, 0x350, 0x358, 0x37c};
979	>	static const uint32 desc_ofs[] = {0x350, 0x350, 0x350, 0x358, 0x378, 0x37c};
980		lp = (uint32 *)(ROM_BASE + loc + desc_ofs[ROMType]);
981		*lp = htonl(POWERPC_NOP);
982
983		// Don't load SRs and BATs
984	<	static const uint32 sr_ofs[] = {0x3d8, 0x3d8, 0x3d8, 0x3e0, 0x404};
984	>	static const uint32 sr_ofs[] = {0x3d8, 0x3d8, 0x3d8, 0x3e0, 0x400, 0x404};
985		lp = (uint32 *)(ROM_BASE + loc + sr_ofs[ROMType]);
986		*lp = htonl(POWERPC_NOP);
987
988		// Don't mess with SRs
989	<	static const uint32 sr2_ofs[] = {0x312118, 0x312118, 0x312118, 0x312118, 0x3121b4};
989	>	static const uint32 sr2_ofs[] = {0x312118, 0x312118, 0x312118, 0x312118, 0x312118, 0x3121b4};
990		lp = (uint32 *)(ROM_BASE + sr2_ofs[ROMType]);
991		*lp = htonl(POWERPC_BLR);
992
993		// Don't check performance monitor
994	<	static const uint32 pm_ofs[] = {0x313148, 0x313148, 0x313148, 0x313148, 0x313218};
994	>	static const uint32 pm_ofs[] = {0x313148, 0x313148, 0x313148, 0x313148, 0x313158, 0x313218};
995		lp = (uint32 *)(ROM_BASE + pm_ofs[ROMType]);
996		while (ntohl(*lp) != 0x7e58eba6) lp++;
997		*lp++ = htonl(POWERPC_NOP);
#	Line 998 \| Line 1027 \| static bool patch_nanokernel_boot(void)
1027		*lp++ = htonl(POWERPC_NOP);
1028
1029		// Jump to 68k emulator
1030	<	static const uint32 jump68k_ofs[] = {0x40c, 0x40c, 0x40c, 0x414, 0x438};
1030	>	static const uint32 jump68k_ofs[] = {0x40c, 0x40c, 0x40c, 0x414, 0x434, 0x438};
1031		lp = (uint32 *)(ROM_BASE + loc + jump68k_ofs[ROMType]);
1032		*lp++ = htonl(0x80610634); // lwz r3,0x0634(r1) (pointer to Emulator Data)
1033		*lp++ = htonl(0x8081119c); // lwz r4,0x119c(r1) (pointer to opcode table)
#	Line 1019 \| Line 1048 \| static bool patch_68k_emul(void)
1048		uint32 base;
1049
1050		// Overwrite twi instructions
1051	<	static const uint32 twi_loc[] = {0x36e680, 0x36e6c0, 0x36e6c0, 0x36e6c0, 0x36e740};
1051	>	static const uint32 twi_loc[] = {0x36e680, 0x36e6c0, 0x36e6c0, 0x36e6c0, 0x36e740, 0x36e740};
1052		base = twi_loc[ROMType];
1053		lp = (uint32 *)(ROM_BASE + base);
1054		*lp++ = htonl(0x48000000 + 0x36f900 - base); // b 0x36f900 (Emulator start)
#	Line 1401 \| Line 1430 \| static bool patch_68k(void)
1430		lp[0x28 >> 2] = htonl(0x00000861);
1431		lp[0x58 >> 2] = htonl(0x30200000);
1432		lp[0x60 >> 2] = htonl(0x0000003d);
1433	+	} else if (ROMType == ROMTYPE_GOSSAMER) {
1434	+	base = 0x12d20;
1435	+	lp = (uint32 *)(ROM_BASE + base - 0x14);
1436	+	lp[0x00 >> 2] = htonl(ADDR_MAP_PATCH_SPACE - (base - 0x14));
1437	+	lp[0x10 >> 2] = htonl(0xcc003d11); // Make it like the PowerMac 9500 UniversalInfo
1438	+	lp[0x14 >> 2] = htonl(0x3fff0401);
1439	+	lp[0x18 >> 2] = htonl(0x0300001c);
1440	+	lp[0x1c >> 2] = htonl(0x000108c4);
1441	+	lp[0x24 >> 2] = htonl(0xc301bf26);
1442	+	lp[0x28 >> 2] = htonl(0x00000861);
1443	+	lp[0x58 >> 2] = htonl(0x30410000);
1444	+	lp[0x60 >> 2] = htonl(0x0000003d);
1445		}
1446
1447		// Construct AddrMap for NewWorld ROM
1448	<	if (ROMType == ROMTYPE_NEWWORLD \|\| ROMType == ROMTYPE_ZANZIBAR) {
1448	>	if (ROMType == ROMTYPE_NEWWORLD \|\| ROMType == ROMTYPE_ZANZIBAR \|\| ROMType == ROMTYPE_GOSSAMER) {
1449		lp = (uint32 *)(ROM_BASE + ADDR_MAP_PATCH_SPACE);
1450		memset(lp - 10, 0, 0x128);
1451		lp[-10] = htonl(0x0300001c);
#	Line 1530 \| Line 1571 \| static bool patch_68k(void)
1571		*wp++ = htons(M68K_EMUL_OP_XPRAM2);
1572		*wp = htons(0x4ed3); // jmp (a3)
1573
1574	<	static const uint32 nvram3_loc[] = {0x582f0, 0xa0a0, 0x7e50, 0xa1d0, 0};
1575	<	wp = (uint16 *)(ROM_BASE + nvram3_loc[ROMType]);
1574	>	static const uint8 nvram3_dat[] = {0x4e, 0xd3, 0x06, 0x41, 0x13, 0x00};
1575	>	if ((base = find_rom_data(0x7000, 0xb000, nvram3_dat, sizeof(nvram3_dat))) == 0) return false;
1576	>	D(bug("nvram3 %08lx\n", base));
1577	>	wp = (uint16 *)(ROM_BASE + base + 2);
1578	>	*wp++ = htons(M68K_EMUL_OP_XPRAM3);
1579	>	*wp = htons(0x4ed3); // jmp (a3)
1580	>
1581	>	static const uint32 nvram4_loc[] = {0x582f0, 0xa0a0, 0x7e50, 0xa1d0, 0x538d0, 0};
1582	>	wp = (uint16 *)(ROM_BASE + nvram4_loc[ROMType]);
1583		*wp++ = htons(0x202f); // move.l 4(sp),d0
1584		*wp++ = htons(0x0004);
1585		*wp++ = htons(M68K_EMUL_OP_NVRAM1);
#	Line 1544 \| Line 1592 \| static bool patch_68k(void)
1592		*wp = htons(0x0004);
1593		}
1594
1595	<	static const uint32 nvram4_loc[] = {0x58460, 0xa0f0, 0x7f40, 0xa220, 0};
1596	<	wp = (uint16 *)(ROM_BASE + nvram4_loc[ROMType]);
1595	>	static const uint32 nvram5_loc[] = {0x58460, 0xa0f0, 0x7f40, 0xa220, 0x53a20, 0};
1596	>	wp = (uint16 *)(ROM_BASE + nvram5_loc[ROMType]);
1597		if (ROMType == ROMTYPE_ZANZIBAR \|\| ROMType == ROMTYPE_GAZELLE) {
1598		*wp++ = htons(0x202f); // move.l 4(sp),d0
1599		*wp++ = htons(0x0004);
#	Line 1722 \| Line 1770 \| static bool patch_68k(void)
1770		if ((base = find_rom_data(0x13000, 0x20000, gc_mask2_dat, sizeof(gc_mask2_dat))) == 0) return false;
1771		D(bug("gc_mask2 %08lx\n", base));
1772		wp = (uint16 *)(ROM_BASE + base);
1773	+	if (ROMType == ROMTYPE_GOSSAMER)
1774	+	*wp++ = htons(M68K_NOP);
1775		for (int i=0; i<5; i++) {
1776		*wp++ = htons(M68K_NOP);
1777		*wp++ = htons(M68K_NOP);
#	Line 1729 \| Line 1779 \| static bool patch_68k(void)
1779		*wp++ = htons(M68K_NOP);
1780		wp += 2;
1781		}
1782	<	if (ROMType == ROMTYPE_ZANZIBAR) {
1782	>	if (ROMType == ROMTYPE_ZANZIBAR \|\| ROMType == ROMTYPE_GOSSAMER) {
1783		for (int i=0; i<6; i++) {
1784		*wp++ = htons(M68K_NOP);
1785		*wp++ = htons(M68K_NOP);
#	Line 1802 \| Line 1852 \| static bool patch_68k(void)
1852		*wp = htons(M68K_RTS);
1853
1854		// Don't install Time Manager task for 60Hz interrupt (Enable60HzInts, via 0x2b8)
1855	<	if (ROMType == ROMTYPE_NEWWORLD) {
1855	>	if (ROMType == ROMTYPE_NEWWORLD \|\| ROMType == ROMTYPE_GOSSAMER) {
1856		static const uint8 tm_task_dat[] = {0x30, 0x3c, 0x4e, 0x2b, 0xa9, 0xc9};
1857	<	if ((base = find_rom_data(0x2e0, 0x320, tm_task_dat, sizeof(tm_task_dat))) == 0) return false;
1857	>	if ((base = find_rom_data(0x2a0, 0x320, tm_task_dat, sizeof(tm_task_dat))) == 0) return false;
1858		D(bug("tm_task %08lx\n", base));
1859		wp = (uint16 *)(ROM_BASE + base + 28);
1860		*wp++ = htons(M68K_NOP);
#	Line 1824 \| Line 1874 \| static bool patch_68k(void)
1874		}
1875
1876		// Don't read PVR from 0x5fffef80 in DriverServicesLib (via 0x316)
1877	<	if (ROMType != ROMTYPE_NEWWORLD) {
1877	>	if (ROMType != ROMTYPE_NEWWORLD && ROMType != ROMTYPE_GOSSAMER) {
1878		uint32 dsl_offset = find_rom_resource(FOURCC('n','l','i','b'), -16401);
1879		if (ROMType == ROMTYPE_ZANZIBAR) {
1880		static const uint8 dsl_pvr_dat[] = {0x40, 0x82, 0x00, 0x40, 0x38, 0x60, 0xef, 0x80, 0x3c, 0x63, 0x60, 0x00, 0x80, 0x83, 0x00, 0x00, 0x54, 0x84, 0x84, 0x3e};
#	Line 1910 \| Line 1960 \| static bool patch_68k(void)
1960		D(bug("scsi_var2 %08lx\n", base));
1961		wp = (uint16 *)(ROM_BASE + base);
1962		*wp++ = htons(0x7000); // moveq #0,d0
1963	<	*wp = htons(M68K_RTS); // bra
1963	>	*wp = htons(M68K_RTS);
1964	>	}
1965	>	}
1966	>	else if (ROMType == ROMTYPE_GOSSAMER) {
1967	>	static const uint8 scsi_var_dat[] = {0x70, 0x01, 0xa0, 0x89, 0x4a, 0x6e, 0xfe, 0xac, 0x4f, 0xef, 0x00, 0x10, 0x66, 0x00};
1968	>	if ((base = find_rom_data(0x1d700, 0x1d800, scsi_var_dat, sizeof(scsi_var_dat))) != 0) {
1969	>	D(bug("scsi_var %08lx\n", base));
1970	>	wp = (uint16 *)(ROM_BASE + base + 12);
1971	>	*wp = htons(0x6000); // bra
1972	>	}
1973	>
1974	>	static const uint8 scsi_var2_dat[] = {0x4e, 0x56, 0xfc, 0x5a, 0x48, 0xe7, 0x1f, 0x38};
1975	>	if ((base = find_rom_data(0x1d900, 0x1da00, scsi_var2_dat, sizeof(scsi_var2_dat))) != 0) {
1976	>	D(bug("scsi_var2 %08lx\n", base));
1977	>	wp = (uint16 *)(ROM_BASE + base);
1978	>	*wp++ = htons(0x7000); // moveq #0,d0
1979	>	*wp = htons(M68K_RTS);
1980		}
1981		}
1982		#endif
#	Line 1966 \| Line 2032 \| static bool patch_68k(void)
2032		memcpy((void *)(ROM_BASE + sony_offset + 0x200), cdrom_driver, sizeof(cdrom_driver));
2033
2034		// Install serial drivers
2035	<	memcpy((void *)(ROM_BASE + sony_offset + 0x300), ain_driver, sizeof(ain_driver));
2036	<	memcpy((void *)(ROM_BASE + sony_offset + 0x400), aout_driver, sizeof(aout_driver));
2037	<	memcpy((void *)(ROM_BASE + sony_offset + 0x500), bin_driver, sizeof(bin_driver));
2038	<	memcpy((void *)(ROM_BASE + sony_offset + 0x600), bout_driver, sizeof(bout_driver));
2035	>	memcpy_powerpc_code((void *)(ROM_BASE + sony_offset + 0x300), ain_driver, sizeof(ain_driver));
2036	>	memcpy_powerpc_code((void *)(ROM_BASE + sony_offset + 0x400), aout_driver, sizeof(aout_driver));
2037	>	memcpy_powerpc_code((void *)(ROM_BASE + sony_offset + 0x500), bin_driver, sizeof(bin_driver));
2038	>	memcpy_powerpc_code((void *)(ROM_BASE + sony_offset + 0x600), bout_driver, sizeof(bout_driver));
2039
2040		// Copy icons to ROM
2041		SonyDiskIconAddr = ROM_BASE + sony_offset + 0x800;
#	Line 1990 \| Line 2056 \| static bool patch_68k(void)
2056		*wp = htons(M68K_RTS);
2057
2058		// Don't install serial drivers from ROM
2059	<	if (ROMType == ROMTYPE_ZANZIBAR \|\| ROMType == ROMTYPE_NEWWORLD) {
2059	>	if (ROMType == ROMTYPE_ZANZIBAR \|\| ROMType == ROMTYPE_NEWWORLD \|\| ROMType == ROMTYPE_GOSSAMER) {
2060		wp = (uint16 *)(ROM_BASE + find_rom_resource(FOURCC('S','E','R','D'), 0));
2061		*wp = htons(M68K_RTS);
2062		} else {
#	Line 2174 \| Line 2240 \| void InstallDrivers(void)
2240		uint8 pb[SIZEOF_IOParam];
2241
2242		// Install floppy driver
2243	<	if (ROMType == ROMTYPE_NEWWORLD) {
2243	>	if (ROMType == ROMTYPE_NEWWORLD \|\| ROMType == ROMTYPE_GOSSAMER) {
2244
2245	<	// Force installation of floppy driver with NewWorld ROMs
2245	>	// Force installation of floppy driver with NewWorld and Gossamer ROMs
2246		r.a[0] = ROM_BASE + sony_offset;
2247		r.d[0] = (uint32)SonyRefNum;
2248		Execute68kTrap(0xa43d, &r); // DrvrInstallRsrvMem()

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Comparing SheepShaver/src/rom_patches.cpp (file contents): Revision 1.8 by gbeauche, 2003-09-28T21:27:33Z vs. Revision 1.17 by gbeauche, 2003-10-07T19:28:09Z

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Comparing SheepShaver/src/rom_patches.cpp (file contents):
Revision 1.8 by gbeauche, 2003-09-28T21:27:33Z vs.
Revision 1.17 by gbeauche, 2003-10-07T19:28:09Z