[ViewVC] Diff of: cebix/SheepShaver/src/rom

Comparing SheepShaver/src/rom_patches.cpp (file contents):
Revision 1.8 by gbeauche, 2003-09-28T21:27:33Z vs.
Revision 1.12 by gbeauche, 2003-10-05T23:38:07Z

#	Line 449 \| Line 449 \| static const uint8 cdrom_driver[] = { //
449
450		#if EMULATED_PPC
451		#define SERIAL_TRAMPOLINES 1
452	<	static uint32 serial_nothing_tvect[2] = {POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_NOTHING), 0};
453	<	static uint32 serial_open_tvect[2] = {POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_OPEN), 0};
454	<	static uint32 serial_prime_in_tvect[2] = {POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_PRIME_IN), 0};
455	<	static uint32 serial_prime_out_tvect[2] = {POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_PRIME_OUT), 0};
456	<	static uint32 serial_control_tvect[2] = {POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_CONTROL), 0};
457	<	static uint32 serial_status_tvect[2] = {POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_STATUS), 0};
458	<	static uint32 serial_close_tvect[2] = {POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_CLOSE), 0};
452	>	static uint32 serial_nothing_tvect[2] = {tswap32(POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_NOTHING)), 0};
453	>	static uint32 serial_open_tvect[2] = {tswap32(POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_OPEN)), 0};
454	>	static uint32 serial_prime_in_tvect[2] = {tswap32(POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_PRIME_IN)), 0};
455	>	static uint32 serial_prime_out_tvect[2] = {tswap32(POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_PRIME_OUT)), 0};
456	>	static uint32 serial_control_tvect[2] = {tswap32(POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_CONTROL)), 0};
457	>	static uint32 serial_status_tvect[2] = {tswap32(POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_STATUS)), 0};
458	>	static uint32 serial_close_tvect[2] = {tswap32(POWERPC_NATIVE_OP_FUNC(NATIVE_SERIAL_CLOSE)), 0};
459		#elif defined(__linux__)
460		#define SERIAL_TRAMPOLINES 1
461		static uint32 serial_nothing_tvect[2] = {(uint32)SerialNothing, 0};
#	Line 679 \| Line 679 \| static const uint8 adbop_patch[] = { //
679
680
681		/*
682	+	* Copy PowerPC code to ROM image and reverse bytes if necessary
683	+	*/
684	+
685	+	static inline void memcpy_powerpc_code(void dst, const void src, size_t len)
686	+	{
687	+	#ifdef WORDS_BIGENDIAN
688	+	(void)memcpy(dst, src, len);
689	+	#else
690	+	uint32 d = (uint32 )dst;
691	+	uint32 s = (uint32 )src;
692	+	for (int i = 0; i < len/4; i++)
693	+	d[i] = htonl(s[i]);
694	+	#endif
695	+	}
696	+
697	+
698	+	/*
699		* Install ROM patches (RAMBase and KernelDataAddr must be set)
700		*/
701
#	Line 701 \| Line 718 \| bool PatchROM(void)
718		ROMType = ROMTYPE_ZANZIBAR;
719		else if (!memcmp((void *)(ROM_BASE + 0x30d064), "Boot Gazelle", 12))
720		ROMType = ROMTYPE_GAZELLE;
721	+	else if (!memcmp((void *)(ROM_BASE + 0x30d064), "Boot Gossamer", 13))
722	+	ROMType = ROMTYPE_GOSSAMER;
723		else if (!memcmp((void *)(ROM_BASE + 0x30d064), "NewWorld", 8))
724		ROMType = ROMTYPE_NEWWORLD;
725		else
#	Line 750 \| Line 769 \| static bool patch_nanokernel_boot(void)
769		lp[0xfd8 >> 2] = htonl(ROM_BASE + 0x2a); // 68k reset vector
770
771		// Skip SR/BAT/SDR init
772	<	if (ROMType == ROMTYPE_GAZELLE \|\| ROMType == ROMTYPE_NEWWORLD) {
772	>	if (ROMType == ROMTYPE_GAZELLE \|\| ROMType == ROMTYPE_GOSSAMER \|\| ROMType == ROMTYPE_NEWWORLD) {
773		lp = (uint32 *)(ROM_BASE + 0x310000);
774		*lp++ = htonl(POWERPC_NOP);
775		*lp = htonl(0x38000000);
776		}
777	<	static const uint32 sr_init_loc[] = {0x3101b0, 0x3101b0, 0x3101b0, 0x3101ec, 0x310200};
777	>	static const uint32 sr_init_loc[] = {0x3101b0, 0x3101b0, 0x3101b0, 0x3101ec, 0x3101fc, 0x310200};
778		lp = (uint32 *)(ROM_BASE + 0x310008);
779		*lp = htonl(0x48000000 \| (sr_init_loc[ROMType] - 8) & 0xffff); // b ROM_BASE+0x3101b0
780		lp = (uint32 *)(ROM_BASE + sr_init_loc[ROMType]);
#	Line 765 \| Line 784 \| static bool patch_nanokernel_boot(void)
784		*lp = htonl(0x3de00010); // lis r15,0x0010 (size of kernel memory)
785
786		// Don't read PVR
787	<	static const uint32 pvr_loc[] = {0x3103b0, 0x3103b4, 0x3103b4, 0x310400, 0x310438};
787	>	static const uint32 pvr_loc[] = {0x3103b0, 0x3103b4, 0x3103b4, 0x310400, 0x310430, 0x310438};
788		lp = (uint32 *)(ROM_BASE + pvr_loc[ROMType]);
789		*lp = htonl(0x81800000 + XLM_PVR); // lwz r12,(theoretical PVR)
790
#	Line 913 \| Line 932 \| static bool patch_nanokernel_boot(void)
932		*lp = htonl(POWERPC_NOP);
933
934		// Don't read PVR
935	<	static const uint32 pvr_ofs[] = {0x138, 0x138, 0x138, 0x140, 0x148};
935	>	static const uint32 pvr_ofs[] = {0x138, 0x138, 0x138, 0x140, 0x148, 0x148};
936		lp = (uint32 *)(ROM_BASE + loc + pvr_ofs[ROMType]);
937		*lp = htonl(0x82e00000 + XLM_PVR); // lwz r23,(theoretical PVR)
938		lp = (uint32 *)(ROM_BASE + loc + 0x170);
939	<	if (ntohl(*lp) == 0x7eff42a6) // NewWorld ROM
939	>	if (ntohl(*lp) == 0x7eff42a6) // NewWorld or Gossamer ROM
940		*lp = htonl(0x82e00000 + XLM_PVR); // lwz r23,(theoretical PVR)
941		lp = (uint32 *)(ROM_BASE + 0x313134);
942		if (ntohl(*lp) == 0x7e5f42a6)
#	Line 930 \| Line 949 \| static bool patch_nanokernel_boot(void)
949		*lp = htonl(0x81200000 + XLM_PVR); // lzw r9,(theoritical PVR)
950
951		// Don't read SDR1
952	<	static const uint32 sdr1_ofs[] = {0x174, 0x174, 0x174, 0x17c, 0x19c};
952	>	static const uint32 sdr1_ofs[] = {0x174, 0x174, 0x174, 0x17c, 0x19c, 0x19c};
953		lp = (uint32 *)(ROM_BASE + loc + sdr1_ofs[ROMType]);
954		*lp++ = htonl(0x3d00dead); // lis r8,0xdead (pointer to page table)
955		*lp++ = htonl(0x3ec0001f); // lis r22,0x001f (size of page table)
956		*lp = htonl(POWERPC_NOP);
957
958		// Don't clear page table
959	<	static const uint32 pgtb_ofs[] = {0x198, 0x198, 0x198, 0x1a0, 0x1c4};
959	>	static const uint32 pgtb_ofs[] = {0x198, 0x198, 0x198, 0x1a0, 0x1c0, 0x1c4};
960		lp = (uint32 *)(ROM_BASE + loc + pgtb_ofs[ROMType]);
961		*lp = htonl(POWERPC_NOP);
962
963		// Don't invalidate TLB
964	<	static const uint32 tlb_ofs[] = {0x1a0, 0x1a0, 0x1a0, 0x1a8, 0x1cc};
964	>	static const uint32 tlb_ofs[] = {0x1a0, 0x1a0, 0x1a0, 0x1a8, 0x1c8, 0x1cc};
965		lp = (uint32 *)(ROM_BASE + loc + tlb_ofs[ROMType]);
966		*lp = htonl(POWERPC_NOP);
967
968		// Don't create RAM descriptor table
969	<	static const uint32 desc_ofs[] = {0x350, 0x350, 0x350, 0x358, 0x37c};
969	>	static const uint32 desc_ofs[] = {0x350, 0x350, 0x350, 0x358, 0x378, 0x37c};
970		lp = (uint32 *)(ROM_BASE + loc + desc_ofs[ROMType]);
971		*lp = htonl(POWERPC_NOP);
972
973		// Don't load SRs and BATs
974	<	static const uint32 sr_ofs[] = {0x3d8, 0x3d8, 0x3d8, 0x3e0, 0x404};
974	>	static const uint32 sr_ofs[] = {0x3d8, 0x3d8, 0x3d8, 0x3e0, 0x400, 0x404};
975		lp = (uint32 *)(ROM_BASE + loc + sr_ofs[ROMType]);
976		*lp = htonl(POWERPC_NOP);
977
978		// Don't mess with SRs
979	<	static const uint32 sr2_ofs[] = {0x312118, 0x312118, 0x312118, 0x312118, 0x3121b4};
979	>	static const uint32 sr2_ofs[] = {0x312118, 0x312118, 0x312118, 0x312118, 0x312118, 0x3121b4};
980		lp = (uint32 *)(ROM_BASE + sr2_ofs[ROMType]);
981		*lp = htonl(POWERPC_BLR);
982
983		// Don't check performance monitor
984	<	static const uint32 pm_ofs[] = {0x313148, 0x313148, 0x313148, 0x313148, 0x313218};
984	>	static const uint32 pm_ofs[] = {0x313148, 0x313148, 0x313148, 0x313148, 0x313158, 0x313218};
985		lp = (uint32 *)(ROM_BASE + pm_ofs[ROMType]);
986		while (ntohl(*lp) != 0x7e58eba6) lp++;
987		*lp++ = htonl(POWERPC_NOP);
#	Line 998 \| Line 1017 \| static bool patch_nanokernel_boot(void)
1017		*lp++ = htonl(POWERPC_NOP);
1018
1019		// Jump to 68k emulator
1020	<	static const uint32 jump68k_ofs[] = {0x40c, 0x40c, 0x40c, 0x414, 0x438};
1020	>	static const uint32 jump68k_ofs[] = {0x40c, 0x40c, 0x40c, 0x414, 0x434, 0x438};
1021		lp = (uint32 *)(ROM_BASE + loc + jump68k_ofs[ROMType]);
1022		*lp++ = htonl(0x80610634); // lwz r3,0x0634(r1) (pointer to Emulator Data)
1023		*lp++ = htonl(0x8081119c); // lwz r4,0x119c(r1) (pointer to opcode table)
#	Line 1019 \| Line 1038 \| static bool patch_68k_emul(void)
1038		uint32 base;
1039
1040		// Overwrite twi instructions
1041	<	static const uint32 twi_loc[] = {0x36e680, 0x36e6c0, 0x36e6c0, 0x36e6c0, 0x36e740};
1041	>	static const uint32 twi_loc[] = {0x36e680, 0x36e6c0, 0x36e6c0, 0x36e6c0, 0x36e740, 0x36e740};
1042		base = twi_loc[ROMType];
1043		lp = (uint32 *)(ROM_BASE + base);
1044		*lp++ = htonl(0x48000000 + 0x36f900 - base); // b 0x36f900 (Emulator start)
#	Line 1401 \| Line 1420 \| static bool patch_68k(void)
1420		lp[0x28 >> 2] = htonl(0x00000861);
1421		lp[0x58 >> 2] = htonl(0x30200000);
1422		lp[0x60 >> 2] = htonl(0x0000003d);
1423	+	} else if (ROMType == ROMTYPE_GOSSAMER) {
1424	+	base = 0x12d20;
1425	+	lp = (uint32 *)(ROM_BASE + base - 0x14);
1426	+	lp[0x00 >> 2] = htonl(ADDR_MAP_PATCH_SPACE - (base - 0x14));
1427	+	lp[0x10 >> 2] = htonl(0xcc003d11); // Make it like the PowerMac 9500 UniversalInfo
1428	+	lp[0x14 >> 2] = htonl(0x3fff0401);
1429	+	lp[0x18 >> 2] = htonl(0x0300001c);
1430	+	lp[0x1c >> 2] = htonl(0x000108c4);
1431	+	lp[0x24 >> 2] = htonl(0xc301bf26);
1432	+	lp[0x28 >> 2] = htonl(0x00000861);
1433	+	lp[0x58 >> 2] = htonl(0x30410000);
1434	+	lp[0x60 >> 2] = htonl(0x0000003d);
1435		}
1436
1437		// Construct AddrMap for NewWorld ROM
1438	<	if (ROMType == ROMTYPE_NEWWORLD \|\| ROMType == ROMTYPE_ZANZIBAR) {
1438	>	if (ROMType == ROMTYPE_NEWWORLD \|\| ROMType == ROMTYPE_ZANZIBAR \|\| ROMType == ROMTYPE_GOSSAMER) {
1439		lp = (uint32 *)(ROM_BASE + ADDR_MAP_PATCH_SPACE);
1440		memset(lp - 10, 0, 0x128);
1441		lp[-10] = htonl(0x0300001c);
#	Line 1530 \| Line 1561 \| static bool patch_68k(void)
1561		*wp++ = htons(M68K_EMUL_OP_XPRAM2);
1562		*wp = htons(0x4ed3); // jmp (a3)
1563
1564	<	static const uint32 nvram3_loc[] = {0x582f0, 0xa0a0, 0x7e50, 0xa1d0, 0};
1565	<	wp = (uint16 *)(ROM_BASE + nvram3_loc[ROMType]);
1564	>	static const uint8 nvram3_dat[] = {0x4e, 0xd3, 0x06, 0x41, 0x13, 0x00};
1565	>	if ((base = find_rom_data(0x7000, 0xb000, nvram3_dat, sizeof(nvram3_dat))) == 0) return false;
1566	>	D(bug("nvram3 %08lx\n", base));
1567	>	wp = (uint16 *)(ROM_BASE + base + 2);
1568	>	*wp++ = htons(M68K_EMUL_OP_XPRAM3);
1569	>	*wp = htons(0x4ed3); // jmp (a3)
1570	>
1571	>	static const uint32 nvram4_loc[] = {0x582f0, 0xa0a0, 0x7e50, 0xa1d0, 0x538d0, 0};
1572	>	wp = (uint16 *)(ROM_BASE + nvram4_loc[ROMType]);
1573		*wp++ = htons(0x202f); // move.l 4(sp),d0
1574		*wp++ = htons(0x0004);
1575		*wp++ = htons(M68K_EMUL_OP_NVRAM1);
#	Line 1544 \| Line 1582 \| static bool patch_68k(void)
1582		*wp = htons(0x0004);
1583		}
1584
1585	<	static const uint32 nvram4_loc[] = {0x58460, 0xa0f0, 0x7f40, 0xa220, 0};
1586	<	wp = (uint16 *)(ROM_BASE + nvram4_loc[ROMType]);
1585	>	static const uint32 nvram5_loc[] = {0x58460, 0xa0f0, 0x7f40, 0xa220, 0x53a20, 0};
1586	>	wp = (uint16 *)(ROM_BASE + nvram5_loc[ROMType]);
1587		if (ROMType == ROMTYPE_ZANZIBAR \|\| ROMType == ROMTYPE_GAZELLE) {
1588		*wp++ = htons(0x202f); // move.l 4(sp),d0
1589		*wp++ = htons(0x0004);
#	Line 1722 \| Line 1760 \| static bool patch_68k(void)
1760		if ((base = find_rom_data(0x13000, 0x20000, gc_mask2_dat, sizeof(gc_mask2_dat))) == 0) return false;
1761		D(bug("gc_mask2 %08lx\n", base));
1762		wp = (uint16 *)(ROM_BASE + base);
1763	+	if (ROMType == ROMTYPE_GOSSAMER)
1764	+	*wp++ = htons(M68K_NOP);
1765		for (int i=0; i<5; i++) {
1766		*wp++ = htons(M68K_NOP);
1767		*wp++ = htons(M68K_NOP);
#	Line 1729 \| Line 1769 \| static bool patch_68k(void)
1769		*wp++ = htons(M68K_NOP);
1770		wp += 2;
1771		}
1772	<	if (ROMType == ROMTYPE_ZANZIBAR) {
1772	>	if (ROMType == ROMTYPE_ZANZIBAR \|\| ROMType == ROMTYPE_GOSSAMER) {
1773		for (int i=0; i<6; i++) {
1774		*wp++ = htons(M68K_NOP);
1775		*wp++ = htons(M68K_NOP);
#	Line 1806 \| Line 1846 \| static bool patch_68k(void)
1846		static const uint8 tm_task_dat[] = {0x30, 0x3c, 0x4e, 0x2b, 0xa9, 0xc9};
1847		if ((base = find_rom_data(0x2e0, 0x320, tm_task_dat, sizeof(tm_task_dat))) == 0) return false;
1848		D(bug("tm_task %08lx\n", base));
1849	<	wp = (uint16 *)(ROM_BASE + base + 28);
1849	>	wp = (uint16 *)(ROM_BASE + base + 28); // FIXME: this is not right for all nw ROMs
1850		*wp++ = htons(M68K_NOP);
1851		*wp++ = htons(M68K_NOP);
1852		*wp++ = htons(M68K_NOP);
1853		*wp++ = htons(M68K_NOP);
1854		*wp++ = htons(M68K_NOP);
1855		*wp = htons(M68K_NOP);
1856	+	} else if (ROMType == ROMTYPE_GOSSAMER) {
1857	+	static const uint8 tm_task_dat[] = {0x30, 0x3c, 0x4e, 0x2b, 0xa9, 0xc9};
1858	+	if ((base = find_rom_data(0x2a0, 0x2e0, tm_task_dat, sizeof(tm_task_dat))) == 0) return false;
1859	+	D(bug("tm_task %08lx\n", base));
1860	+	wp = (uint16 *)(ROM_BASE + base + 28);
1861	+	*wp++ = htons(M68K_NOP);
1862	+	*wp++ = htons(M68K_NOP);
1863	+	*wp++ = htons(M68K_NOP);
1864		} else {
1865		static const uint8 tm_task_dat[] = {0x20, 0x3c, 0x73, 0x79, 0x73, 0x61};
1866		if ((base = find_rom_data(0x280, 0x300, tm_task_dat, sizeof(tm_task_dat))) == 0) return false;
#	Line 1824 \| Line 1872 \| static bool patch_68k(void)
1872		}
1873
1874		// Don't read PVR from 0x5fffef80 in DriverServicesLib (via 0x316)
1875	<	if (ROMType != ROMTYPE_NEWWORLD) {
1875	>	if (ROMType != ROMTYPE_NEWWORLD && ROMType != ROMTYPE_GOSSAMER) {
1876		uint32 dsl_offset = find_rom_resource(FOURCC('n','l','i','b'), -16401);
1877		if (ROMType == ROMTYPE_ZANZIBAR) {
1878		static const uint8 dsl_pvr_dat[] = {0x40, 0x82, 0x00, 0x40, 0x38, 0x60, 0xef, 0x80, 0x3c, 0x63, 0x60, 0x00, 0x80, 0x83, 0x00, 0x00, 0x54, 0x84, 0x84, 0x3e};
#	Line 1910 \| Line 1958 \| static bool patch_68k(void)
1958		D(bug("scsi_var2 %08lx\n", base));
1959		wp = (uint16 *)(ROM_BASE + base);
1960		*wp++ = htons(0x7000); // moveq #0,d0
1961	<	*wp = htons(M68K_RTS); // bra
1961	>	*wp = htons(M68K_RTS);
1962	>	}
1963	>	}
1964	>	else if (ROMType == ROMTYPE_GOSSAMER) {
1965	>	static const uint8 scsi_var_dat[] = {0x70, 0x01, 0xa0, 0x89, 0x4a, 0x6e, 0xfe, 0xac, 0x4f, 0xef, 0x00, 0x10, 0x66, 0x00};
1966	>	if ((base = find_rom_data(0x1d700, 0x1d800, scsi_var_dat, sizeof(scsi_var_dat))) != 0) {
1967	>	D(bug("scsi_var %08lx\n", base));
1968	>	wp = (uint16 *)(ROM_BASE + base + 12);
1969	>	*wp = htons(0x6000); // bra
1970	>	}
1971	>
1972	>	static const uint8 scsi_var2_dat[] = {0x4e, 0x56, 0xfc, 0x5a, 0x48, 0xe7, 0x1f, 0x38};
1973	>	if ((base = find_rom_data(0x1d900, 0x1da00, scsi_var2_dat, sizeof(scsi_var2_dat))) != 0) {
1974	>	D(bug("scsi_var2 %08lx\n", base));
1975	>	wp = (uint16 *)(ROM_BASE + base);
1976	>	*wp++ = htons(0x7000); // moveq #0,d0
1977	>	*wp = htons(M68K_RTS);
1978		}
1979		}
1980		#endif
#	Line 1966 \| Line 2030 \| static bool patch_68k(void)
2030		memcpy((void *)(ROM_BASE + sony_offset + 0x200), cdrom_driver, sizeof(cdrom_driver));
2031
2032		// Install serial drivers
2033	<	memcpy((void *)(ROM_BASE + sony_offset + 0x300), ain_driver, sizeof(ain_driver));
2034	<	memcpy((void *)(ROM_BASE + sony_offset + 0x400), aout_driver, sizeof(aout_driver));
2035	<	memcpy((void *)(ROM_BASE + sony_offset + 0x500), bin_driver, sizeof(bin_driver));
2036	<	memcpy((void *)(ROM_BASE + sony_offset + 0x600), bout_driver, sizeof(bout_driver));
2033	>	memcpy_powerpc_code((void *)(ROM_BASE + sony_offset + 0x300), ain_driver, sizeof(ain_driver));
2034	>	memcpy_powerpc_code((void *)(ROM_BASE + sony_offset + 0x400), aout_driver, sizeof(aout_driver));
2035	>	memcpy_powerpc_code((void *)(ROM_BASE + sony_offset + 0x500), bin_driver, sizeof(bin_driver));
2036	>	memcpy_powerpc_code((void *)(ROM_BASE + sony_offset + 0x600), bout_driver, sizeof(bout_driver));
2037
2038		// Copy icons to ROM
2039		SonyDiskIconAddr = ROM_BASE + sony_offset + 0x800;
#	Line 1990 \| Line 2054 \| static bool patch_68k(void)
2054		*wp = htons(M68K_RTS);
2055
2056		// Don't install serial drivers from ROM
2057	<	if (ROMType == ROMTYPE_ZANZIBAR \|\| ROMType == ROMTYPE_NEWWORLD) {
2057	>	if (ROMType == ROMTYPE_ZANZIBAR \|\| ROMType == ROMTYPE_NEWWORLD \|\| ROMType == ROMTYPE_GOSSAMER) {
2058		wp = (uint16 *)(ROM_BASE + find_rom_resource(FOURCC('S','E','R','D'), 0));
2059		*wp = htons(M68K_RTS);
2060		} else {

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Comparing SheepShaver/src/rom_patches.cpp (file contents): Revision 1.8 by gbeauche, 2003-09-28T21:27:33Z vs. Revision 1.12 by gbeauche, 2003-10-05T23:38:07Z

Diff Legend

Comparing SheepShaver/src/rom_patches.cpp (file contents):
Revision 1.8 by gbeauche, 2003-09-28T21:27:33Z vs.
Revision 1.12 by gbeauche, 2003-10-05T23:38:07Z