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root/cebix/SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.28 by gbeauche, 2004-02-16T15:34:55Z vs.
Revision 1.63 by gbeauche, 2005-06-30T09:09:59Z

#	Line 1 | Line 1
1		/*
2		*  sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface
3		*
4	<	*  SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig
4	>	*  SheepShaver (C) 1997-2005 Christian Bauer and Marc Hellwig
5		*
6		*  This program is free software; you can redistribute it and/or modify
7		*  it under the terms of the GNU General Public License as published by
#	Line 38 | Line 38
38		#include "name_registry.h"
39		#include "serial.h"
40		#include "ether.h"
41	+	#include "timer.h"
42
43		#include <stdio.h>
44	+	#include <stdlib.h>
45	+	#ifdef HAVE_MALLOC_H
46	+	#include <malloc.h>
47	+	#endif
48	+
49	+	#ifdef USE_SDL_VIDEO
50	+	#include <SDL_events.h>
51	+	#endif
52
53		#if ENABLE_MON
54		#include "mon.h"
#	Line 50 | Line 59
59		#include "debug.h"
60
61		// Emulation time statistics
62	<	#define EMUL_TIME_STATS 1
62	>	#ifndef EMUL_TIME_STATS
63	>	#define EMUL_TIME_STATS 0
64	>	#endif
65
66		#if EMUL_TIME_STATS
67		static clock_t emul_start_time;
68	<	static uint32 interrupt_count = 0;
68	>	static uint32 interrupt_count = 0, ppc_interrupt_count = 0;
69		static clock_t interrupt_time = 0;
70		static uint32 exec68k_count = 0;
71		static clock_t exec68k_time = 0;
#	Line 82 | Line 93 | extern "C" void check_load_invoc(uint32
93		// PowerPC EmulOp to exit from emulation looop
94		const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1;
95
85	–	// Enable multicore (main/interrupts) cpu emulation?
86	–	#define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0)
87	–
96		// Enable Execute68k() safety checks?
97		#define SAFE_EXEC_68K 1
98
#	Line 98 | Line 106 | const uint32 POWERPC_EXEC_RETURN = POWER
106		#define INTERRUPTS_IN_NATIVE_MODE 1
107
108		// Pointer to Kernel Data
109	<	static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE;
109	>	static KernelData * kernel_data;
110
111		// SIGSEGV handler
112	<	static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
112	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
113	>
114	>	#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
115	>	// Special trampolines for EmulOp and NativeOp
116	>	static uint8 *emul_op_trampoline;
117	>	static uint8 *native_op_trampoline;
118	>	#endif
119
120		// JIT Compiler enabled?
121		static inline bool enable_jit_p()
#	Line 136 | Line 150 | public:
150		uint32 get_xer() const          { return xer().get(); }
151		void set_xer(uint32 v)          { xer().set(v); }
152
153	+	// Execute NATIVE_OP routine
154	+	void execute_native_op(uint32 native_op);
155	+
156		// Execute EMUL_OP routine
157		void execute_emul_op(uint32 emul_op);
158
#	Line 148 | Line 165 | public:
165		// Execute MacOS/PPC code
166		uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args);
167
168	+	#if PPC_ENABLE_JIT
169		// Compile one instruction
170	<	virtual bool compile1(codegen_context_t & cg_context);
171	<
170	>	virtual int compile1(codegen_context_t & cg_context);
171	>	#endif
172		// Resource manager thunk
173		void get_resource(uint32 old_get_resource);
174
175		// Handle MacOS interrupt
176		void interrupt(uint32 entry);
159	–	void handle_interrupt();
160	–
161	–	// Lazy memory allocator (one item at a time)
162	–	void *operator new(size_t size)
163	–	{ return allocator_helper< sheepshaver_cpu, lazy_allocator >::allocate(); }
164	–	void operator delete(void *p)
165	–	{ allocator_helper< sheepshaver_cpu, lazy_allocator >::deallocate(p); }
166	–	// FIXME: really make surre array allocation fail at link time?
167	–	void *operator new[](size_t);
168	–	void operator delete[](void *p);
177
178		// Make sure the SIGSEGV handler can access CPU registers
179		friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
180	+
181	+	// Memory allocator returning areas aligned on 16-byte boundaries
182	+	void *operator new(size_t size);
183	+	void operator delete(void *p);
184		};
185
186	<	// FIXME: this specialization doesn't work with GCC
187	<	// template<> lazy_allocator< sheepshaver_cpu > allocator_helper< sheepshaver_cpu, lazy_allocator >::allocator;
188	<	template< class data_type, template< class > class allocator_type >
189	<	allocator_type< data_type > allocator_helper< data_type, allocator_type >::allocator;
186	>	// Memory allocator returning sheepshaver_cpu objects aligned on 16-byte boundaries
187	>	// FORMAT: [ alignment ] magic identifier, offset to malloc'ed data, sheepshaver_cpu data
188	>	void *sheepshaver_cpu::operator new(size_t size)
189	>	{
190	>	const int ALIGN = 16;
191	>
192	>	// Allocate enough space for sheepshaver_cpu data + signature + align pad
193	>	uint8 *ptr = (uint8 *)malloc(size + ALIGN * 2);
194	>	if (ptr == NULL)
195	>	throw std::bad_alloc();
196	>
197	>	// Align memory
198	>	int ofs = 0;
199	>	while ((((uintptr)ptr) % ALIGN) != 0)
200	>	ofs++, ptr++;
201	>
202	>	// Insert signature and offset
203	>	struct aligned_block_t {
204	>	uint32 pad[(ALIGN - 8) / 4];
205	>	uint32 signature;
206	>	uint32 offset;
207	>	uint8  data[sizeof(sheepshaver_cpu)];
208	>	};
209	>	aligned_block_t *blk = (aligned_block_t *)ptr;
210	>	blk->signature = FOURCC('S','C','P','U');
211	>	blk->offset = ofs + (&blk->data[0] - (uint8 *)blk);
212	>	assert((((uintptr)&blk->data) % ALIGN) == 0);
213	>	return &blk->data[0];
214	>	}
215	>
216	>	void sheepshaver_cpu::operator delete(void *p)
217	>	{
218	>	uint32 *blk = (uint32 *)p;
219	>	assert(blk[-2] == FOURCC('S','C','P','U'));
220	>	void *ptr = (void *)(((uintptr)p) - blk[-1]);
221	>	free(ptr);
222	>	}
223
224		sheepshaver_cpu::sheepshaver_cpu()
225		: powerpc_cpu(enable_jit_p())
#	Line 202 | Line 247 | void sheepshaver_cpu::init_decoder()
247		}
248		}
249
205	–	// Forward declaration for native opcode handler
206	–	static void NativeOp(int selector);
207	–
250		/*              NativeOp instruction format:
251	<	+------------+--------------------------+--+----------+------------+
252	<	|      6     |                          |FN|    OP    |      2     |
253	<	+------------+--------------------------+--+----------+------------+
254	<	0         5 |6                       19 20 21      25 26        31
251	>	+------------+-------------------------+--+-----------+------------+
252	>	|      6     |                         |FN|    OP     |      2     |
253	>	+------------+-------------------------+--+-----------+------------+
254	>	0         5 |6                      18 19 20      25 26        31
255		*/
256
257	<	typedef bit_field< 20, 20 > FN_field;
258	<	typedef bit_field< 21, 25 > NATIVE_OP_field;
257	>	typedef bit_field< 19, 19 > FN_field;
258	>	typedef bit_field< 20, 25 > NATIVE_OP_field;
259		typedef bit_field< 26, 31 > EMUL_OP_field;
260
261		// Execute EMUL_OP routine
#	Line 227 | Line 269 | void sheepshaver_cpu::execute_emul_op(ui
269		for (int i = 0; i < 7; i++)
270		r68.a[i] = gpr(16 + i);
271		r68.a[7] = gpr(1);
272	<	uint32 saved_cr = get_cr() & CR_field<2>::mask();
272	>	uint32 saved_cr = get_cr() & 0xff9fffff; // mask_operand::compute(11, 8)
273		uint32 saved_xer = get_xer();
274		EmulOp(&r68, gpr(24), emul_op);
275		set_cr(saved_cr);
#	Line 256 | Line 298 | void sheepshaver_cpu::execute_sheep(uint
298		break;
299
300		case 2:         // EXEC_NATIVE
301	<	NativeOp(NATIVE_OP_field::extract(opcode));
301	>	execute_native_op(NATIVE_OP_field::extract(opcode));
302		if (FN_field::test(opcode))
303		pc() = lr();
304		else
#	Line 271 | Line 313 | void sheepshaver_cpu::execute_sheep(uint
313		}
314
315		// Compile one instruction
274	–	bool sheepshaver_cpu::compile1(codegen_context_t & cg_context)
275	–	{
316		#if PPC_ENABLE_JIT
317	+	int sheepshaver_cpu::compile1(codegen_context_t & cg_context)
318	+	{
319		const instr_info_t *ii = cg_context.instr_info;
320		if (ii->mnemo != PPC_I(SHEEP))
321	<	return false;
321	>	return COMPILE_FAILURE;
322
323	<	bool compiled = false;
323	>	int status = COMPILE_FAILURE;
324		powerpc_dyngen & dg = cg_context.codegen;
325		uint32 opcode = cg_context.opcode;
326
327		switch (opcode & 0x3f) {
328		case 0:         // EMUL_RETURN
329		dg.gen_invoke(QuitEmulator);
330	<	compiled = true;
330	>	status = COMPILE_CODE_OK;
331		break;
332
333		case 1:         // EXEC_RETURN
334		dg.gen_spcflags_set(SPCFLAG_CPU_EXEC_RETURN);
335	<	compiled = true;
335	>	// Don't check for pending interrupts, we do know we have to
336	>	// get out of this block ASAP
337	>	dg.gen_exec_return();
338	>	status = COMPILE_EPILOGUE_OK;
339		break;
340
341		case 2: {       // EXEC_NATIVE
342		uint32 selector = NATIVE_OP_field::extract(opcode);
343		switch (selector) {
344	+	#if !PPC_REENTRANT_JIT
345	+	// Filter out functions that may invoke Execute68k() or
346	+	// CallMacOS(), this would break reentrancy as they could
347	+	// invalidate the translation cache and even overwrite
348	+	// continuation code when we are done with them.
349		case NATIVE_PATCH_NAME_REGISTRY:
350		dg.gen_invoke(DoPatchNameRegistry);
351	<	compiled = true;
351	>	status = COMPILE_CODE_OK;
352		break;
353		case NATIVE_VIDEO_INSTALL_ACCEL:
354		dg.gen_invoke(VideoInstallAccel);
355	<	compiled = true;
355	>	status = COMPILE_CODE_OK;
356		break;
357		case NATIVE_VIDEO_VBL:
358		dg.gen_invoke(VideoVBL);
359	<	compiled = true;
359	>	status = COMPILE_CODE_OK;
360		break;
361		case NATIVE_GET_RESOURCE:
362		case NATIVE_GET_1_RESOURCE:
#	Line 324 | Line 374 | bool sheepshaver_cpu::compile1(codegen_c
374		typedef void (*func_t)(dyngen_cpu_base, uint32);
375		func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::get_resource).ptr();
376		dg.gen_invoke_CPU_im(func, old_get_resource);
377	<	compiled = true;
377	>	status = COMPILE_CODE_OK;
378		break;
379		}
330	–	case NATIVE_DISABLE_INTERRUPT:
331	–	dg.gen_invoke(DisableInterrupt);
332	–	compiled = true;
333	–	break;
334	–	case NATIVE_ENABLE_INTERRUPT:
335	–	dg.gen_invoke(EnableInterrupt);
336	–	compiled = true;
337	–	break;
380		case NATIVE_CHECK_LOAD_INVOC:
381		dg.gen_load_T0_GPR(3);
382		dg.gen_load_T1_GPR(4);
383		dg.gen_se_16_32_T1();
384		dg.gen_load_T2_GPR(5);
385		dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))check_load_invoc);
386	<	compiled = true;
386	>	status = COMPILE_CODE_OK;
387	>	break;
388	>	#endif
389	>	case NATIVE_BITBLT:
390	>	dg.gen_load_T0_GPR(3);
391	>	dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt);
392	>	status = COMPILE_CODE_OK;
393	>	break;
394	>	case NATIVE_INVRECT:
395	>	dg.gen_load_T0_GPR(3);
396	>	dg.gen_invoke_T0((void (*)(uint32))NQD_invrect);
397	>	status = COMPILE_CODE_OK;
398	>	break;
399	>	case NATIVE_FILLRECT:
400	>	dg.gen_load_T0_GPR(3);
401	>	dg.gen_invoke_T0((void (*)(uint32))NQD_fillrect);
402	>	status = COMPILE_CODE_OK;
403		break;
404		}
405	<	if (FN_field::test(opcode)) {
406	<	if (compiled) {
405	>	// Could we fully translate this NativeOp?
406	>	if (status == COMPILE_CODE_OK) {
407	>	if (!FN_field::test(opcode))
408	>	cg_context.done_compile = false;
409	>	else {
410		dg.gen_load_A0_LR();
411		dg.gen_set_PC_A0();
412	+	cg_context.done_compile = true;
413		}
414	<	cg_context.done_compile = true;
414	>	break;
415		}
416	<	else
416	>	#if PPC_REENTRANT_JIT
417	>	// Try to execute NativeOp trampoline
418	>	if (!FN_field::test(opcode))
419	>	dg.gen_set_PC_im(cg_context.pc + 4);
420	>	else {
421	>	dg.gen_load_A0_LR();
422	>	dg.gen_set_PC_A0();
423	>	}
424	>	dg.gen_mov_32_T0_im(selector);
425	>	dg.gen_jmp(native_op_trampoline);
426	>	cg_context.done_compile = true;
427	>	status = COMPILE_EPILOGUE_OK;
428	>	break;
429	>	#endif
430	>	// Invoke NativeOp handler
431	>	if (!FN_field::test(opcode)) {
432	>	typedef void (*func_t)(dyngen_cpu_base, uint32);
433	>	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
434	>	dg.gen_invoke_CPU_im(func, selector);
435		cg_context.done_compile = false;
436	+	status = COMPILE_CODE_OK;
437	+	}
438	+	// Otherwise, let it generate a call to execute_sheep() which
439	+	// will cause necessary updates to the program counter
440		break;
441		}
442
443		default: {      // EMUL_OP
444	+	uint32 emul_op = EMUL_OP_field::extract(opcode) - 3;
445	+	#if PPC_REENTRANT_JIT
446	+	// Try to execute EmulOp trampoline
447	+	dg.gen_set_PC_im(cg_context.pc + 4);
448	+	dg.gen_mov_32_T0_im(emul_op);
449	+	dg.gen_jmp(emul_op_trampoline);
450	+	cg_context.done_compile = true;
451	+	status = COMPILE_EPILOGUE_OK;
452	+	break;
453	+	#endif
454	+	// Invoke EmulOp handler
455		typedef void (*func_t)(dyngen_cpu_base, uint32);
456		func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr();
457	<	dg.gen_invoke_CPU_im(func, EMUL_OP_field::extract(opcode) - 3);
457	>	dg.gen_invoke_CPU_im(func, emul_op);
458		cg_context.done_compile = false;
459	<	compiled = true;
459	>	status = COMPILE_CODE_OK;
460		break;
461		}
462		}
463	<	return compiled;
369	<	#endif
370	<	return false;
463	>	return status;
464		}
465	+	#endif
466
467		// Handle MacOS interrupt
468		void sheepshaver_cpu::interrupt(uint32 entry)
469		{
470		#if EMUL_TIME_STATS
471	<	interrupt_count++;
471	>	ppc_interrupt_count++;
472		const clock_t interrupt_start = clock();
473		#endif
474
381	–	#if !MULTICORE_CPU
475		// Save program counters and branch registers
476		uint32 saved_pc = pc();
477		uint32 saved_lr = lr();
478		uint32 saved_ctr= ctr();
479		uint32 saved_sp = gpr(1);
387	–	#endif
480
481		// Initialize stack pointer to SheepShaver alternate stack base
482		gpr(1) = SignalStackBase() - 64;
#	Line 424 | Line 516 | void sheepshaver_cpu::interrupt(uint32 e
516		// Enter nanokernel
517		execute(entry);
518
427	–	#if !MULTICORE_CPU
519		// Restore program counters and branch registers
520		pc() = saved_pc;
521		lr() = saved_lr;
522		ctr()= saved_ctr;
523		gpr(1) = saved_sp;
433	–	#endif
524
525		#if EMUL_TIME_STATS
526		interrupt_time += (clock() - interrupt_start);
#	Line 628 | Line 718 | inline void sheepshaver_cpu::get_resourc
718		*              SheepShaver CPU engine interface
719		**/
720
721	<	static sheepshaver_cpu *main_cpu = NULL;                // CPU emulator to handle usual control flow
722	<	static sheepshaver_cpu *interrupt_cpu = NULL;   // CPU emulator to handle interrupts
633	<	static sheepshaver_cpu *current_cpu = NULL;             // Current CPU emulator context
721	>	// PowerPC CPU emulator
722	>	static sheepshaver_cpu *ppc_cpu = NULL;
723
724		void FlushCodeCache(uintptr start, uintptr end)
725		{
726		D(bug("FlushCodeCache(%08x, %08x)\n", start, end));
727	<	main_cpu->invalidate_cache_range(start, end);
639	<	#if MULTICORE_CPU
640	<	interrupt_cpu->invalidate_cache_range(start, end);
641	<	#endif
642	<	}
643	<
644	<	static inline void cpu_push(sheepshaver_cpu *new_cpu)
645	<	{
646	<	#if MULTICORE_CPU
647	<	current_cpu = new_cpu;
648	<	#endif
649	<	}
650	<
651	<	static inline void cpu_pop()
652	<	{
653	<	#if MULTICORE_CPU
654	<	current_cpu = main_cpu;
655	<	#endif
727	>	ppc_cpu->invalidate_cache_range(start, end);
728		}
729
730		// Dump PPC registers
731		static void dump_registers(void)
732		{
733	<	current_cpu->dump_registers();
733	>	ppc_cpu->dump_registers();
734		}
735
736		// Dump log
737		static void dump_log(void)
738		{
739	<	current_cpu->dump_log();
739	>	ppc_cpu->dump_log();
740		}
741
742		/*
743		*  Initialize CPU emulation
744		*/
745
746	<	static sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
746	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
747		{
748		#if ENABLE_VOSF
749		// Handle screen fault
#	Line 683 | Line 755 | static sigsegv_return_t sigsegv_handler(
755		const uintptr addr = (uintptr)fault_address;
756		#if HAVE_SIGSEGV_SKIP_INSTRUCTION
757		// Ignore writes to ROM
758	<	if ((addr - ROM_BASE) < ROM_SIZE)
758	>	if ((addr - (uintptr)ROMBaseHost) < ROM_SIZE)
759		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
760
761		// Get program counter of target CPU
762	<	sheepshaver_cpu * const cpu = current_cpu;
762	>	sheepshaver_cpu * const cpu = ppc_cpu;
763		const uint32 pc = cpu->pc();
764
765		// Fault in Mac ROM or RAM?
766	<	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize));
766	>	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize)) || (pc >= DR_CACHE_BASE && pc < (DR_CACHE_BASE + DR_CACHE_SIZE));
767		if (mac_fault) {
768
769		// "VM settings" during MacOS 8 installation
#	Line 711 | Line 783 | static sigsegv_return_t sigsegv_handler(
783		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
784		else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
785		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
786	+
787	+	// MacOS 8.6 serial drivers on startup (with DR Cache and OldWorld ROM)
788	+	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(16) == 0xf3012002 || cpu->gpr(16) == 0xf3012000))
789	+	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
790	+	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
791	+	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
792	+
793	+	// Ignore writes to the zero page
794	+	else if ((uint32)(addr - SheepMem::ZeroPage()) < (uint32)SheepMem::PageSize())
795	+	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
796
797		// Ignore all other faults, if requested
798		if (PrefsFindBool("ignoresegv"))
#	Line 720 | Line 802 | static sigsegv_return_t sigsegv_handler(
802		#error "FIXME: You don't have the capability to skip instruction within signal handlers"
803		#endif
804
805	<	printf("SIGSEGV\n");
806	<	printf("  pc %p\n", fault_instruction);
807	<	printf("  ea %p\n", fault_address);
726	<	printf(" cpu %s\n", current_cpu == main_cpu ? "main" : "interrupts");
805	>	fprintf(stderr, "SIGSEGV\n");
806	>	fprintf(stderr, "  pc %p\n", fault_instruction);
807	>	fprintf(stderr, "  ea %p\n", fault_address);
808		dump_registers();
809	<	current_cpu->dump_log();
809	>	ppc_cpu->dump_log();
810		enter_mon();
811		QuitEmulator();
812
#	Line 734 | Line 815 | static sigsegv_return_t sigsegv_handler(
815
816		void init_emul_ppc(void)
817		{
818	+	// Get pointer to KernelData in host address space
819	+	kernel_data = (KernelData *)Mac2HostAddr(KERNEL_DATA_BASE);
820	+
821		// Initialize main CPU emulator
822	<	main_cpu = new sheepshaver_cpu();
823	<	main_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
824	<	main_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
822	>	ppc_cpu = new sheepshaver_cpu();
823	>	ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
824	>	ppc_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
825		WriteMacInt32(XLM_RUN_MODE, MODE_68K);
826
743	–	#if MULTICORE_CPU
744	–	// Initialize alternate CPU emulator to handle interrupts
745	–	interrupt_cpu = new sheepshaver_cpu();
746	–	#endif
747	–
748	–	// Install the handler for SIGSEGV
749	–	sigsegv_install_handler(sigsegv_handler);
750	–
827		#if ENABLE_MON
828		// Install "regs" command in cxmon
829		mon_add_command("regs", dump_registers, "regs                     Dump PowerPC registers\n");
#	Line 773 | Line 849 | void exit_emul_ppc(void)
849		printf("Total emulation time : %.1f sec\n", double(emul_time) / double(CLOCKS_PER_SEC));
850		printf("Total interrupt count: %d (%2.1f Hz)\n", interrupt_count,
851		(double(interrupt_count) * CLOCKS_PER_SEC) / double(emul_time));
852	+	printf("Total ppc interrupt count: %d (%2.1f %%)\n", ppc_interrupt_count,
853	+	(double(ppc_interrupt_count) * 100.0) / double(interrupt_count));
854
855		#define PRINT_STATS(LABEL, VAR_PREFIX) do {                                                             \
856		printf("Total " LABEL " count : %d\n", VAR_PREFIX##_count);             \
#	Line 789 | Line 867 | void exit_emul_ppc(void)
867		printf("\n");
868		#endif
869
870	<	delete main_cpu;
793	<	#if MULTICORE_CPU
794	<	delete interrupt_cpu;
795	<	#endif
870	>	delete ppc_cpu;
871		}
872
873	+	#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
874	+	// Initialize EmulOp trampolines
875	+	void init_emul_op_trampolines(basic_dyngen & dg)
876	+	{
877	+	typedef void (*func_t)(dyngen_cpu_base, uint32);
878	+	func_t func;
879	+
880	+	// EmulOp
881	+	emul_op_trampoline = dg.gen_start();
882	+	func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr();
883	+	dg.gen_invoke_CPU_T0(func);
884	+	dg.gen_exec_return();
885	+	dg.gen_end();
886	+
887	+	// NativeOp
888	+	native_op_trampoline = dg.gen_start();
889	+	func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
890	+	dg.gen_invoke_CPU_T0(func);
891	+	dg.gen_exec_return();
892	+	dg.gen_end();
893	+
894	+	D(bug("EmulOp trampoline:   %p\n", emul_op_trampoline));
895	+	D(bug("NativeOp trampoline: %p\n", native_op_trampoline));
896	+	}
897	+	#endif
898	+
899		/*
900		*  Emulation loop
901		*/
902
903		void emul_ppc(uint32 entry)
904		{
804	–	current_cpu = main_cpu;
905		#if 0
906	<	current_cpu->start_log();
906	>	ppc_cpu->start_log();
907		#endif
908		// start emulation loop and enable code translation or caching
909	<	current_cpu->execute(entry);
909	>	ppc_cpu->execute(entry);
910		}
911
912		/*
913		*  Handle PowerPC interrupt
914		*/
915
816	–	#if ASYNC_IRQ
817	–	void HandleInterrupt(void)
818	–	{
819	–	main_cpu->handle_interrupt();
820	–	}
821	–	#else
916		void TriggerInterrupt(void)
917		{
918		#if 0
919		WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1);
920		#else
921		// Trigger interrupt to main cpu only
922	<	if (main_cpu)
923	<	main_cpu->trigger_interrupt();
922	>	if (ppc_cpu)
923	>	ppc_cpu->trigger_interrupt();
924		#endif
925		}
832	–	#endif
926
927	<	void sheepshaver_cpu::handle_interrupt(void)
927	>	void HandleInterrupt(powerpc_registers *r)
928		{
929	<	// Do nothing if interrupts are disabled
930	<	if (*(int32 *)XLM_IRQ_NEST > 0)
931	<	return;
929	>	#ifdef USE_SDL_VIDEO
930	>	// We must fill in the events queue in the same thread that did call SDL_SetVideoMode()
931	>	SDL_PumpEvents();
932	>	#endif
933
934	<	// Do nothing if there is no interrupt pending
935	<	if (InterruptFlags == 0)
934	>	// Do nothing if interrupts are disabled
935	>	if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0)
936		return;
937
938	<	// Disable MacOS stack sniffer
939	<	WriteMacInt32(0x110, 0);
938	>	// Update interrupt count
939	>	#if EMUL_TIME_STATS
940	>	interrupt_count++;
941	>	#endif
942
943		// Interrupt action depends on current run mode
944		switch (ReadMacInt32(XLM_RUN_MODE)) {
945		case MODE_68K:
946		// 68k emulator active, trigger 68k interrupt level 1
851	–	assert(current_cpu == main_cpu);
947		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
948	<	set_cr(get_cr() | tswap32(kernel_data->v[0x674 >> 2]));
948	>	r->cr.set(r->cr.get() | tswap32(kernel_data->v[0x674 >> 2]));
949		break;
950
951		#if INTERRUPTS_IN_NATIVE_MODE
952		case MODE_NATIVE:
953		// 68k emulator inactive, in nanokernel?
954	<	assert(current_cpu == main_cpu);
955	<	if (gpr(1) != KernelDataAddr) {
954	>	if (r->gpr[1] != KernelDataAddr) {
955	>
956		// Prepare for 68k interrupt level 1
957		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
958		WriteMacInt32(tswap32(kernel_data->v[0x658 >> 2]) + 0xdc,
#	Line 866 | Line 961 | void sheepshaver_cpu::handle_interrupt(v
961
962		// Execute nanokernel interrupt routine (this will activate the 68k emulator)
963		DisableInterrupt();
869	–	cpu_push(interrupt_cpu);
964		if (ROMType == ROMTYPE_NEWWORLD)
965	<	current_cpu->interrupt(ROM_BASE + 0x312b1c);
965	>	ppc_cpu->interrupt(ROM_BASE + 0x312b1c);
966		else
967	<	current_cpu->interrupt(ROM_BASE + 0x312a3c);
874	<	cpu_pop();
967	>	ppc_cpu->interrupt(ROM_BASE + 0x312a3c);
968		}
969		break;
970		#endif
#	Line 880 | Line 973 | void sheepshaver_cpu::handle_interrupt(v
973		case MODE_EMUL_OP:
974		// 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0
975		if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) {
976	+	#if EMUL_TIME_STATS
977	+	const clock_t interrupt_start = clock();
978	+	#endif
979		#if 1
980		// Execute full 68k interrupt routine
981		M68kRegisters r;
982		uint32 old_r25 = ReadMacInt32(XLM_68K_R25);     // Save interrupt level
983		WriteMacInt32(XLM_68K_R25, 0x21);                       // Execute with interrupt level 1
984	<	static const uint8 proc[] = {
984	>	static const uint8 proc_template[] = {
985		0x3f, 0x3c, 0x00, 0x00,                 // move.w       #$0000,-(sp)    (fake format word)
986		0x48, 0x7a, 0x00, 0x0a,                 // pea          @1(pc)                  (return address)
987		0x40, 0xe7,                                             // move         sr,-(sp)                (saved SR)
#	Line 893 | Line 989 | void sheepshaver_cpu::handle_interrupt(v
989		0x4e, 0xd0,                                             // jmp          (a0)
990		M68K_RTS >> 8, M68K_RTS & 0xff  // @1
991		};
992	<	Execute68k((uint32)proc, &r);
992	>	BUILD_SHEEPSHAVER_PROCEDURE(proc);
993	>	Execute68k(proc, &r);
994		WriteMacInt32(XLM_68K_R25, old_r25);            // Restore interrupt level
995		#else
996		// Only update cursor
#	Line 905 | Line 1002 | void sheepshaver_cpu::handle_interrupt(v
1002		}
1003		}
1004		#endif
1005	+	#if EMUL_TIME_STATS
1006	+	interrupt_time += (clock() - interrupt_start);
1007	+	#endif
1008		}
1009		break;
1010		#endif
#	Line 917 | Line 1017 | static void get_ind_resource(void);
1017		static void get_1_ind_resource(void);
1018		static void r_get_resource(void);
1019
1020	<	#define GPR(REG) current_cpu->gpr(REG)
1021	<
922	<	static void NativeOp(int selector)
1020	>	// Execute NATIVE_OP routine
1021	>	void sheepshaver_cpu::execute_native_op(uint32 selector)
1022		{
1023		#if EMUL_TIME_STATS
1024		native_exec_count++;
#	Line 937 | Line 1036 | static void NativeOp(int selector)
1036		VideoVBL();
1037		break;
1038		case NATIVE_VIDEO_DO_DRIVER_IO:
1039	<	GPR(3) = (int32)(int16)VideoDoDriverIO((void *)GPR(3), (void *)GPR(4),
941	<	(void *)GPR(5), GPR(6), GPR(7));
1039	>	gpr(3) = (int32)(int16)VideoDoDriverIO(gpr(3), gpr(4), gpr(5), gpr(6), gpr(7));
1040		break;
943	–	#ifdef WORDS_BIGENDIAN
1041		case NATIVE_ETHER_IRQ:
1042		EtherIRQ();
1043		break;
1044		case NATIVE_ETHER_INIT:
1045	<	GPR(3) = InitStreamModule((void *)GPR(3));
1045	>	gpr(3) = InitStreamModule((void *)gpr(3));
1046		break;
1047		case NATIVE_ETHER_TERM:
1048		TerminateStreamModule();
1049		break;
1050		case NATIVE_ETHER_OPEN:
1051	<	GPR(3) = ether_open((queue_t *)GPR(3), (void *)GPR(4), GPR(5), GPR(6), (void*)GPR(7));
1051	>	gpr(3) = ether_open((queue_t *)gpr(3), (void *)gpr(4), gpr(5), gpr(6), (void*)gpr(7));
1052		break;
1053		case NATIVE_ETHER_CLOSE:
1054	<	GPR(3) = ether_close((queue_t *)GPR(3), GPR(4), (void *)GPR(5));
1054	>	gpr(3) = ether_close((queue_t *)gpr(3), gpr(4), (void *)gpr(5));
1055		break;
1056		case NATIVE_ETHER_WPUT:
1057	<	GPR(3) = ether_wput((queue_t *)GPR(3), (mblk_t *)GPR(4));
1057	>	gpr(3) = ether_wput((queue_t *)gpr(3), (mblk_t *)gpr(4));
1058		break;
1059		case NATIVE_ETHER_RSRV:
1060	<	GPR(3) = ether_rsrv((queue_t *)GPR(3));
1060	>	gpr(3) = ether_rsrv((queue_t *)gpr(3));
1061		break;
1062	<	#else
1063	<	case NATIVE_ETHER_INIT:
1064	<	// FIXME: needs more complicated thunks
1065	<	GPR(3) = false;
1062	>	case NATIVE_SYNC_HOOK:
1063	>	gpr(3) = NQD_sync_hook(gpr(3));
1064	>	break;
1065	>	case NATIVE_BITBLT_HOOK:
1066	>	gpr(3) = NQD_bitblt_hook(gpr(3));
1067	>	break;
1068	>	case NATIVE_BITBLT:
1069	>	NQD_bitblt(gpr(3));
1070	>	break;
1071	>	case NATIVE_FILLRECT_HOOK:
1072	>	gpr(3) = NQD_fillrect_hook(gpr(3));
1073	>	break;
1074	>	case NATIVE_INVRECT:
1075	>	NQD_invrect(gpr(3));
1076	>	break;
1077	>	case NATIVE_FILLRECT:
1078	>	NQD_fillrect(gpr(3));
1079		break;
970	–	#endif
1080		case NATIVE_SERIAL_NOTHING:
1081		case NATIVE_SERIAL_OPEN:
1082		case NATIVE_SERIAL_PRIME_IN:
#	Line 985 | Line 1094 | static void NativeOp(int selector)
1094		SerialStatus,
1095		SerialClose
1096		};
1097	<	GPR(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](GPR(3), GPR(4));
1097	>	gpr(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](gpr(3), gpr(4));
1098		break;
1099		}
1100		case NATIVE_GET_RESOURCE:
#	Line 995 | Line 1104 | static void NativeOp(int selector)
1104		case NATIVE_R_GET_RESOURCE: {
1105		typedef void (*GetResourceCallback)(void);
1106		static const GetResourceCallback get_resource_callbacks[] = {
1107	<	get_resource,
1108	<	get_1_resource,
1109	<	get_ind_resource,
1110	<	get_1_ind_resource,
1111	<	r_get_resource
1107	>	::get_resource,
1108	>	::get_1_resource,
1109	>	::get_ind_resource,
1110	>	::get_1_ind_resource,
1111	>	::r_get_resource
1112		};
1113		get_resource_callbacks[selector - NATIVE_GET_RESOURCE]();
1114		break;
1115		}
1007	–	case NATIVE_DISABLE_INTERRUPT:
1008	–	DisableInterrupt();
1009	–	break;
1010	–	case NATIVE_ENABLE_INTERRUPT:
1011	–	EnableInterrupt();
1012	–	break;
1116		case NATIVE_MAKE_EXECUTABLE:
1117	<	MakeExecutable(0, (void *)GPR(4), GPR(5));
1117	>	MakeExecutable(0, gpr(4), gpr(5));
1118		break;
1119		case NATIVE_CHECK_LOAD_INVOC:
1120	<	check_load_invoc(GPR(3), GPR(4), GPR(5));
1120	>	check_load_invoc(gpr(3), gpr(4), gpr(5));
1121		break;
1122		default:
1123		printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector);
#	Line 1035 | Line 1138 | static void NativeOp(int selector)
1138
1139		void Execute68k(uint32 pc, M68kRegisters *r)
1140		{
1141	<	current_cpu->execute_68k(pc, r);
1141	>	ppc_cpu->execute_68k(pc, r);
1142		}
1143
1144		/*
#	Line 1058 | Line 1161 | void Execute68kTrap(uint16 trap, M68kReg
1161
1162		uint32 call_macos(uint32 tvect)
1163		{
1164	<	return current_cpu->execute_macos_code(tvect, 0, NULL);
1164	>	return ppc_cpu->execute_macos_code(tvect, 0, NULL);
1165		}
1166
1167		uint32 call_macos1(uint32 tvect, uint32 arg1)
1168		{
1169		const uint32 args[] = { arg1 };
1170	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1170	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1171		}
1172
1173		uint32 call_macos2(uint32 tvect, uint32 arg1, uint32 arg2)
1174		{
1175		const uint32 args[] = { arg1, arg2 };
1176	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1176	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1177		}
1178
1179		uint32 call_macos3(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3)
1180		{
1181		const uint32 args[] = { arg1, arg2, arg3 };
1182	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1182	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1183		}
1184
1185		uint32 call_macos4(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4)
1186		{
1187		const uint32 args[] = { arg1, arg2, arg3, arg4 };
1188	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1188	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1189		}
1190
1191		uint32 call_macos5(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5)
1192		{
1193		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5 };
1194	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1194	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1195		}
1196
1197		uint32 call_macos6(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6)
1198		{
1199		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6 };
1200	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1200	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1201		}
1202
1203		uint32 call_macos7(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6, uint32 arg7)
1204		{
1205		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6, arg7 };
1206	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1206	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1207		}
1208
1209		/*
#	Line 1109 | Line 1212 | uint32 call_macos7(uint32 tvect, uint32
1212
1213		void get_resource(void)
1214		{
1215	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1215	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1216		}
1217
1218		void get_1_resource(void)
1219		{
1220	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1220	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1221		}
1222
1223		void get_ind_resource(void)
1224		{
1225	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1225	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1226		}
1227
1228		void get_1_ind_resource(void)
1229		{
1230	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1230	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1231		}
1232
1233		void r_get_resource(void)
1234		{
1235	<	current_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1235	>	ppc_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1236		}

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