[ViewVC] Diff of: cebix/SheepShaver/src/kpx_cpu/sheepshaver

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.40 by gbeauche, 2004-05-20T11:47:27Z vs.
Revision 1.59 by gbeauche, 2005-03-05T18:33:30Z

#	Line 1 \| Line 1
1		/*
2		* sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface
3		*
4	<	* SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig
4	>	* SheepShaver (C) 1997-2005 Christian Bauer and Marc Hellwig
5		*
6		* This program is free software; you can redistribute it and/or modify
7		* it under the terms of the GNU General Public License as published by
#	Line 42 \| Line 42
42
43		#include <stdio.h>
44		#include <stdlib.h>
45	+	#ifdef HAVE_MALLOC_H
46	+	#include <malloc.h>
47	+	#endif
48	+
49	+	#ifdef USE_SDL_VIDEO
50	+	#include <SDL_events.h>
51	+	#endif
52
53		#if ENABLE_MON
54		#include "mon.h"
#	Line 52 \| Line 59
59		#include "debug.h"
60
61		// Emulation time statistics
62	<	#define EMUL_TIME_STATS 1
62	>	#ifndef EMUL_TIME_STATS
63	>	#define EMUL_TIME_STATS 0
64	>	#endif
65
66		#if EMUL_TIME_STATS
67		static clock_t emul_start_time;
68	<	static uint32 interrupt_count = 0;
68	>	static uint32 interrupt_count = 0, ppc_interrupt_count = 0;
69		static clock_t interrupt_time = 0;
70		static uint32 exec68k_count = 0;
71		static clock_t exec68k_time = 0;
#	Line 84 \| Line 93 \| extern "C" void check_load_invoc(uint32
93		// PowerPC EmulOp to exit from emulation looop
94		const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP \| 1;
95
87	–	// Enable multicore (main/interrupts) cpu emulation?
88	–	#define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0)
89	–
90	–	// Enable interrupt routine safety checks?
91	–	#define SAFE_INTERRUPT_PPC 1
92	–
96		// Enable Execute68k() safety checks?
97		#define SAFE_EXEC_68K 1
98
#	Line 102 \| Line 105 \| const uint32 POWERPC_EXEC_RETURN = POWER
105		// Interrupts in native mode?
106		#define INTERRUPTS_IN_NATIVE_MODE 1
107
105	–	// Enable native EMUL_OPs to be run without a mode switch
106	–	#define ENABLE_NATIVE_EMUL_OP 1
107	–
108		// Pointer to Kernel Data
109	<	static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE;
109	>	static KernelData * kernel_data;
110
111		// SIGSEGV handler
112	<	static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
112	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
113
114		#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
115		// Special trampolines for EmulOp and NativeOp
#	Line 139 \| Line 139 \| class sheepshaver_cpu
139		void init_decoder();
140		void execute_sheep(uint32 opcode);
141
142	–	// Filter out EMUL_OP routines that only call native code
143	–	bool filter_execute_emul_op(uint32 emul_op);
144	–
145	–	// "Native" EMUL_OP routines
146	–	void execute_emul_op_microseconds();
147	–	void execute_emul_op_idle_time_1();
148	–	void execute_emul_op_idle_time_2();
149	–
150	–	// CPU context to preserve on interrupt
151	–	class interrupt_context {
152	–	uint32 gpr[32];
153	–	uint32 pc;
154	–	uint32 lr;
155	–	uint32 ctr;
156	–	uint32 cr;
157	–	uint32 xer;
158	–	sheepshaver_cpu *cpu;
159	–	const char *where;
160	–	public:
161	–	interrupt_context(sheepshaver_cpu _cpu, const char _where);
162	–	~interrupt_context();
163	–	};
164	–
142		public:
143
144		// Constructor
#	Line 188 \| Line 165 \| public:
165		// Execute MacOS/PPC code
166		uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args);
167
168	+	#if PPC_ENABLE_JIT
169		// Compile one instruction
170		virtual int compile1(codegen_context_t & cg_context);
171	<
171	>	#endif
172		// Resource manager thunk
173		void get_resource(uint32 old_get_resource);
174
175		// Handle MacOS interrupt
176		void interrupt(uint32 entry);
199	–	void handle_interrupt();
177
178		// Make sure the SIGSEGV handler can access CPU registers
179		friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
180	+
181	+	// Memory allocator returning areas aligned on 16-byte boundaries
182	+	void *operator new(size_t size);
183	+	void operator delete(void *p);
184		};
185
186		// Memory allocator returning areas aligned on 16-byte boundaries
187	<	void *operator new(size_t size)
187	>	void *sheepshaver_cpu::operator new(size_t size)
188		{
189		void *p;
190
#	Line 222 \| Line 203 \| *void operator new(size_t size)**
203		return p;
204		}
205
206	<	void operator delete(void *p)
206	>	void sheepshaver_cpu::operator delete(void *p)
207		{
208		#if defined(HAVE_MEMALIGN) \|\| defined(HAVE_VALLOC)
209		#if defined(__GLIBC__)
#	Line 271 \| Line 252 \| typedef bit_field< 19, 19 > FN_field;
252		typedef bit_field< 20, 25 > NATIVE_OP_field;
253		typedef bit_field< 26, 31 > EMUL_OP_field;
254
274	–	// "Native" EMUL_OP routines
275	–	#define GPR_A(REG) gpr(16 + (REG))
276	–	#define GPR_D(REG) gpr( 8 + (REG))
277	–
278	–	void sheepshaver_cpu::execute_emul_op_microseconds()
279	–	{
280	–	Microseconds(GPR_A(0), GPR_D(0));
281	–	}
282	–
283	–	void sheepshaver_cpu::execute_emul_op_idle_time_1()
284	–	{
285	–	// Sleep if no events pending
286	–	if (ReadMacInt32(0x14c) == 0)
287	–	Delay_usec(16667);
288	–	GPR_A(0) = ReadMacInt32(0x2b6);
289	–	}
290	–
291	–	void sheepshaver_cpu::execute_emul_op_idle_time_2()
292	–	{
293	–	// Sleep if no events pending
294	–	if (ReadMacInt32(0x14c) == 0)
295	–	Delay_usec(16667);
296	–	GPR_D(0) = (uint32)-2;
297	–	}
298	–
299	–	// Filter out EMUL_OP routines that only call native code
300	–	bool sheepshaver_cpu::filter_execute_emul_op(uint32 emul_op)
301	–	{
302	–	switch (emul_op) {
303	–	case OP_MICROSECONDS:
304	–	execute_emul_op_microseconds();
305	–	return true;
306	–	case OP_IDLE_TIME:
307	–	execute_emul_op_idle_time_1();
308	–	return true;
309	–	case OP_IDLE_TIME_2:
310	–	execute_emul_op_idle_time_2();
311	–	return true;
312	–	}
313	–	return false;
314	–	}
315	–
255		// Execute EMUL_OP routine
256		void sheepshaver_cpu::execute_emul_op(uint32 emul_op)
257		{
319	–	#if ENABLE_NATIVE_EMUL_OP
320	–	// First, filter out EMUL_OPs that can be executed without a mode switch
321	–	if (filter_execute_emul_op(emul_op))
322	–	return;
323	–	#endif
324	–
258		M68kRegisters r68;
259		WriteMacInt32(XLM_68K_R25, gpr(25));
260		WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
#	Line 374 \| Line 307 \| void sheepshaver_cpu::execute_sheep(uint
307		}
308
309		// Compile one instruction
310	+	#if PPC_ENABLE_JIT
311		int sheepshaver_cpu::compile1(codegen_context_t & cg_context)
312		{
379	–	#if PPC_ENABLE_JIT
313		const instr_info_t *ii = cg_context.instr_info;
314		if (ii->mnemo != PPC_I(SHEEP))
315		return COMPILE_FAILURE;
#	Line 447 \| Line 380 \| int sheepshaver_cpu::compile1(codegen_co
380		status = COMPILE_CODE_OK;
381		break;
382		#endif
450	–	case NATIVE_DISABLE_INTERRUPT:
451	–	dg.gen_invoke(DisableInterrupt);
452	–	status = COMPILE_CODE_OK;
453	–	break;
454	–	case NATIVE_ENABLE_INTERRUPT:
455	–	dg.gen_invoke(EnableInterrupt);
456	–	status = COMPILE_CODE_OK;
457	–	break;
383		case NATIVE_BITBLT:
384		dg.gen_load_T0_GPR(3);
385		dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt);
#	Line 472 \| Line 397 \| int sheepshaver_cpu::compile1(codegen_co
397		break;
398		}
399		// Could we fully translate this NativeOp?
400	<	if (FN_field::test(opcode)) {
401	<	if (status != COMPILE_FAILURE) {
400	>	if (status == COMPILE_CODE_OK) {
401	>	if (!FN_field::test(opcode))
402	>	cg_context.done_compile = false;
403	>	else {
404		dg.gen_load_A0_LR();
405		dg.gen_set_PC_A0();
406	+	cg_context.done_compile = true;
407		}
480	–	cg_context.done_compile = true;
481	–	break;
482	–	}
483	–	else if (status != COMPILE_FAILURE) {
484	–	cg_context.done_compile = false;
408		break;
409		}
410		#if PPC_REENTRANT_JIT
411		// Try to execute NativeOp trampoline
412	<	dg.gen_set_PC_im(cg_context.pc + 4);
412	>	if (!FN_field::test(opcode))
413	>	dg.gen_set_PC_im(cg_context.pc + 4);
414	>	else {
415	>	dg.gen_load_A0_LR();
416	>	dg.gen_set_PC_A0();
417	>	}
418		dg.gen_mov_32_T0_im(selector);
419		dg.gen_jmp(native_op_trampoline);
420		cg_context.done_compile = true;
#	Line 494 \| Line 422 \| int sheepshaver_cpu::compile1(codegen_co
422		break;
423		#endif
424		// Invoke NativeOp handler
425	<	typedef void (*func_t)(dyngen_cpu_base, uint32);
426	<	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
427	<	dg.gen_invoke_CPU_im(func, selector);
428	<	cg_context.done_compile = false;
429	<	status = COMPILE_CODE_OK;
425	>	if (!FN_field::test(opcode)) {
426	>	typedef void (*func_t)(dyngen_cpu_base, uint32);
427	>	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
428	>	dg.gen_invoke_CPU_im(func, selector);
429	>	cg_context.done_compile = false;
430	>	status = COMPILE_CODE_OK;
431	>	}
432	>	// Otherwise, let it generate a call to execute_sheep() which
433	>	// will cause necessary updates to the program counter
434		break;
435		}
436
437		default: { // EMUL_OP
438		uint32 emul_op = EMUL_OP_field::extract(opcode) - 3;
507	–	#if ENABLE_NATIVE_EMUL_OP
508	–	typedef void (*emul_op_func_t)(dyngen_cpu_base);
509	–	emul_op_func_t emul_op_func = 0;
510	–	switch (emul_op) {
511	–	case OP_MICROSECONDS:
512	–	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_microseconds).ptr();
513	–	break;
514	–	case OP_IDLE_TIME:
515	–	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_1).ptr();
516	–	break;
517	–	case OP_IDLE_TIME_2:
518	–	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_2).ptr();
519	–	break;
520	–	}
521	–	if (emul_op_func) {
522	–	dg.gen_invoke_CPU(emul_op_func);
523	–	cg_context.done_compile = false;
524	–	status = COMPILE_CODE_OK;
525	–	break;
526	–	}
527	–	#endif
439		#if PPC_REENTRANT_JIT
440		// Try to execute EmulOp trampoline
441		dg.gen_set_PC_im(cg_context.pc + 4);
#	Line 544 \| Line 455 \| int sheepshaver_cpu::compile1(codegen_co
455		}
456		}
457		return status;
547	–	#endif
548	–	return COMPILE_FAILURE;
549	–	}
550	–
551	–	// CPU context to preserve on interrupt
552	–	sheepshaver_cpu::interrupt_context::interrupt_context(sheepshaver_cpu _cpu, const char _where)
553	–	{
554	–	#if SAFE_INTERRUPT_PPC >= 2
555	–	cpu = _cpu;
556	–	where = _where;
557	–
558	–	// Save interrupt context
559	–	memcpy(&gpr[0], &cpu->gpr(0), sizeof(gpr));
560	–	pc = cpu->pc();
561	–	lr = cpu->lr();
562	–	ctr = cpu->ctr();
563	–	cr = cpu->get_cr();
564	–	xer = cpu->get_xer();
565	–	#endif
458		}
567	–
568	–	sheepshaver_cpu::interrupt_context::~interrupt_context()
569	–	{
570	–	#if SAFE_INTERRUPT_PPC >= 2
571	–	// Check whether CPU context was preserved by interrupt
572	–	if (memcmp(&gpr[0], &cpu->gpr(0), sizeof(gpr)) != 0) {
573	–	printf("FATAL: %s: interrupt clobbers registers\n", where);
574	–	for (int i = 0; i < 32; i++)
575	–	if (gpr[i] != cpu->gpr(i))
576	–	printf(" r%d: %08x -> %08x\n", i, gpr[i], cpu->gpr(i));
577	–	}
578	–	if (pc != cpu->pc())
579	–	printf("FATAL: %s: interrupt clobbers PC\n", where);
580	–	if (lr != cpu->lr())
581	–	printf("FATAL: %s: interrupt clobbers LR\n", where);
582	–	if (ctr != cpu->ctr())
583	–	printf("FATAL: %s: interrupt clobbers CTR\n", where);
584	–	if (cr != cpu->get_cr())
585	–	printf("FATAL: %s: interrupt clobbers CR\n", where);
586	–	if (xer != cpu->get_xer())
587	–	printf("FATAL: %s: interrupt clobbers XER\n", where);
459		#endif
589	–	}
460
461		// Handle MacOS interrupt
462		void sheepshaver_cpu::interrupt(uint32 entry)
463		{
464		#if EMUL_TIME_STATS
465	<	interrupt_count++;
465	>	ppc_interrupt_count++;
466		const clock_t interrupt_start = clock();
467		#endif
468
599	–	#if SAFE_INTERRUPT_PPC
600	–	static int depth = 0;
601	–	if (depth != 0)
602	–	printf("FATAL: sheepshaver_cpu::interrupt() called more than once: %d\n", depth);
603	–	depth++;
604	–	#endif
605	–
606	–	#if !MULTICORE_CPU
469		// Save program counters and branch registers
470		uint32 saved_pc = pc();
471		uint32 saved_lr = lr();
472		uint32 saved_ctr= ctr();
473		uint32 saved_sp = gpr(1);
612	–	#endif
474
475		// Initialize stack pointer to SheepShaver alternate stack base
476		gpr(1) = SignalStackBase() - 64;
#	Line 649 \| Line 510 \| void sheepshaver_cpu::interrupt(uint32 e
510		// Enter nanokernel
511		execute(entry);
512
652	–	#if !MULTICORE_CPU
513		// Restore program counters and branch registers
514		pc() = saved_pc;
515		lr() = saved_lr;
516		ctr()= saved_ctr;
517		gpr(1) = saved_sp;
658	–	#endif
518
519		#if EMUL_TIME_STATS
520		interrupt_time += (clock() - interrupt_start);
521		#endif
663	–
664	–	#if SAFE_INTERRUPT_PPC
665	–	depth--;
666	–	#endif
522		}
523
524		// Execute 68k routine
#	Line 857 \| Line 712 \| inline void sheepshaver_cpu::get_resourc
712		* SheepShaver CPU engine interface
713		**/
714
715	<	static sheepshaver_cpu *main_cpu = NULL; // CPU emulator to handle usual control flow
716	<	static sheepshaver_cpu *interrupt_cpu = NULL; // CPU emulator to handle interrupts
862	<	static sheepshaver_cpu *current_cpu = NULL; // Current CPU emulator context
715	>	// PowerPC CPU emulator
716	>	static sheepshaver_cpu *ppc_cpu = NULL;
717
718		void FlushCodeCache(uintptr start, uintptr end)
719		{
720		D(bug("FlushCodeCache(%08x, %08x)\n", start, end));
721	<	main_cpu->invalidate_cache_range(start, end);
868	<	#if MULTICORE_CPU
869	<	interrupt_cpu->invalidate_cache_range(start, end);
870	<	#endif
871	<	}
872	<
873	<	static inline void cpu_push(sheepshaver_cpu *new_cpu)
874	<	{
875	<	#if MULTICORE_CPU
876	<	current_cpu = new_cpu;
877	<	#endif
878	<	}
879	<
880	<	static inline void cpu_pop()
881	<	{
882	<	#if MULTICORE_CPU
883	<	current_cpu = main_cpu;
884	<	#endif
721	>	ppc_cpu->invalidate_cache_range(start, end);
722		}
723
724		// Dump PPC registers
725		static void dump_registers(void)
726		{
727	<	current_cpu->dump_registers();
727	>	ppc_cpu->dump_registers();
728		}
729
730		// Dump log
731		static void dump_log(void)
732		{
733	<	current_cpu->dump_log();
733	>	ppc_cpu->dump_log();
734		}
735
736		/*
737		* Initialize CPU emulation
738		*/
739
740	<	static sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
740	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
741		{
742		#if ENABLE_VOSF
743		// Handle screen fault
#	Line 912 \| Line 749 \| static sigsegv_return_t sigsegv_handler(
749		const uintptr addr = (uintptr)fault_address;
750		#if HAVE_SIGSEGV_SKIP_INSTRUCTION
751		// Ignore writes to ROM
752	<	if ((addr - ROM_BASE) < ROM_SIZE)
752	>	if ((addr - (uintptr)ROMBaseHost) < ROM_SIZE)
753		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
754
755		// Get program counter of target CPU
756	<	sheepshaver_cpu * const cpu = current_cpu;
756	>	sheepshaver_cpu * const cpu = ppc_cpu;
757		const uint32 pc = cpu->pc();
758
759		// Fault in Mac ROM or RAM?
760	<	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) \|\| (pc >= RAMBase) && (pc < (RAMBase + RAMSize));
760	>	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) \|\| (pc >= RAMBase) && (pc < (RAMBase + RAMSize)) \|\| (pc >= DR_CACHE_BASE && pc < (DR_CACHE_BASE + DR_CACHE_SIZE));
761		if (mac_fault) {
762
763		// "VM settings" during MacOS 8 installation
#	Line 940 \| Line 777 \| static sigsegv_return_t sigsegv_handler(
777		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
778		else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 \|\| cpu->gpr(20) == 0xf3012000))
779		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
780	+
781	+	// MacOS 8.6 serial drivers on startup (with DR Cache and OldWorld ROM)
782	+	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(16) == 0xf3012002 \|\| cpu->gpr(16) == 0xf3012000))
783	+	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
784	+	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(20) == 0xf3012002 \|\| cpu->gpr(20) == 0xf3012000))
785	+	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
786
787		// Ignore writes to the zero page
788		else if ((uint32)(addr - SheepMem::ZeroPage()) < (uint32)SheepMem::PageSize())
#	Line 956 \| Line 799 \| static sigsegv_return_t sigsegv_handler(
799		printf("SIGSEGV\n");
800		printf(" pc %p\n", fault_instruction);
801		printf(" ea %p\n", fault_address);
959	–	printf(" cpu %s\n", current_cpu == main_cpu ? "main" : "interrupts");
802		dump_registers();
803	<	current_cpu->dump_log();
803	>	ppc_cpu->dump_log();
804		enter_mon();
805		QuitEmulator();
806
#	Line 967 \| Line 809 \| static sigsegv_return_t sigsegv_handler(
809
810		void init_emul_ppc(void)
811		{
812	+	// Get pointer to KernelData in host address space
813	+	kernel_data = (KernelData *)Mac2HostAddr(KERNEL_DATA_BASE);
814	+
815		// Initialize main CPU emulator
816	<	main_cpu = new sheepshaver_cpu();
817	<	main_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
818	<	main_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
816	>	ppc_cpu = new sheepshaver_cpu();
817	>	ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
818	>	ppc_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
819		WriteMacInt32(XLM_RUN_MODE, MODE_68K);
820
976	–	#if MULTICORE_CPU
977	–	// Initialize alternate CPU emulator to handle interrupts
978	–	interrupt_cpu = new sheepshaver_cpu();
979	–	#endif
980	–
981	–	// Install the handler for SIGSEGV
982	–	sigsegv_install_handler(sigsegv_handler);
983	–
821		#if ENABLE_MON
822		// Install "regs" command in cxmon
823		mon_add_command("regs", dump_registers, "regs Dump PowerPC registers\n");
#	Line 1006 \| Line 843 \| void exit_emul_ppc(void)
843		printf("Total emulation time : %.1f sec\n", double(emul_time) / double(CLOCKS_PER_SEC));
844		printf("Total interrupt count: %d (%2.1f Hz)\n", interrupt_count,
845		(double(interrupt_count) * CLOCKS_PER_SEC) / double(emul_time));
846	+	printf("Total ppc interrupt count: %d (%2.1f %%)\n", ppc_interrupt_count,
847	+	(double(ppc_interrupt_count) * 100.0) / double(interrupt_count));
848
849		#define PRINT_STATS(LABEL, VAR_PREFIX) do { \
850		printf("Total " LABEL " count : %d\n", VAR_PREFIX##_count); \
#	Line 1022 \| Line 861 \| void exit_emul_ppc(void)
861		printf("\n");
862		#endif
863
864	<	delete main_cpu;
1026	<	#if MULTICORE_CPU
1027	<	delete interrupt_cpu;
1028	<	#endif
864	>	delete ppc_cpu;
865		}
866
867		#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
#	Line 1060 \| Line 896 \| void init_emul_op_trampolines(basic_dyng
896
897		void emul_ppc(uint32 entry)
898		{
1063	–	current_cpu = main_cpu;
899		#if 0
900	<	current_cpu->start_log();
900	>	ppc_cpu->start_log();
901		#endif
902		// start emulation loop and enable code translation or caching
903	<	current_cpu->execute(entry);
903	>	ppc_cpu->execute(entry);
904		}
905
906		/*
907		* Handle PowerPC interrupt
908		*/
909
1075	–	#if ASYNC_IRQ
1076	–	void HandleInterrupt(void)
1077	–	{
1078	–	main_cpu->handle_interrupt();
1079	–	}
1080	–	#else
910		void TriggerInterrupt(void)
911		{
912		#if 0
913		WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1);
914		#else
915		// Trigger interrupt to main cpu only
916	<	if (main_cpu)
917	<	main_cpu->trigger_interrupt();
916	>	if (ppc_cpu)
917	>	ppc_cpu->trigger_interrupt();
918		#endif
919		}
1091	–	#endif
920
921	<	void sheepshaver_cpu::handle_interrupt(void)
921	>	void HandleInterrupt(powerpc_registers *r)
922		{
923	+	#ifdef USE_SDL_VIDEO
924	+	// We must fill in the events queue in the same thread that did call SDL_SetVideoMode()
925	+	SDL_PumpEvents();
926	+	#endif
927	+
928		// Do nothing if interrupts are disabled
929	<	if ((int32 )XLM_IRQ_NEST > 0)
929	>	if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0)
930		return;
931
932	<	// Do nothing if there is no interrupt pending
932	>	// Do nothing if there is no pending interrupt
933		if (InterruptFlags == 0)
934		return;
935
936		// Current interrupt nest level
937		static int interrupt_depth = 0;
938		++interrupt_depth;
939	<
940	<	// Disable MacOS stack sniffer
941	<	WriteMacInt32(0x110, 0);
939	>	#if EMUL_TIME_STATS
940	>	interrupt_count++;
941	>	#endif
942
943		// Interrupt action depends on current run mode
944		switch (ReadMacInt32(XLM_RUN_MODE)) {
945		case MODE_68K:
946		// 68k emulator active, trigger 68k interrupt level 1
1114	–	assert(current_cpu == main_cpu);
947		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
948	<	set_cr(get_cr() \| tswap32(kernel_data->v[0x674 >> 2]));
948	>	r->cr.set(r->cr.get() \| tswap32(kernel_data->v[0x674 >> 2]));
949		break;
950
951		#if INTERRUPTS_IN_NATIVE_MODE
952		case MODE_NATIVE:
953		// 68k emulator inactive, in nanokernel?
954	<	assert(current_cpu == main_cpu);
1123	<	if (gpr(1) != KernelDataAddr && interrupt_depth == 1) {
1124	<	interrupt_context ctx(this, "PowerPC mode");
954	>	if (r->gpr[1] != KernelDataAddr && interrupt_depth == 1) {
955
956		// Prepare for 68k interrupt level 1
957		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
#	Line 1131 \| Line 961 \| void sheepshaver_cpu::handle_interrupt(v
961
962		// Execute nanokernel interrupt routine (this will activate the 68k emulator)
963		DisableInterrupt();
1134	–	cpu_push(interrupt_cpu);
964		if (ROMType == ROMTYPE_NEWWORLD)
965	<	current_cpu->interrupt(ROM_BASE + 0x312b1c);
965	>	ppc_cpu->interrupt(ROM_BASE + 0x312b1c);
966		else
967	<	current_cpu->interrupt(ROM_BASE + 0x312a3c);
1139	<	cpu_pop();
967	>	ppc_cpu->interrupt(ROM_BASE + 0x312a3c);
968		}
969		break;
970		#endif
#	Line 1145 \| Line 973 \| void sheepshaver_cpu::handle_interrupt(v
973		case MODE_EMUL_OP:
974		// 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0
975		if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) {
976	<	interrupt_context ctx(this, "68k mode");
976	>	#if EMUL_TIME_STATS
977	>	const clock_t interrupt_start = clock();
978	>	#endif
979		#if 1
980		// Execute full 68k interrupt routine
981		M68kRegisters r;
982		uint32 old_r25 = ReadMacInt32(XLM_68K_R25); // Save interrupt level
983		WriteMacInt32(XLM_68K_R25, 0x21); // Execute with interrupt level 1
984	<	static const uint8 proc[] = {
984	>	static const uint8 proc_template[] = {
985		0x3f, 0x3c, 0x00, 0x00, // move.w #$0000,-(sp) (fake format word)
986		0x48, 0x7a, 0x00, 0x0a, // pea @1(pc) (return address)
987		0x40, 0xe7, // move sr,-(sp) (saved SR)
#	Line 1159 \| Line 989 \| void sheepshaver_cpu::handle_interrupt(v
989		0x4e, 0xd0, // jmp (a0)
990		M68K_RTS >> 8, M68K_RTS & 0xff // @1
991		};
992	<	Execute68k((uint32)proc, &r);
992	>	BUILD_SHEEPSHAVER_PROCEDURE(proc);
993	>	Execute68k(proc, &r);
994		WriteMacInt32(XLM_68K_R25, old_r25); // Restore interrupt level
995		#else
996		// Only update cursor
#	Line 1171 \| Line 1002 \| void sheepshaver_cpu::handle_interrupt(v
1002		}
1003		}
1004		#endif
1005	+	#if EMUL_TIME_STATS
1006	+	interrupt_time += (clock() - interrupt_start);
1007	+	#endif
1008		}
1009		break;
1010		#endif
#	Line 1205 \| Line 1039 \| void sheepshaver_cpu::execute_native_op(
1039		VideoVBL();
1040		break;
1041		case NATIVE_VIDEO_DO_DRIVER_IO:
1042	<	gpr(3) = (int32)(int16)VideoDoDriverIO((void )gpr(3), (void )gpr(4),
1209	<	(void *)gpr(5), gpr(6), gpr(7));
1042	>	gpr(3) = (int32)(int16)VideoDoDriverIO(gpr(3), gpr(4), gpr(5), gpr(6), gpr(7));
1043		break;
1211	–	#ifdef WORDS_BIGENDIAN
1044		case NATIVE_ETHER_IRQ:
1045		EtherIRQ();
1046		break;
#	Line 1230 \| Line 1062 \| void sheepshaver_cpu::execute_native_op(
1062		case NATIVE_ETHER_RSRV:
1063		gpr(3) = ether_rsrv((queue_t *)gpr(3));
1064		break;
1233	–	#else
1234	–	case NATIVE_ETHER_INIT:
1235	–	// FIXME: needs more complicated thunks
1236	–	gpr(3) = false;
1237	–	break;
1238	–	#endif
1065		case NATIVE_SYNC_HOOK:
1066		gpr(3) = NQD_sync_hook(gpr(3));
1067		break;
#	Line 1290 \| Line 1116 \| void sheepshaver_cpu::execute_native_op(
1116		get_resource_callbacks[selector - NATIVE_GET_RESOURCE]();
1117		break;
1118		}
1293	–	case NATIVE_DISABLE_INTERRUPT:
1294	–	DisableInterrupt();
1295	–	break;
1296	–	case NATIVE_ENABLE_INTERRUPT:
1297	–	EnableInterrupt();
1298	–	break;
1119		case NATIVE_MAKE_EXECUTABLE:
1120	<	MakeExecutable(0, (void *)gpr(4), gpr(5));
1120	>	MakeExecutable(0, gpr(4), gpr(5));
1121		break;
1122		case NATIVE_CHECK_LOAD_INVOC:
1123		check_load_invoc(gpr(3), gpr(4), gpr(5));
#	Line 1321 \| Line 1141 \| void sheepshaver_cpu::execute_native_op(
1141
1142		void Execute68k(uint32 pc, M68kRegisters *r)
1143		{
1144	<	current_cpu->execute_68k(pc, r);
1144	>	ppc_cpu->execute_68k(pc, r);
1145		}
1146
1147		/*
#	Line 1344 \| Line 1164 \| void Execute68kTrap(uint16 trap, M68kReg
1164
1165		uint32 call_macos(uint32 tvect)
1166		{
1167	<	return current_cpu->execute_macos_code(tvect, 0, NULL);
1167	>	return ppc_cpu->execute_macos_code(tvect, 0, NULL);
1168		}
1169
1170		uint32 call_macos1(uint32 tvect, uint32 arg1)
1171		{
1172		const uint32 args[] = { arg1 };
1173	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1173	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1174		}
1175
1176		uint32 call_macos2(uint32 tvect, uint32 arg1, uint32 arg2)
1177		{
1178		const uint32 args[] = { arg1, arg2 };
1179	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1179	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1180		}
1181
1182		uint32 call_macos3(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3)
1183		{
1184		const uint32 args[] = { arg1, arg2, arg3 };
1185	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1185	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1186		}
1187
1188		uint32 call_macos4(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4)
1189		{
1190		const uint32 args[] = { arg1, arg2, arg3, arg4 };
1191	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1191	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1192		}
1193
1194		uint32 call_macos5(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5)
1195		{
1196		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5 };
1197	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1197	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1198		}
1199
1200		uint32 call_macos6(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6)
1201		{
1202		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6 };
1203	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1203	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1204		}
1205
1206		uint32 call_macos7(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6, uint32 arg7)
1207		{
1208		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6, arg7 };
1209	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1209	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1210		}
1211
1212		/*
#	Line 1395 \| Line 1215 \| uint32 call_macos7(uint32 tvect, uint32
1215
1216		void get_resource(void)
1217		{
1218	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1218	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1219		}
1220
1221		void get_1_resource(void)
1222		{
1223	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1223	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1224		}
1225
1226		void get_ind_resource(void)
1227		{
1228	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1228	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1229		}
1230
1231		void get_1_ind_resource(void)
1232		{
1233	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1233	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1234		}
1235
1236		void r_get_resource(void)
1237		{
1238	<	current_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1238	>	ppc_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1239		}

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Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents): Revision 1.40 by gbeauche, 2004-05-20T11:47:27Z vs. Revision 1.59 by gbeauche, 2005-03-05T18:33:30Z

Diff Legend

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.40 by gbeauche, 2004-05-20T11:47:27Z vs.
Revision 1.59 by gbeauche, 2005-03-05T18:33:30Z