[ViewVC] Diff of: cebix/SheepShaver/src/kpx_cpu/sheepshaver

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.1 by gbeauche, 2003-09-07T14:25:01Z vs.
Revision 1.26 by gbeauche, 2004-01-24T11:28:06Z

#	Line 1 \| Line 1
1		/*
2		* sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface
3		*
4	<	* SheepShaver (C) 1997-2002 Christian Bauer and Marc Hellwig
4	>	* SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig
5		*
6		* This program is free software; you can redistribute it and/or modify
7		* it under the terms of the GNU General Public License as published by
#	Line 21 \| Line 21
21		#include "sysdeps.h"
22		#include "cpu_emulation.h"
23		#include "main.h"
24	+	#include "prefs.h"
25		#include "xlowmem.h"
26		#include "emul_op.h"
27		#include "rom_patches.h"
#	Line 29 \| Line 30
30		#include "sigsegv.h"
31		#include "cpu/ppc/ppc-cpu.hpp"
32		#include "cpu/ppc/ppc-operations.hpp"
33	+	#include "cpu/ppc/ppc-instructions.hpp"
34	+	#include "thunks.h"
35
36		// Used for NativeOp trampolines
37		#include "video.h"
38		#include "name_registry.h"
39		#include "serial.h"
40	+	#include "ether.h"
41
42		#include <stdio.h>
43
#	Line 42 \| Line 46
46		#include "mon_disass.h"
47		#endif
48
49	<	#define DEBUG 1
49	>	#define DEBUG 0
50		#include "debug.h"
51
52	+	// Emulation time statistics
53	+	#define EMUL_TIME_STATS 1
54	+
55	+	#if EMUL_TIME_STATS
56	+	static clock_t emul_start_time;
57	+	static uint32 interrupt_count = 0;
58	+	static clock_t interrupt_time = 0;
59	+	static uint32 exec68k_count = 0;
60	+	static clock_t exec68k_time = 0;
61	+	static uint32 native_exec_count = 0;
62	+	static clock_t native_exec_time = 0;
63	+	static uint32 macos_exec_count = 0;
64	+	static clock_t macos_exec_time = 0;
65	+	#endif
66	+
67		static void enter_mon(void)
68		{
69		// Start up mon in real-mode
#	Line 54 \| Line 73 \| static void enter_mon(void)
73		#endif
74		}
75
76	+	// From main_*.cpp
77	+	extern uintptr SignalStackBase();
78	+
79	+	// From rsrc_patches.cpp
80	+	extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
81	+
82	+	// PowerPC EmulOp to exit from emulation looop
83	+	const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP \| 1;
84	+
85	+	// Enable multicore (main/interrupts) cpu emulation?
86	+	#define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0)
87	+
88		// Enable Execute68k() safety checks?
89		#define SAFE_EXEC_68K 1
90
#	Line 66 \| Line 97 \| static void enter_mon(void)
97		// Interrupts in native mode?
98		#define INTERRUPTS_IN_NATIVE_MODE 1
99
100	<	// 68k Emulator Data
101	<	struct EmulatorData {
71	<	uint32 v[0x400];
72	<	};
100	>	// Pointer to Kernel Data
101	>	static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE;
102
103	<	// Kernel Data
104	<	struct KernelData {
76	<	uint32 v[0x400];
77	<	EmulatorData ed;
78	<	};
103	>	// SIGSEGV handler
104	>	static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
105
106	<	// Pointer to Kernel Data
107	<	static KernelData * const kernel_data = (KernelData *)0x68ffe000;
106	>	// JIT Compiler enabled?
107	>	static inline bool enable_jit_p()
108	>	{
109	>	return PrefsFindBool("jit");
110	>	}
111
112
113		/**
114		* PowerPC emulator glue with special 'sheep' opcodes
115		**/
116
117	<	struct sheepshaver_exec_return { };
117	>	enum {
118	>	PPC_I(SHEEP) = PPC_I(MAX),
119	>	PPC_I(SHEEP_MAX)
120	>	};
121
122		class sheepshaver_cpu
123		: public powerpc_cpu
#	Line 95 \| Line 127 \| class sheepshaver_cpu
127
128		public:
129
130	<	sheepshaver_cpu()
131	<	: powerpc_cpu()
100	<	{ init_decoder(); }
101	<
102	<	// Stack pointer accessors
103	<	uint32 get_sp() const { return gpr(1); }
104	<	void set_sp(uint32 v) { gpr(1) = v; }
130	>	// Constructor
131	>	sheepshaver_cpu();
132
133	<	// Condition Register accessors
133	>	// CR & XER accessors
134		uint32 get_cr() const { return cr().get(); }
135		void set_cr(uint32 v) { cr().set(v); }
136	+	uint32 get_xer() const { return xer().get(); }
137	+	void set_xer(uint32 v) { xer().set(v); }
138
139	<	// Execution loop
140	<	void execute(uint32 pc);
139	>	// Execute EMUL_OP routine
140	>	void execute_emul_op(uint32 emul_op);
141
142		// Execute 68k routine
143		void execute_68k(uint32 entry, M68kRegisters *r);
144
145	+	// Execute ppc routine
146	+	void execute_ppc(uint32 entry);
147	+
148		// Execute MacOS/PPC code
149		uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args);
150
151	+	// Compile one instruction
152	+	virtual bool compile1(codegen_context_t & cg_context);
153	+
154		// Resource manager thunk
155		void get_resource(uint32 old_get_resource);
156
157		// Handle MacOS interrupt
158	<	void interrupt(uint32 entry, uint32 sp);
158	>	void interrupt(uint32 entry);
159	>	void handle_interrupt();
160
161		// Lazy memory allocator (one item at a time)
162		void *operator new(size_t size)
#	Line 130 \| Line 166 \| public:
166		// FIXME: really make surre array allocation fail at link time?
167		void *operator new[](size_t);
168		void operator delete[](void *p);
169	+
170	+	// Make sure the SIGSEGV handler can access CPU registers
171	+	friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
172		};
173
174		lazy_allocator< sheepshaver_cpu > allocator_helper< sheepshaver_cpu, lazy_allocator >::allocator;
175
176	+	sheepshaver_cpu::sheepshaver_cpu()
177	+	: powerpc_cpu(enable_jit_p())
178	+	{
179	+	init_decoder();
180	+	}
181	+
182		void sheepshaver_cpu::init_decoder()
183		{
184		#ifndef PPC_NO_STATIC_II_INDEX_TABLE
#	Line 145 \| Line 190 \| void sheepshaver_cpu::init_decoder()
190
191		static const instr_info_t sheep_ii_table[] = {
192		{ "sheep",
193	<	(execute_fn)&sheepshaver_cpu::execute_sheep,
193	>	(execute_pmf)&sheepshaver_cpu::execute_sheep,
194		NULL,
195	<	D_form, 6, 0, CFLOW_TRAP
195	>	PPC_I(SHEEP),
196	>	D_form, 6, 0, CFLOW_JUMP \| CFLOW_TRAP
197		}
198		};
199
#	Line 163 \| Line 209 \| void sheepshaver_cpu::init_decoder()
209		// Forward declaration for native opcode handler
210		static void NativeOp(int selector);
211
212	+	/* NativeOp instruction format:
213	+	+------------+--------------------------+--+----------+------------+
214	+	\| 6 \| \|FN\| OP \| 2 \|
215	+	+------------+--------------------------+--+----------+------------+
216	+	0 5 \|6 19 20 21 25 26 31
217	+	*/
218	+
219	+	typedef bit_field< 20, 20 > FN_field;
220	+	typedef bit_field< 21, 25 > NATIVE_OP_field;
221	+	typedef bit_field< 26, 31 > EMUL_OP_field;
222	+
223	+	// Execute EMUL_OP routine
224	+	void sheepshaver_cpu::execute_emul_op(uint32 emul_op)
225	+	{
226	+	M68kRegisters r68;
227	+	WriteMacInt32(XLM_68K_R25, gpr(25));
228	+	WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
229	+	for (int i = 0; i < 8; i++)
230	+	r68.d[i] = gpr(8 + i);
231	+	for (int i = 0; i < 7; i++)
232	+	r68.a[i] = gpr(16 + i);
233	+	r68.a[7] = gpr(1);
234	+	uint32 saved_cr = get_cr() & CR_field<2>::mask();
235	+	uint32 saved_xer = get_xer();
236	+	EmulOp(&r68, gpr(24), emul_op);
237	+	set_cr(saved_cr);
238	+	set_xer(saved_xer);
239	+	for (int i = 0; i < 8; i++)
240	+	gpr(8 + i) = r68.d[i];
241	+	for (int i = 0; i < 7; i++)
242	+	gpr(16 + i) = r68.a[i];
243	+	gpr(1) = r68.a[7];
244	+	WriteMacInt32(XLM_RUN_MODE, MODE_68K);
245	+	}
246	+
247		// Execute SheepShaver instruction
248		void sheepshaver_cpu::execute_sheep(uint32 opcode)
249		{
#	Line 173 \| Line 254 \| void sheepshaver_cpu::execute_sheep(uint
254		case 0: // EMUL_RETURN
255		QuitEmulator();
256		break;
257	<
257	>
258		case 1: // EXEC_RETURN
259	<	throw sheepshaver_exec_return();
259	>	spcflags().set(SPCFLAG_CPU_EXEC_RETURN);
260		break;
261
262		case 2: // EXEC_NATIVE
263	<	NativeOp((opcode >> 6) & 0x1f);
264	<	pc() = lr();
263	>	NativeOp(NATIVE_OP_field::extract(opcode));
264	>	if (FN_field::test(opcode))
265	>	pc() = lr();
266	>	else
267	>	pc() += 4;
268		break;
269
270	<	default: { // EMUL_OP
271	<	M68kRegisters r68;
188	<	WriteMacInt32(XLM_68K_R25, gpr(25));
189	<	WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
190	<	for (int i = 0; i < 8; i++)
191	<	r68.d[i] = gpr(8 + i);
192	<	for (int i = 0; i < 7; i++)
193	<	r68.a[i] = gpr(16 + i);
194	<	r68.a[7] = gpr(1);
195	<	EmulOp(&r68, gpr(24), (opcode & 0x3f) - 3);
196	<	for (int i = 0; i < 8; i++)
197	<	gpr(8 + i) = r68.d[i];
198	<	for (int i = 0; i < 7; i++)
199	<	gpr(16 + i) = r68.a[i];
200	<	gpr(1) = r68.a[7];
201	<	WriteMacInt32(XLM_RUN_MODE, MODE_68K);
270	>	default: // EMUL_OP
271	>	execute_emul_op(EMUL_OP_field::extract(opcode) - 3);
272		pc() += 4;
273		break;
274		}
205	–	}
275		}
276
277	<	// Execution loop
278	<	void sheepshaver_cpu::execute(uint32 entry)
277	>	// Compile one instruction
278	>	bool sheepshaver_cpu::compile1(codegen_context_t & cg_context)
279		{
280	<	try {
281	<	pc() = entry;
282	<	powerpc_cpu::execute();
280	>	#if PPC_ENABLE_JIT
281	>	const instr_info_t *ii = cg_context.instr_info;
282	>	if (ii->mnemo != PPC_I(SHEEP))
283	>	return false;
284	>
285	>	bool compiled = false;
286	>	powerpc_dyngen & dg = cg_context.codegen;
287	>	uint32 opcode = cg_context.opcode;
288	>
289	>	switch (opcode & 0x3f) {
290	>	case 0: // EMUL_RETURN
291	>	dg.gen_invoke(QuitEmulator);
292	>	compiled = true;
293	>	break;
294	>
295	>	case 1: // EXEC_RETURN
296	>	dg.gen_spcflags_set(SPCFLAG_CPU_EXEC_RETURN);
297	>	compiled = true;
298	>	break;
299	>
300	>	case 2: { // EXEC_NATIVE
301	>	uint32 selector = NATIVE_OP_field::extract(opcode);
302	>	switch (selector) {
303	>	case NATIVE_PATCH_NAME_REGISTRY:
304	>	dg.gen_invoke(DoPatchNameRegistry);
305	>	compiled = true;
306	>	break;
307	>	case NATIVE_VIDEO_INSTALL_ACCEL:
308	>	dg.gen_invoke(VideoInstallAccel);
309	>	compiled = true;
310	>	break;
311	>	case NATIVE_VIDEO_VBL:
312	>	dg.gen_invoke(VideoVBL);
313	>	compiled = true;
314	>	break;
315	>	case NATIVE_GET_RESOURCE:
316	>	case NATIVE_GET_1_RESOURCE:
317	>	case NATIVE_GET_IND_RESOURCE:
318	>	case NATIVE_GET_1_IND_RESOURCE:
319	>	case NATIVE_R_GET_RESOURCE: {
320	>	static const uint32 get_resource_ptr[] = {
321	>	XLM_GET_RESOURCE,
322	>	XLM_GET_1_RESOURCE,
323	>	XLM_GET_IND_RESOURCE,
324	>	XLM_GET_1_IND_RESOURCE,
325	>	XLM_R_GET_RESOURCE
326	>	};
327	>	uint32 old_get_resource = ReadMacInt32(get_resource_ptr[selector - NATIVE_GET_RESOURCE]);
328	>	typedef void (*func_t)(dyngen_cpu_base, uint32);
329	>	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::get_resource).ptr();
330	>	dg.gen_invoke_CPU_im(func, old_get_resource);
331	>	compiled = true;
332	>	break;
333	>	}
334	>	case NATIVE_DISABLE_INTERRUPT:
335	>	dg.gen_invoke(DisableInterrupt);
336	>	compiled = true;
337	>	break;
338	>	case NATIVE_ENABLE_INTERRUPT:
339	>	dg.gen_invoke(EnableInterrupt);
340	>	compiled = true;
341	>	break;
342	>	case NATIVE_CHECK_LOAD_INVOC:
343	>	dg.gen_load_T0_GPR(3);
344	>	dg.gen_load_T1_GPR(4);
345	>	dg.gen_se_16_32_T1();
346	>	dg.gen_load_T2_GPR(5);
347	>	dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))check_load_invoc);
348	>	compiled = true;
349	>	break;
350	>	}
351	>	if (FN_field::test(opcode)) {
352	>	if (compiled) {
353	>	dg.gen_load_A0_LR();
354	>	dg.gen_set_PC_A0();
355	>	}
356	>	cg_context.done_compile = true;
357	>	}
358	>	else
359	>	cg_context.done_compile = false;
360	>	break;
361		}
362	<	catch (sheepshaver_exec_return const &) {
363	<	// Nothing, simply return
362	>
363	>	default: { // EMUL_OP
364	>	typedef void (*func_t)(dyngen_cpu_base, uint32);
365	>	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr();
366	>	dg.gen_invoke_CPU_im(func, EMUL_OP_field::extract(opcode) - 3);
367	>	cg_context.done_compile = false;
368	>	compiled = true;
369	>	break;
370		}
218	–	catch (...) {
219	–	printf("ERROR: execute() received an unknown exception!\n");
220	–	QuitEmulator();
371		}
372	+	return compiled;
373	+	#endif
374	+	return false;
375		}
376
377		// Handle MacOS interrupt
378	<	void sheepshaver_cpu::interrupt(uint32 entry, uint32 sp)
378	>	void sheepshaver_cpu::interrupt(uint32 entry)
379		{
380	<	// Create stack frame
381	<	gpr(1) = sp - 64;
380	>	#if EMUL_TIME_STATS
381	>	interrupt_count++;
382	>	const clock_t interrupt_start = clock();
383	>	#endif
384	>
385	>	#if !MULTICORE_CPU
386	>	// Save program counters and branch registers
387	>	uint32 saved_pc = pc();
388	>	uint32 saved_lr = lr();
389	>	uint32 saved_ctr= ctr();
390	>	uint32 saved_sp = gpr(1);
391	>	#endif
392	>
393	>	// Initialize stack pointer to SheepShaver alternate stack base
394	>	gpr(1) = SignalStackBase() - 64;
395
396		// Build trampoline to return from interrupt
397	<	uint32 trampoline[] = { POWERPC_EMUL_OP \| 1 };
397	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
398
399		// Prepare registers for nanokernel interrupt routine
400	<	kernel_data->v[0x004 >> 2] = gpr(1);
401	<	kernel_data->v[0x018 >> 2] = gpr(6);
400	>	kernel_data->v[0x004 >> 2] = htonl(gpr(1));
401	>	kernel_data->v[0x018 >> 2] = htonl(gpr(6));
402
403	<	gpr(6) = kernel_data->v[0x65c >> 2];
403	>	gpr(6) = ntohl(kernel_data->v[0x65c >> 2]);
404	>	assert(gpr(6) != 0);
405		WriteMacInt32(gpr(6) + 0x13c, gpr(7));
406		WriteMacInt32(gpr(6) + 0x144, gpr(8));
407		WriteMacInt32(gpr(6) + 0x14c, gpr(9));
#	Line 244 \| Line 411 \| void sheepshaver_cpu::interrupt(uint32 e
411		WriteMacInt32(gpr(6) + 0x16c, gpr(13));
412
413		gpr(1) = KernelDataAddr;
414	<	gpr(7) = kernel_data->v[0x660 >> 2];
414	>	gpr(7) = ntohl(kernel_data->v[0x660 >> 2]);
415		gpr(8) = 0;
416	<	gpr(10) = (uint32)trampoline;
417	<	gpr(12) = (uint32)trampoline;
418	<	gpr(13) = cr().get();
416	>	gpr(10) = trampoline.addr();
417	>	gpr(12) = trampoline.addr();
418	>	gpr(13) = get_cr();
419
420		// rlwimi. r7,r7,8,0,0
421		uint32 result = op_ppc_rlwimi::apply(gpr(7), 8, 0x80000000, gpr(7));
#	Line 256 \| Line 423 \| void sheepshaver_cpu::interrupt(uint32 e
423		gpr(7) = result;
424
425		gpr(11) = 0xf072; // MSR (SRR1)
426	<	cr().set((gpr(11) & 0x0fff0000) \| (cr().get() & ~0x0fff0000));
426	>	cr().set((gpr(11) & 0x0fff0000) \| (get_cr() & ~0x0fff0000));
427
428		// Enter nanokernel
429		execute(entry);
430
431	<	// Cleanup stack
432	<	gpr(1) += 64;
431	>	#if !MULTICORE_CPU
432	>	// Restore program counters and branch registers
433	>	pc() = saved_pc;
434	>	lr() = saved_lr;
435	>	ctr()= saved_ctr;
436	>	gpr(1) = saved_sp;
437	>	#endif
438	>
439	>	#if EMUL_TIME_STATS
440	>	interrupt_time += (clock() - interrupt_start);
441	>	#endif
442		}
443
444		// Execute 68k routine
445		void sheepshaver_cpu::execute_68k(uint32 entry, M68kRegisters *r)
446		{
447	+	#if EMUL_TIME_STATS
448	+	exec68k_count++;
449	+	const clock_t exec68k_start = clock();
450	+	#endif
451	+
452		#if SAFE_EXEC_68K
453		if (ReadMacInt32(XLM_RUN_MODE) != MODE_EMUL_OP)
454		printf("FATAL: Execute68k() not called from EMUL_OP mode\n");
#	Line 277 \| Line 458 \| void sheepshaver_cpu::execute_68k(uint32
458		uint32 saved_pc = pc();
459		uint32 saved_lr = lr();
460		uint32 saved_ctr= ctr();
461	+	uint32 saved_cr = get_cr();
462
463		// Create MacOS stack frame
464	+	// FIXME: make sure MacOS doesn't expect PPC registers to live on top
465		uint32 sp = gpr(1);
466	<	gpr(1) -= 56 + 194 + 188;
466	>	gpr(1) -= 56;
467		WriteMacInt32(gpr(1), sp);
468
469		// Save PowerPC registers
470	<	memcpy(Mac2HostAddr(gpr(1)+56), &gpr(13), sizeof(uint32)*(32-13));
470	>	uint32 saved_GPRs[19];
471	>	memcpy(&saved_GPRs[0], &gpr(13), sizeof(uint32)*(32-13));
472		#if SAVE_FP_EXEC_68K
473	<	memcpy(Mac2HostAddr(gpr(1)+56+194), &fpr(14), sizeof(double)(32-14));
473	>	double saved_FPRs[18];
474	>	memcpy(&saved_FPRs[0], &fpr(14), sizeof(double)*(32-14));
475		#endif
476
477		// Setup registers for 68k emulator
478	<	cr().set(0);
294	<	cr().set(2, 1); // Supervisor mode
478	>	cr().set(CR_SO_field<2>::mask()); // Supervisor mode
479		for (int i = 0; i < 8; i++) // d[0]..d[7]
480		gpr(8 + i) = r->d[i];
481		for (int i = 0; i < 7; i++) // a[0]..a[6]
#	Line 301 \| Line 485 \| void sheepshaver_cpu::execute_68k(uint32
485		gpr(25) = ReadMacInt32(XLM_68K_R25); // MSB of SR
486		gpr(26) = 0;
487		gpr(28) = 0; // VBR
488	<	gpr(29) = kernel_data->ed.v[0x74 >> 2]; // Pointer to opcode table
489	<	gpr(30) = kernel_data->ed.v[0x78 >> 2]; // Address of emulator
488	>	gpr(29) = ntohl(kernel_data->ed.v[0x74 >> 2]); // Pointer to opcode table
489	>	gpr(30) = ntohl(kernel_data->ed.v[0x78 >> 2]); // Address of emulator
490		gpr(31) = KernelDataAddr + 0x1000;
491
492		// Push return address (points to EXEC_RETURN opcode) on stack
#	Line 334 \| Line 518 \| void sheepshaver_cpu::execute_68k(uint32
518		r->a[i] = gpr(16 + i);
519
520		// Restore PowerPC registers
521	<	memcpy(&gpr(13), Mac2HostAddr(gpr(1)+56), sizeof(uint32)*(32-13));
521	>	memcpy(&gpr(13), &saved_GPRs[0], sizeof(uint32)*(32-13));
522		#if SAVE_FP_EXEC_68K
523	<	memcpy(&fpr(14), Mac2HostAddr(gpr(1)+56+194), sizeof(double)(32-14));
523	>	memcpy(&fpr(14), &saved_FPRs[0], sizeof(double)*(32-14));
524		#endif
525
526		// Cleanup stack
527	<	gpr(1) += 56 + 194 + 188;
527	>	gpr(1) += 56;
528
529		// Restore program counters and branch registers
530		pc() = saved_pc;
531		lr() = saved_lr;
532		ctr()= saved_ctr;
533	+	set_cr(saved_cr);
534	+
535	+	#if EMUL_TIME_STATS
536	+	exec68k_time += (clock() - exec68k_start);
537	+	#endif
538		}
539
540		// Call MacOS PPC code
541		uint32 sheepshaver_cpu::execute_macos_code(uint32 tvect, int nargs, uint32 const *args)
542		{
543	+	#if EMUL_TIME_STATS
544	+	macos_exec_count++;
545	+	const clock_t macos_exec_start = clock();
546	+	#endif
547	+
548		// Save program counters and branch registers
549		uint32 saved_pc = pc();
550		uint32 saved_lr = lr();
551		uint32 saved_ctr= ctr();
552
553		// Build trampoline with EXEC_RETURN
554	<	uint32 trampoline[] = { POWERPC_EMUL_OP \| 1 };
555	<	lr() = (uint32)trampoline;
554	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
555	>	lr() = trampoline.addr();
556
557		gpr(1) -= 64; // Create stack frame
558		uint32 proc = ReadMacInt32(tvect); // Get routine address
#	Line 389 \| Line 583 \| uint32 sheepshaver_cpu::execute_macos_co
583		lr() = saved_lr;
584		ctr()= saved_ctr;
585
586	+	#if EMUL_TIME_STATS
587	+	macos_exec_time += (clock() - macos_exec_start);
588	+	#endif
589	+
590		return retval;
591		}
592
593	+	// Execute ppc routine
594	+	inline void sheepshaver_cpu::execute_ppc(uint32 entry)
595	+	{
596	+	// Save branch registers
597	+	uint32 saved_lr = lr();
598	+
599	+	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
600	+	WriteMacInt32(trampoline.addr(), POWERPC_EXEC_RETURN);
601	+	lr() = trampoline.addr();
602	+
603	+	execute(entry);
604	+
605	+	// Restore branch registers
606	+	lr() = saved_lr;
607	+	}
608	+
609		// Resource Manager thunk
610		inline void sheepshaver_cpu::get_resource(uint32 old_get_resource)
611		{
612	<	printf("ERROR: get_resource() unimplemented\n");
613	<	QuitEmulator();
612	>	uint32 type = gpr(3);
613	>	int16 id = gpr(4);
614	>
615	>	// Create stack frame
616	>	gpr(1) -= 56;
617	>
618	>	// Call old routine
619	>	execute_ppc(old_get_resource);
620	>
621	>	// Call CheckLoad()
622	>	uint32 handle = gpr(3);
623	>	check_load_invoc(type, id, handle);
624	>	gpr(3) = handle;
625	>
626	>	// Cleanup stack
627	>	gpr(1) += 56;
628		}
629
630
#	Line 408 \| Line 636 \| *static sheepshaver_cpu main_cpu = NULL;**
636		static sheepshaver_cpu *interrupt_cpu = NULL; // CPU emulator to handle interrupts
637		static sheepshaver_cpu *current_cpu = NULL; // Current CPU emulator context
638
639	+	void FlushCodeCache(uintptr start, uintptr end)
640	+	{
641	+	D(bug("FlushCodeCache(%08x, %08x)\n", start, end));
642	+	main_cpu->invalidate_cache_range(start, end);
643	+	#if MULTICORE_CPU
644	+	interrupt_cpu->invalidate_cache_range(start, end);
645	+	#endif
646	+	}
647	+
648	+	static inline void cpu_push(sheepshaver_cpu *new_cpu)
649	+	{
650	+	#if MULTICORE_CPU
651	+	current_cpu = new_cpu;
652	+	#endif
653	+	}
654	+
655	+	static inline void cpu_pop()
656	+	{
657	+	#if MULTICORE_CPU
658	+	current_cpu = main_cpu;
659	+	#endif
660	+	}
661	+
662		// Dump PPC registers
663		static void dump_registers(void)
664		{
#	Line 424 \| Line 675 \| static void dump_log(void)
675		* Initialize CPU emulation
676		*/
677
678	<	static struct sigaction sigsegv_action;
428	<
429	<	#if defined(__powerpc__)
430	<	#include <sys/ucontext.h>
431	<	#endif
432	<
433	<	static void sigsegv_handler(int sig, siginfo_t sip, void scp)
678	>	static sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
679		{
435	–	const uintptr addr = (uintptr)sip->si_addr;
680		#if ENABLE_VOSF
681	<	// Handle screen fault.
682	<	extern bool Screen_fault_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction);
683	<	if (Screen_fault_handler((sigsegv_address_t)addr, SIGSEGV_INVALID_PC))
684	<	return;
681	>	// Handle screen fault
682	>	extern bool Screen_fault_handler(sigsegv_address_t, sigsegv_address_t);
683	>	if (Screen_fault_handler(fault_address, fault_instruction))
684	>	return SIGSEGV_RETURN_SUCCESS;
685		#endif
686	<	#if defined(__powerpc__)
687	<	if (addr >= ROM_BASE && addr < ROM_BASE + ROM_SIZE) {
688	<	printf("IGNORE write access to ROM at %08x\n", addr);
689	<	(((ucontext_t *)scp)->uc_mcontext.regs)->nip += 4;
690	<	return;
691	<	}
692	<	if (addr >= 0xf3012000 && addr < 0xf3014000 && 0) {
693	<	printf("IGNORE write access to ROM at %08x\n", addr);
694	<	(((ucontext_t *)scp)->uc_mcontext.regs)->nip += 4;
695	<	return;
686	>
687	>	const uintptr addr = (uintptr)fault_address;
688	>	#if HAVE_SIGSEGV_SKIP_INSTRUCTION
689	>	// Ignore writes to ROM
690	>	if ((addr - ROM_BASE) < ROM_SIZE)
691	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
692	>
693	>	// Get program counter of target CPU
694	>	sheepshaver_cpu * const cpu = current_cpu;
695	>	const uint32 pc = cpu->pc();
696	>
697	>	// Fault in Mac ROM or RAM?
698	>	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) \|\| (pc >= RAMBase) && (pc < (RAMBase + RAMSize));
699	>	if (mac_fault) {
700	>
701	>	// "VM settings" during MacOS 8 installation
702	>	if (pc == ROM_BASE + 0x488160 && cpu->gpr(20) == 0xf8000000)
703	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
704	>
705	>	// MacOS 8.5 installation
706	>	else if (pc == ROM_BASE + 0x488140 && cpu->gpr(16) == 0xf8000000)
707	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
708	>
709	>	// MacOS 8 serial drivers on startup
710	>	else if (pc == ROM_BASE + 0x48e080 && (cpu->gpr(8) == 0xf3012002 \|\| cpu->gpr(8) == 0xf3012000))
711	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
712	>
713	>	// MacOS 8.1 serial drivers on startup
714	>	else if (pc == ROM_BASE + 0x48c5e0 && (cpu->gpr(20) == 0xf3012002 \|\| cpu->gpr(20) == 0xf3012000))
715	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
716	>	else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 \|\| cpu->gpr(20) == 0xf3012000))
717	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
718	>
719	>	// Ignore all other faults, if requested
720	>	if (PrefsFindBool("ignoresegv"))
721	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
722		}
453	–	#endif
454	–	printf("Caught SIGSEGV at address %p\n", sip->si_addr);
455	–	printf("Native PC: %08x\n", (((ucontext_t *)scp)->uc_mcontext.regs)->nip);
456	–	printf("Current CPU: %s\n", current_cpu == main_cpu ? "main" : "interrupts");
457	–	#if 1
458	–	dump_registers();
723		#else
724	<	printf("Main CPU context\n");
461	<	main_cpu->dump_registers();
462	<	printf("Interrupts CPU context\n");
463	<	interrupt_cpu->dump_registers();
724	>	#error "FIXME: You don't have the capability to skip instruction within signal handlers"
725		#endif
726	+
727	+	printf("SIGSEGV\n");
728	+	printf(" pc %p\n", fault_instruction);
729	+	printf(" ea %p\n", fault_address);
730	+	printf(" cpu %s\n", current_cpu == main_cpu ? "main" : "interrupts");
731	+	dump_registers();
732		current_cpu->dump_log();
466	–	WriteMacInt32(XLM_IRQ_NEST, 1);
733		enter_mon();
734		QuitEmulator();
735	+
736	+	return SIGSEGV_RETURN_FAILURE;
737		}
738
739		void init_emul_ppc(void)
#	Line 473 \| Line 741 \| void init_emul_ppc(void)
741		// Initialize main CPU emulator
742		main_cpu = new sheepshaver_cpu();
743		main_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
744	+	main_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
745		WriteMacInt32(XLM_RUN_MODE, MODE_68K);
746
747	+	#if MULTICORE_CPU
748		// Initialize alternate CPU emulator to handle interrupts
749		interrupt_cpu = new sheepshaver_cpu();
750	+	#endif
751
752	<	// Install SIGSEGV handler
753	<	sigemptyset(&sigsegv_action.sa_mask);
483	<	sigsegv_action.sa_sigaction = sigsegv_handler;
484	<	sigsegv_action.sa_flags = SA_SIGINFO;
485	<	sigsegv_action.sa_restorer = NULL;
486	<	sigaction(SIGSEGV, &sigsegv_action, NULL);
752	>	// Install the handler for SIGSEGV
753	>	sigsegv_install_handler(sigsegv_handler);
754
755		#if ENABLE_MON
756		// Install "regs" command in cxmon
757		mon_add_command("regs", dump_registers, "regs Dump PowerPC registers\n");
758		mon_add_command("log", dump_log, "log Dump PowerPC emulation log\n");
759		#endif
760	+
761	+	#if EMUL_TIME_STATS
762	+	emul_start_time = clock();
763	+	#endif
764	+	}
765	+
766	+	/*
767	+	* Deinitialize emulation
768	+	*/
769	+
770	+	void exit_emul_ppc(void)
771	+	{
772	+	#if EMUL_TIME_STATS
773	+	clock_t emul_end_time = clock();
774	+
775	+	printf("### Statistics for SheepShaver emulation parts\n");
776	+	const clock_t emul_time = emul_end_time - emul_start_time;
777	+	printf("Total emulation time : %.1f sec\n", double(emul_time) / double(CLOCKS_PER_SEC));
778	+	printf("Total interrupt count: %d (%2.1f Hz)\n", interrupt_count,
779	+	(double(interrupt_count) * CLOCKS_PER_SEC) / double(emul_time));
780	+
781	+	#define PRINT_STATS(LABEL, VAR_PREFIX) do { \
782	+	printf("Total " LABEL " count : %d\n", VAR_PREFIX##_count); \
783	+	printf("Total " LABEL " time : %.1f sec (%.1f%%)\n", \
784	+	double(VAR_PREFIX##_time) / double(CLOCKS_PER_SEC), \
785	+	100.0 * double(VAR_PREFIX##_time) / double(emul_time)); \
786	+	} while (0)
787	+
788	+	PRINT_STATS("Execute68k[Trap] execution", exec68k);
789	+	PRINT_STATS("NativeOp execution", native_exec);
790	+	PRINT_STATS("MacOS routine execution", macos_exec);
791	+
792	+	#undef PRINT_STATS
793	+	printf("\n");
794	+	#endif
795	+
796	+	delete main_cpu;
797	+	#if MULTICORE_CPU
798	+	delete interrupt_cpu;
799	+	#endif
800		}
801
802		/*
#	Line 499 \| Line 806 \| void init_emul_ppc(void)
806		void emul_ppc(uint32 entry)
807		{
808		current_cpu = main_cpu;
809	+	#if 0
810		current_cpu->start_log();
811	+	#endif
812	+	// start emulation loop and enable code translation or caching
813		current_cpu->execute(entry);
814		}
815
#	Line 507 \| Line 817 \| void emul_ppc(uint32 entry)
817		* Handle PowerPC interrupt
818		*/
819
820	<	// Atomic operations
511	<	extern int atomic_add(int *var, int v);
512	<	extern int atomic_and(int *var, int v);
513	<	extern int atomic_or(int *var, int v);
514	<
820	>	#if ASYNC_IRQ
821		void HandleInterrupt(void)
822		{
823	+	main_cpu->handle_interrupt();
824	+	}
825	+	#else
826	+	void TriggerInterrupt(void)
827	+	{
828	+	#if 0
829	+	WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1);
830	+	#else
831	+	// Trigger interrupt to main cpu only
832	+	if (main_cpu)
833	+	main_cpu->trigger_interrupt();
834	+	#endif
835	+	}
836	+	#endif
837	+
838	+	void sheepshaver_cpu::handle_interrupt(void)
839	+	{
840		// Do nothing if interrupts are disabled
841	<	if (ReadMacInt32(XLM_IRQ_NEST) > 0 \|\| InterruptFlags == 0)
841	>	if ((int32 )XLM_IRQ_NEST > 0)
842		return;
843
844	<	// Do nothing if CPU objects are not initialized yet
845	<	if (current_cpu == NULL)
844	>	// Do nothing if there is no interrupt pending
845	>	if (InterruptFlags == 0)
846		return;
847
848		// Disable MacOS stack sniffer
#	Line 531 \| Line 854 \| void HandleInterrupt(void)
854		// 68k emulator active, trigger 68k interrupt level 1
855		assert(current_cpu == main_cpu);
856		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
857	<	main_cpu->set_cr(main_cpu->get_cr() \| tswap32(kernel_data->v[0x674 >> 2]));
857	>	set_cr(get_cr() \| tswap32(kernel_data->v[0x674 >> 2]));
858		break;
859
860		#if INTERRUPTS_IN_NATIVE_MODE
861		case MODE_NATIVE:
862		// 68k emulator inactive, in nanokernel?
863		assert(current_cpu == main_cpu);
864	<	if (main_cpu->gpr(1) != KernelDataAddr) {
864	>	if (gpr(1) != KernelDataAddr) {
865		// Prepare for 68k interrupt level 1
866		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
867		WriteMacInt32(tswap32(kernel_data->v[0x658 >> 2]) + 0xdc,
#	Line 546 \| Line 869 \| void HandleInterrupt(void)
869		\| tswap32(kernel_data->v[0x674 >> 2]));
870
871		// Execute nanokernel interrupt routine (this will activate the 68k emulator)
872	<	atomic_add((int32 *)XLM_IRQ_NEST, htonl(1));
873	<	current_cpu = interrupt_cpu;
872	>	DisableInterrupt();
873	>	cpu_push(interrupt_cpu);
874		if (ROMType == ROMTYPE_NEWWORLD)
875	<	current_cpu->interrupt(ROM_BASE + 0x312b1c, main_cpu->get_sp());
875	>	current_cpu->interrupt(ROM_BASE + 0x312b1c);
876		else
877	<	current_cpu->interrupt(ROM_BASE + 0x312a3c, main_cpu->get_sp());
878	<	current_cpu = main_cpu;
877	>	current_cpu->interrupt(ROM_BASE + 0x312a3c);
878	>	cpu_pop();
879		}
880		break;
881		#endif
#	Line 566 \| Line 889 \| void HandleInterrupt(void)
889		M68kRegisters r;
890		uint32 old_r25 = ReadMacInt32(XLM_68K_R25); // Save interrupt level
891		WriteMacInt32(XLM_68K_R25, 0x21); // Execute with interrupt level 1
892	<	static const uint16 proc[] = {
893	<	0x3f3c, 0x0000, // move.w #$0000,-(sp) (fake format word)
894	<	0x487a, 0x000a, // pea @1(pc) (return address)
895	<	0x40e7, // move sr,-(sp) (saved SR)
896	<	0x2078, 0x0064, // move.l $64,a0
897	<	0x4ed0, // jmp (a0)
898	<	M68K_RTS // @1
892	>	static const uint8 proc[] = {
893	>	0x3f, 0x3c, 0x00, 0x00, // move.w #$0000,-(sp) (fake format word)
894	>	0x48, 0x7a, 0x00, 0x0a, // pea @1(pc) (return address)
895	>	0x40, 0xe7, // move sr,-(sp) (saved SR)
896	>	0x20, 0x78, 0x00, 0x064, // move.l $64,a0
897	>	0x4e, 0xd0, // jmp (a0)
898	>	M68K_RTS >> 8, M68K_RTS & 0xff // @1
899		};
900		Execute68k((uint32)proc, &r);
901		WriteMacInt32(XLM_68K_R25, old_r25); // Restore interrupt level
#	Line 582 \| Line 905 \| void HandleInterrupt(void)
905		if (InterruptFlags & INTFLAG_VIA) {
906		ClearInterruptFlag(INTFLAG_VIA);
907		ADBInterrupt();
908	<	ExecutePPC(VideoVBL);
908	>	ExecuteNative(NATIVE_VIDEO_VBL);
909		}
910		}
911		#endif
#	Line 592 \| Line 915 \| void HandleInterrupt(void)
915		}
916		}
917
595	–	/*
596	–	* Execute NATIVE_OP opcode (called by PowerPC emulator)
597	–	*/
598	–
599	–	#define POWERPC_NATIVE_OP(selector) \
600	–	{ tswap32(POWERPC_EMUL_OP \| 2 \| (((uint32)selector) << 6)) }
601	–
602	–	// FIXME: Make sure 32-bit relocations are used
603	–	const uint32 NativeOpTable[NATIVE_OP_MAX] = {
604	–	POWERPC_NATIVE_OP(NATIVE_PATCH_NAME_REGISTRY),
605	–	POWERPC_NATIVE_OP(NATIVE_VIDEO_INSTALL_ACCEL),
606	–	POWERPC_NATIVE_OP(NATIVE_VIDEO_VBL),
607	–	POWERPC_NATIVE_OP(NATIVE_VIDEO_DO_DRIVER_IO),
608	–	POWERPC_NATIVE_OP(NATIVE_ETHER_IRQ),
609	–	POWERPC_NATIVE_OP(NATIVE_ETHER_INIT),
610	–	POWERPC_NATIVE_OP(NATIVE_ETHER_TERM),
611	–	POWERPC_NATIVE_OP(NATIVE_ETHER_OPEN),
612	–	POWERPC_NATIVE_OP(NATIVE_ETHER_CLOSE),
613	–	POWERPC_NATIVE_OP(NATIVE_ETHER_WPUT),
614	–	POWERPC_NATIVE_OP(NATIVE_ETHER_RSRV),
615	–	POWERPC_NATIVE_OP(NATIVE_SERIAL_NOTHING),
616	–	POWERPC_NATIVE_OP(NATIVE_SERIAL_OPEN),
617	–	POWERPC_NATIVE_OP(NATIVE_SERIAL_PRIME_IN),
618	–	POWERPC_NATIVE_OP(NATIVE_SERIAL_PRIME_OUT),
619	–	POWERPC_NATIVE_OP(NATIVE_SERIAL_CONTROL),
620	–	POWERPC_NATIVE_OP(NATIVE_SERIAL_STATUS),
621	–	POWERPC_NATIVE_OP(NATIVE_SERIAL_CLOSE),
622	–	POWERPC_NATIVE_OP(NATIVE_GET_RESOURCE),
623	–	POWERPC_NATIVE_OP(NATIVE_GET_1_RESOURCE),
624	–	POWERPC_NATIVE_OP(NATIVE_GET_IND_RESOURCE),
625	–	POWERPC_NATIVE_OP(NATIVE_GET_1_IND_RESOURCE),
626	–	POWERPC_NATIVE_OP(NATIVE_R_GET_RESOURCE),
627	–	};
628	–
918		static void get_resource(void);
919		static void get_1_resource(void);
920		static void get_ind_resource(void);
#	Line 636 \| Line 925 \| static void r_get_resource(void);
925
926		static void NativeOp(int selector)
927		{
928	+	#if EMUL_TIME_STATS
929	+	native_exec_count++;
930	+	const clock_t native_exec_start = clock();
931	+	#endif
932	+
933		switch (selector) {
934		case NATIVE_PATCH_NAME_REGISTRY:
935		DoPatchNameRegistry();
#	Line 650 \| Line 944 \| static void NativeOp(int selector)
944		GPR(3) = (int32)(int16)VideoDoDriverIO((void )GPR(3), (void )GPR(4),
945		(void *)GPR(5), GPR(6), GPR(7));
946		break;
947	<	case NATIVE_GET_RESOURCE:
948	<	get_resource();
947	>	#ifdef WORDS_BIGENDIAN
948	>	case NATIVE_ETHER_IRQ:
949	>	EtherIRQ();
950		break;
951	<	case NATIVE_GET_1_RESOURCE:
952	<	get_1_resource();
951	>	case NATIVE_ETHER_INIT:
952	>	GPR(3) = InitStreamModule((void *)GPR(3));
953		break;
954	<	case NATIVE_GET_IND_RESOURCE:
955	<	get_ind_resource();
954	>	case NATIVE_ETHER_TERM:
955	>	TerminateStreamModule();
956		break;
957	<	case NATIVE_GET_1_IND_RESOURCE:
958	<	get_1_ind_resource();
957	>	case NATIVE_ETHER_OPEN:
958	>	GPR(3) = ether_open((queue_t )GPR(3), (void )GPR(4), GPR(5), GPR(6), (void*)GPR(7));
959	>	break;
960	>	case NATIVE_ETHER_CLOSE:
961	>	GPR(3) = ether_close((queue_t )GPR(3), GPR(4), (void )GPR(5));
962	>	break;
963	>	case NATIVE_ETHER_WPUT:
964	>	GPR(3) = ether_wput((queue_t )GPR(3), (mblk_t )GPR(4));
965		break;
966	<	case NATIVE_R_GET_RESOURCE:
967	<	r_get_resource();
966	>	case NATIVE_ETHER_RSRV:
967	>	GPR(3) = ether_rsrv((queue_t *)GPR(3));
968		break;
969	+	#else
970	+	case NATIVE_ETHER_INIT:
971	+	// FIXME: needs more complicated thunks
972	+	GPR(3) = false;
973	+	break;
974	+	#endif
975		case NATIVE_SERIAL_NOTHING:
976		case NATIVE_SERIAL_OPEN:
977		case NATIVE_SERIAL_PRIME_IN:
#	Line 685 \| Line 992 \| static void NativeOp(int selector)
992		GPR(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](GPR(3), GPR(4));
993		break;
994		}
995	+	case NATIVE_GET_RESOURCE:
996	+	case NATIVE_GET_1_RESOURCE:
997	+	case NATIVE_GET_IND_RESOURCE:
998	+	case NATIVE_GET_1_IND_RESOURCE:
999	+	case NATIVE_R_GET_RESOURCE: {
1000	+	typedef void (*GetResourceCallback)(void);
1001	+	static const GetResourceCallback get_resource_callbacks[] = {
1002	+	get_resource,
1003	+	get_1_resource,
1004	+	get_ind_resource,
1005	+	get_1_ind_resource,
1006	+	r_get_resource
1007	+	};
1008	+	get_resource_callbacks[selector - NATIVE_GET_RESOURCE]();
1009	+	break;
1010	+	}
1011	+	case NATIVE_DISABLE_INTERRUPT:
1012	+	DisableInterrupt();
1013	+	break;
1014	+	case NATIVE_ENABLE_INTERRUPT:
1015	+	EnableInterrupt();
1016	+	break;
1017	+	case NATIVE_MAKE_EXECUTABLE:
1018	+	MakeExecutable(0, (void *)GPR(4), GPR(5));
1019	+	break;
1020	+	case NATIVE_CHECK_LOAD_INVOC:
1021	+	check_load_invoc(GPR(3), GPR(4), GPR(5));
1022	+	break;
1023		default:
1024		printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector);
1025		QuitEmulator();
1026		break;
1027		}
693	–	}
1028
1029	<	/*
1030	<	* Execute native subroutine (LR must contain return address)
1031	<	*/
698	<
699	<	void ExecuteNative(int selector)
700	<	{
701	<	uint32 tvect[2];
702	<	tvect[0] = tswap32(POWERPC_NATIVE_OP_FUNC(selector));
703	<	tvect[1] = 0; // Fake TVECT
704	<	RoutineDescriptor desc = BUILD_PPC_ROUTINE_DESCRIPTOR(0, tvect);
705	<	M68kRegisters r;
706	<	Execute68k((uint32)&desc, &r);
1029	>	#if EMUL_TIME_STATS
1030	>	native_exec_time += (clock() - native_exec_start);
1031	>	#endif
1032		}
1033
1034		/*
#	Line 724 \| Line 1049 \| void Execute68k(uint32 pc, M68kRegisters
1049
1050		void Execute68kTrap(uint16 trap, M68kRegisters *r)
1051		{
1052	<	uint16 proc[2] = {trap, M68K_RTS};
1053	<	Execute68k((uint32)proc, r);
1052	>	SheepVar proc_var(4);
1053	>	uint32 proc = proc_var.addr();
1054	>	WriteMacInt16(proc, trap);
1055	>	WriteMacInt16(proc + 2, M68K_RTS);
1056	>	Execute68k(proc, r);
1057		}
1058
1059		/*
#	Line 780 \| Line 1108 \| uint32 call_macos7(uint32 tvect, uint32
1108		}
1109
1110		/*
783	–	* Atomic operations
784	–	*/
785	–
786	–	int atomic_add(int *var, int v)
787	–	{
788	–	int ret = *var;
789	–	*var += v;
790	–	return ret;
791	–	}
792	–
793	–	int atomic_and(int *var, int v)
794	–	{
795	–	int ret = *var;
796	–	*var &= v;
797	–	return ret;
798	–	}
799	–
800	–	int atomic_or(int *var, int v)
801	–	{
802	–	int ret = *var;
803	–	*var \|= v;
804	–	return ret;
805	–	}
806	–
807	–	/*
1111		* Resource Manager thunks
1112		*/
1113
811	–	extern "C" void check_load_invoc(uint32 type, int16 id, uint16 **h);
812	–
1114		void get_resource(void)
1115		{
1116		current_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));

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+Removed lines
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+Changed lines
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Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents): Revision 1.1 by gbeauche, 2003-09-07T14:25:01Z vs. Revision 1.26 by gbeauche, 2004-01-24T11:28:06Z

Diff Legend

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.1 by gbeauche, 2003-09-07T14:25:01Z vs.
Revision 1.26 by gbeauche, 2004-01-24T11:28:06Z