57 |
|
} |
58 |
|
|
59 |
|
// Enable multicore (main/interrupts) cpu emulation? |
60 |
< |
#define MULTICORE_CPU 0 |
60 |
> |
#define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0) |
61 |
|
|
62 |
|
// Enable Execute68k() safety checks? |
63 |
|
#define SAFE_EXEC_68K 1 |
604 |
|
* Handle PowerPC interrupt |
605 |
|
*/ |
606 |
|
|
607 |
– |
// Atomic operations |
608 |
– |
extern int atomic_add(int *var, int v); |
609 |
– |
extern int atomic_and(int *var, int v); |
610 |
– |
extern int atomic_or(int *var, int v); |
611 |
– |
|
607 |
|
#if !ASYNC_IRQ |
608 |
|
void TriggerInterrupt(void) |
609 |
|
{ |
897 |
|
} |
898 |
|
|
899 |
|
/* |
905 |
– |
* Atomic operations |
906 |
– |
*/ |
907 |
– |
|
908 |
– |
int atomic_add(int *var, int v) |
909 |
– |
{ |
910 |
– |
int ret = *var; |
911 |
– |
*var += v; |
912 |
– |
return ret; |
913 |
– |
} |
914 |
– |
|
915 |
– |
int atomic_and(int *var, int v) |
916 |
– |
{ |
917 |
– |
int ret = *var; |
918 |
– |
*var &= v; |
919 |
– |
return ret; |
920 |
– |
} |
921 |
– |
|
922 |
– |
int atomic_or(int *var, int v) |
923 |
– |
{ |
924 |
– |
int ret = *var; |
925 |
– |
*var |= v; |
926 |
– |
return ret; |
927 |
– |
} |
928 |
– |
|
929 |
– |
/* |
900 |
|
* Resource Manager thunks |
901 |
|
*/ |
902 |
|
|