28 |
|
#include "macos_util.h" |
29 |
|
#include "block-alloc.hpp" |
30 |
|
#include "sigsegv.h" |
31 |
– |
#include "spcflags.h" |
31 |
|
#include "cpu/ppc/ppc-cpu.hpp" |
32 |
|
#include "cpu/ppc/ppc-operations.hpp" |
33 |
+ |
#include "cpu/ppc/ppc-instructions.hpp" |
34 |
+ |
#include "thunks.h" |
35 |
|
|
36 |
|
// Used for NativeOp trampolines |
37 |
|
#include "video.h" |
38 |
|
#include "name_registry.h" |
39 |
|
#include "serial.h" |
40 |
+ |
#include "ether.h" |
41 |
|
|
42 |
|
#include <stdio.h> |
43 |
|
|
46 |
|
#include "mon_disass.h" |
47 |
|
#endif |
48 |
|
|
49 |
< |
#define DEBUG 1 |
49 |
> |
#define DEBUG 0 |
50 |
|
#include "debug.h" |
51 |
|
|
52 |
+ |
// Emulation time statistics |
53 |
+ |
#define EMUL_TIME_STATS 1 |
54 |
+ |
|
55 |
+ |
#if EMUL_TIME_STATS |
56 |
+ |
static clock_t emul_start_time; |
57 |
+ |
static uint32 interrupt_count = 0; |
58 |
+ |
static clock_t interrupt_time = 0; |
59 |
+ |
static uint32 exec68k_count = 0; |
60 |
+ |
static clock_t exec68k_time = 0; |
61 |
+ |
static uint32 native_exec_count = 0; |
62 |
+ |
static clock_t native_exec_time = 0; |
63 |
+ |
static uint32 macos_exec_count = 0; |
64 |
+ |
static clock_t macos_exec_time = 0; |
65 |
+ |
#endif |
66 |
+ |
|
67 |
|
static void enter_mon(void) |
68 |
|
{ |
69 |
|
// Start up mon in real-mode |
73 |
|
#endif |
74 |
|
} |
75 |
|
|
76 |
+ |
// From main_*.cpp |
77 |
+ |
extern uintptr SignalStackBase(); |
78 |
+ |
|
79 |
+ |
// PowerPC EmulOp to exit from emulation looop |
80 |
+ |
const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1; |
81 |
+ |
|
82 |
|
// Enable multicore (main/interrupts) cpu emulation? |
83 |
< |
#define MULTICORE_CPU 0 |
83 |
> |
#define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0) |
84 |
|
|
85 |
|
// Enable Execute68k() safety checks? |
86 |
|
#define SAFE_EXEC_68K 1 |
97 |
|
// Pointer to Kernel Data |
98 |
|
static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE; |
99 |
|
|
100 |
+ |
// SIGSEGV handler |
101 |
+ |
static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t); |
102 |
+ |
|
103 |
+ |
// JIT Compiler enabled? |
104 |
+ |
static inline bool enable_jit_p() |
105 |
+ |
{ |
106 |
+ |
return PrefsFindBool("jit"); |
107 |
+ |
} |
108 |
+ |
|
109 |
|
|
110 |
|
/** |
111 |
|
* PowerPC emulator glue with special 'sheep' opcodes |
112 |
|
**/ |
113 |
|
|
114 |
< |
struct sheepshaver_exec_return { }; |
114 |
> |
enum { |
115 |
> |
PPC_I(SHEEP) = PPC_I(MAX), |
116 |
> |
PPC_I(SHEEP_MAX) |
117 |
> |
}; |
118 |
|
|
119 |
|
class sheepshaver_cpu |
120 |
|
: public powerpc_cpu |
124 |
|
|
125 |
|
public: |
126 |
|
|
127 |
< |
sheepshaver_cpu() |
128 |
< |
: powerpc_cpu() |
94 |
< |
{ init_decoder(); } |
127 |
> |
// Constructor |
128 |
> |
sheepshaver_cpu(); |
129 |
|
|
130 |
< |
// Condition Register accessors |
130 |
> |
// CR & XER accessors |
131 |
|
uint32 get_cr() const { return cr().get(); } |
132 |
|
void set_cr(uint32 v) { cr().set(v); } |
133 |
< |
|
134 |
< |
// Execution loop |
101 |
< |
void execute(uint32 pc); |
133 |
> |
uint32 get_xer() const { return xer().get(); } |
134 |
> |
void set_xer(uint32 v) { xer().set(v); } |
135 |
|
|
136 |
|
// Execute 68k routine |
137 |
|
void execute_68k(uint32 entry, M68kRegisters *r); |
147 |
|
|
148 |
|
// Handle MacOS interrupt |
149 |
|
void interrupt(uint32 entry); |
150 |
< |
|
118 |
< |
// spcflags for interrupts handling |
119 |
< |
static uint32 spcflags; |
150 |
> |
void handle_interrupt(); |
151 |
|
|
152 |
|
// Lazy memory allocator (one item at a time) |
153 |
|
void *operator new(size_t size) |
157 |
|
// FIXME: really make surre array allocation fail at link time? |
158 |
|
void *operator new[](size_t); |
159 |
|
void operator delete[](void *p); |
160 |
+ |
|
161 |
+ |
// Make sure the SIGSEGV handler can access CPU registers |
162 |
+ |
friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t); |
163 |
|
}; |
164 |
|
|
131 |
– |
uint32 sheepshaver_cpu::spcflags = 0; |
165 |
|
lazy_allocator< sheepshaver_cpu > allocator_helper< sheepshaver_cpu, lazy_allocator >::allocator; |
166 |
|
|
167 |
+ |
sheepshaver_cpu::sheepshaver_cpu() |
168 |
+ |
: powerpc_cpu(enable_jit_p()) |
169 |
+ |
{ |
170 |
+ |
init_decoder(); |
171 |
+ |
} |
172 |
+ |
|
173 |
|
void sheepshaver_cpu::init_decoder() |
174 |
|
{ |
175 |
|
#ifndef PPC_NO_STATIC_II_INDEX_TABLE |
181 |
|
|
182 |
|
static const instr_info_t sheep_ii_table[] = { |
183 |
|
{ "sheep", |
184 |
< |
(execute_fn)&sheepshaver_cpu::execute_sheep, |
184 |
> |
(execute_pmf)&sheepshaver_cpu::execute_sheep, |
185 |
|
NULL, |
186 |
+ |
PPC_I(SHEEP), |
187 |
|
D_form, 6, 0, CFLOW_JUMP | CFLOW_TRAP |
188 |
|
} |
189 |
|
}; |
223 |
|
break; |
224 |
|
|
225 |
|
case 1: // EXEC_RETURN |
226 |
< |
throw sheepshaver_exec_return(); |
226 |
> |
spcflags().set(SPCFLAG_CPU_EXEC_RETURN); |
227 |
|
break; |
228 |
|
|
229 |
|
case 2: // EXEC_NATIVE |
243 |
|
for (int i = 0; i < 7; i++) |
244 |
|
r68.a[i] = gpr(16 + i); |
245 |
|
r68.a[7] = gpr(1); |
246 |
+ |
uint32 saved_cr = get_cr() & CR_field<2>::mask(); |
247 |
+ |
uint32 saved_xer = get_xer(); |
248 |
|
EmulOp(&r68, gpr(24), EMUL_OP_field::extract(opcode) - 3); |
249 |
+ |
set_cr(saved_cr); |
250 |
+ |
set_xer(saved_xer); |
251 |
|
for (int i = 0; i < 8; i++) |
252 |
|
gpr(8 + i) = r68.d[i]; |
253 |
|
for (int i = 0; i < 7; i++) |
260 |
|
} |
261 |
|
} |
262 |
|
|
219 |
– |
// Checks for pending interrupts |
220 |
– |
struct execute_nothing { |
221 |
– |
static inline void execute(powerpc_cpu *) { } |
222 |
– |
}; |
223 |
– |
|
224 |
– |
struct execute_spcflags_check { |
225 |
– |
static inline void execute(powerpc_cpu *cpu) { |
226 |
– |
#if !ASYNC_IRQ |
227 |
– |
if (SPCFLAGS_TEST(SPCFLAG_ALL_BUT_EXEC_RETURN)) { |
228 |
– |
if (SPCFLAGS_TEST( SPCFLAG_ENTER_MON )) { |
229 |
– |
SPCFLAGS_CLEAR( SPCFLAG_ENTER_MON ); |
230 |
– |
enter_mon(); |
231 |
– |
} |
232 |
– |
if (SPCFLAGS_TEST( SPCFLAG_DOINT )) { |
233 |
– |
SPCFLAGS_CLEAR( SPCFLAG_DOINT ); |
234 |
– |
HandleInterrupt(); |
235 |
– |
} |
236 |
– |
if (SPCFLAGS_TEST( SPCFLAG_INT )) { |
237 |
– |
SPCFLAGS_CLEAR( SPCFLAG_INT ); |
238 |
– |
SPCFLAGS_SET( SPCFLAG_DOINT ); |
239 |
– |
} |
240 |
– |
} |
241 |
– |
#endif |
242 |
– |
} |
243 |
– |
}; |
244 |
– |
|
245 |
– |
// Execution loop |
246 |
– |
void sheepshaver_cpu::execute(uint32 entry) |
247 |
– |
{ |
248 |
– |
try { |
249 |
– |
pc() = entry; |
250 |
– |
powerpc_cpu::do_execute<execute_nothing, execute_spcflags_check>(); |
251 |
– |
} |
252 |
– |
catch (sheepshaver_exec_return const &) { |
253 |
– |
// Nothing, simply return |
254 |
– |
} |
255 |
– |
catch (...) { |
256 |
– |
printf("ERROR: execute() received an unknown exception!\n"); |
257 |
– |
QuitEmulator(); |
258 |
– |
} |
259 |
– |
} |
260 |
– |
|
263 |
|
// Handle MacOS interrupt |
264 |
|
void sheepshaver_cpu::interrupt(uint32 entry) |
265 |
|
{ |
266 |
+ |
#if EMUL_TIME_STATS |
267 |
+ |
interrupt_count++; |
268 |
+ |
const clock_t interrupt_start = clock(); |
269 |
+ |
#endif |
270 |
+ |
|
271 |
|
#if !MULTICORE_CPU |
272 |
|
// Save program counters and branch registers |
273 |
|
uint32 saved_pc = pc(); |
277 |
|
#endif |
278 |
|
|
279 |
|
// Initialize stack pointer to SheepShaver alternate stack base |
280 |
< |
gpr(1) = SheepStack1Base - 64; |
280 |
> |
gpr(1) = SignalStackBase() - 64; |
281 |
|
|
282 |
|
// Build trampoline to return from interrupt |
283 |
< |
uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) }; |
283 |
> |
SheepVar32 trampoline = POWERPC_EXEC_RETURN; |
284 |
|
|
285 |
|
// Prepare registers for nanokernel interrupt routine |
286 |
|
kernel_data->v[0x004 >> 2] = htonl(gpr(1)); |
299 |
|
gpr(1) = KernelDataAddr; |
300 |
|
gpr(7) = ntohl(kernel_data->v[0x660 >> 2]); |
301 |
|
gpr(8) = 0; |
302 |
< |
gpr(10) = (uint32)trampoline; |
303 |
< |
gpr(12) = (uint32)trampoline; |
302 |
> |
gpr(10) = trampoline.addr(); |
303 |
> |
gpr(12) = trampoline.addr(); |
304 |
|
gpr(13) = get_cr(); |
305 |
|
|
306 |
|
// rlwimi. r7,r7,8,0,0 |
321 |
|
ctr()= saved_ctr; |
322 |
|
gpr(1) = saved_sp; |
323 |
|
#endif |
324 |
+ |
|
325 |
+ |
#if EMUL_TIME_STATS |
326 |
+ |
interrupt_time += (clock() - interrupt_start); |
327 |
+ |
#endif |
328 |
|
} |
329 |
|
|
330 |
|
// Execute 68k routine |
331 |
|
void sheepshaver_cpu::execute_68k(uint32 entry, M68kRegisters *r) |
332 |
|
{ |
333 |
+ |
#if EMUL_TIME_STATS |
334 |
+ |
exec68k_count++; |
335 |
+ |
const clock_t exec68k_start = clock(); |
336 |
+ |
#endif |
337 |
+ |
|
338 |
|
#if SAFE_EXEC_68K |
339 |
|
if (ReadMacInt32(XLM_RUN_MODE) != MODE_EMUL_OP) |
340 |
|
printf("FATAL: Execute68k() not called from EMUL_OP mode\n"); |
417 |
|
lr() = saved_lr; |
418 |
|
ctr()= saved_ctr; |
419 |
|
set_cr(saved_cr); |
420 |
+ |
|
421 |
+ |
#if EMUL_TIME_STATS |
422 |
+ |
exec68k_time += (clock() - exec68k_start); |
423 |
+ |
#endif |
424 |
|
} |
425 |
|
|
426 |
|
// Call MacOS PPC code |
427 |
|
uint32 sheepshaver_cpu::execute_macos_code(uint32 tvect, int nargs, uint32 const *args) |
428 |
|
{ |
429 |
+ |
#if EMUL_TIME_STATS |
430 |
+ |
macos_exec_count++; |
431 |
+ |
const clock_t macos_exec_start = clock(); |
432 |
+ |
#endif |
433 |
+ |
|
434 |
|
// Save program counters and branch registers |
435 |
|
uint32 saved_pc = pc(); |
436 |
|
uint32 saved_lr = lr(); |
437 |
|
uint32 saved_ctr= ctr(); |
438 |
|
|
439 |
|
// Build trampoline with EXEC_RETURN |
440 |
< |
uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) }; |
441 |
< |
lr() = (uint32)trampoline; |
440 |
> |
SheepVar32 trampoline = POWERPC_EXEC_RETURN; |
441 |
> |
lr() = trampoline.addr(); |
442 |
|
|
443 |
|
gpr(1) -= 64; // Create stack frame |
444 |
|
uint32 proc = ReadMacInt32(tvect); // Get routine address |
469 |
|
lr() = saved_lr; |
470 |
|
ctr()= saved_ctr; |
471 |
|
|
472 |
+ |
#if EMUL_TIME_STATS |
473 |
+ |
macos_exec_time += (clock() - macos_exec_start); |
474 |
+ |
#endif |
475 |
+ |
|
476 |
|
return retval; |
477 |
|
} |
478 |
|
|
482 |
|
// Save branch registers |
483 |
|
uint32 saved_lr = lr(); |
484 |
|
|
485 |
< |
const uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) }; |
486 |
< |
lr() = (uint32)trampoline; |
485 |
> |
SheepVar32 trampoline = POWERPC_EXEC_RETURN; |
486 |
> |
WriteMacInt32(trampoline.addr(), POWERPC_EXEC_RETURN); |
487 |
> |
lr() = trampoline.addr(); |
488 |
|
|
489 |
|
execute(entry); |
490 |
|
|
578 |
|
if ((addr - ROM_BASE) < ROM_SIZE) |
579 |
|
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
580 |
|
|
581 |
< |
// Ignore all other faults, if requested |
582 |
< |
if (PrefsFindBool("ignoresegv")) |
583 |
< |
return SIGSEGV_RETURN_FAILURE; |
581 |
> |
// Get program counter of target CPU |
582 |
> |
sheepshaver_cpu * const cpu = current_cpu; |
583 |
> |
const uint32 pc = cpu->pc(); |
584 |
> |
|
585 |
> |
// Fault in Mac ROM or RAM? |
586 |
> |
bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize)); |
587 |
> |
if (mac_fault) { |
588 |
> |
|
589 |
> |
// "VM settings" during MacOS 8 installation |
590 |
> |
if (pc == ROM_BASE + 0x488160 && cpu->gpr(20) == 0xf8000000) |
591 |
> |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
592 |
> |
|
593 |
> |
// MacOS 8.5 installation |
594 |
> |
else if (pc == ROM_BASE + 0x488140 && cpu->gpr(16) == 0xf8000000) |
595 |
> |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
596 |
> |
|
597 |
> |
// MacOS 8 serial drivers on startup |
598 |
> |
else if (pc == ROM_BASE + 0x48e080 && (cpu->gpr(8) == 0xf3012002 || cpu->gpr(8) == 0xf3012000)) |
599 |
> |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
600 |
> |
|
601 |
> |
// MacOS 8.1 serial drivers on startup |
602 |
> |
else if (pc == ROM_BASE + 0x48c5e0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000)) |
603 |
> |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
604 |
> |
else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000)) |
605 |
> |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
606 |
> |
|
607 |
> |
// Ignore all other faults, if requested |
608 |
> |
if (PrefsFindBool("ignoresegv")) |
609 |
> |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
610 |
> |
} |
611 |
|
#else |
612 |
|
#error "FIXME: You don't have the capability to skip instruction within signal handlers" |
613 |
|
#endif |
629 |
|
// Initialize main CPU emulator |
630 |
|
main_cpu = new sheepshaver_cpu(); |
631 |
|
main_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000)); |
632 |
+ |
main_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000)); |
633 |
|
WriteMacInt32(XLM_RUN_MODE, MODE_68K); |
634 |
|
|
635 |
|
#if MULTICORE_CPU |
645 |
|
mon_add_command("regs", dump_registers, "regs Dump PowerPC registers\n"); |
646 |
|
mon_add_command("log", dump_log, "log Dump PowerPC emulation log\n"); |
647 |
|
#endif |
648 |
+ |
|
649 |
+ |
#if EMUL_TIME_STATS |
650 |
+ |
emul_start_time = clock(); |
651 |
+ |
#endif |
652 |
+ |
} |
653 |
+ |
|
654 |
+ |
/* |
655 |
+ |
* Deinitialize emulation |
656 |
+ |
*/ |
657 |
+ |
|
658 |
+ |
void exit_emul_ppc(void) |
659 |
+ |
{ |
660 |
+ |
#if EMUL_TIME_STATS |
661 |
+ |
clock_t emul_end_time = clock(); |
662 |
+ |
|
663 |
+ |
printf("### Statistics for SheepShaver emulation parts\n"); |
664 |
+ |
const clock_t emul_time = emul_end_time - emul_start_time; |
665 |
+ |
printf("Total emulation time : %.1f sec\n", double(emul_time) / double(CLOCKS_PER_SEC)); |
666 |
+ |
printf("Total interrupt count: %d (%2.1f Hz)\n", interrupt_count, |
667 |
+ |
(double(interrupt_count) * CLOCKS_PER_SEC) / double(emul_time)); |
668 |
+ |
|
669 |
+ |
#define PRINT_STATS(LABEL, VAR_PREFIX) do { \ |
670 |
+ |
printf("Total " LABEL " count : %d\n", VAR_PREFIX##_count); \ |
671 |
+ |
printf("Total " LABEL " time : %.1f sec (%.1f%%)\n", \ |
672 |
+ |
double(VAR_PREFIX##_time) / double(CLOCKS_PER_SEC), \ |
673 |
+ |
100.0 * double(VAR_PREFIX##_time) / double(emul_time)); \ |
674 |
+ |
} while (0) |
675 |
+ |
|
676 |
+ |
PRINT_STATS("Execute68k[Trap] execution", exec68k); |
677 |
+ |
PRINT_STATS("NativeOp execution", native_exec); |
678 |
+ |
PRINT_STATS("MacOS routine execution", macos_exec); |
679 |
+ |
|
680 |
+ |
#undef PRINT_STATS |
681 |
+ |
printf("\n"); |
682 |
+ |
#endif |
683 |
+ |
|
684 |
+ |
delete main_cpu; |
685 |
+ |
#if MULTICORE_CPU |
686 |
+ |
delete interrupt_cpu; |
687 |
+ |
#endif |
688 |
|
} |
689 |
|
|
690 |
|
/* |
694 |
|
void emul_ppc(uint32 entry) |
695 |
|
{ |
696 |
|
current_cpu = main_cpu; |
697 |
+ |
#if 0 |
698 |
|
current_cpu->start_log(); |
699 |
+ |
#endif |
700 |
+ |
// start emulation loop and enable code translation or caching |
701 |
|
current_cpu->execute(entry); |
702 |
|
} |
703 |
|
|
705 |
|
* Handle PowerPC interrupt |
706 |
|
*/ |
707 |
|
|
708 |
< |
// Atomic operations |
709 |
< |
extern int atomic_add(int *var, int v); |
710 |
< |
extern int atomic_and(int *var, int v); |
711 |
< |
extern int atomic_or(int *var, int v); |
712 |
< |
|
713 |
< |
#if !ASYNC_IRQ |
708 |
> |
#if ASYNC_IRQ |
709 |
> |
void HandleInterrupt(void) |
710 |
> |
{ |
711 |
> |
main_cpu->handle_interrupt(); |
712 |
> |
} |
713 |
> |
#else |
714 |
|
void TriggerInterrupt(void) |
715 |
|
{ |
716 |
|
#if 0 |
717 |
|
WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1); |
718 |
|
#else |
719 |
< |
SPCFLAGS_SET( SPCFLAG_INT ); |
719 |
> |
// Trigger interrupt to main cpu only |
720 |
> |
if (main_cpu) |
721 |
> |
main_cpu->trigger_interrupt(); |
722 |
|
#endif |
723 |
|
} |
724 |
|
#endif |
725 |
|
|
726 |
< |
void HandleInterrupt(void) |
726 |
> |
void sheepshaver_cpu::handle_interrupt(void) |
727 |
|
{ |
728 |
|
// Do nothing if interrupts are disabled |
729 |
< |
if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0) |
729 |
> |
if (*(int32 *)XLM_IRQ_NEST > 0) |
730 |
|
return; |
731 |
|
|
732 |
|
// Do nothing if there is no interrupt pending |
742 |
|
// 68k emulator active, trigger 68k interrupt level 1 |
743 |
|
assert(current_cpu == main_cpu); |
744 |
|
WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1); |
745 |
< |
main_cpu->set_cr(main_cpu->get_cr() | tswap32(kernel_data->v[0x674 >> 2])); |
745 |
> |
set_cr(get_cr() | tswap32(kernel_data->v[0x674 >> 2])); |
746 |
|
break; |
747 |
|
|
748 |
|
#if INTERRUPTS_IN_NATIVE_MODE |
749 |
|
case MODE_NATIVE: |
750 |
|
// 68k emulator inactive, in nanokernel? |
751 |
|
assert(current_cpu == main_cpu); |
752 |
< |
if (main_cpu->gpr(1) != KernelDataAddr) { |
752 |
> |
if (gpr(1) != KernelDataAddr) { |
753 |
|
// Prepare for 68k interrupt level 1 |
754 |
|
WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1); |
755 |
|
WriteMacInt32(tswap32(kernel_data->v[0x658 >> 2]) + 0xdc, |
793 |
|
if (InterruptFlags & INTFLAG_VIA) { |
794 |
|
ClearInterruptFlag(INTFLAG_VIA); |
795 |
|
ADBInterrupt(); |
796 |
< |
ExecutePPC(VideoVBL); |
796 |
> |
ExecuteNative(NATIVE_VIDEO_VBL); |
797 |
|
} |
798 |
|
} |
799 |
|
#endif |
803 |
|
} |
804 |
|
} |
805 |
|
|
703 |
– |
/* |
704 |
– |
* Execute NATIVE_OP opcode (called by PowerPC emulator) |
705 |
– |
*/ |
706 |
– |
|
707 |
– |
#define POWERPC_NATIVE_OP_INIT(LR, OP) \ |
708 |
– |
tswap32(POWERPC_EMUL_OP | ((LR) << 11) | (((uint32)OP) << 6) | 2) |
709 |
– |
|
710 |
– |
// FIXME: Make sure 32-bit relocations are used |
711 |
– |
const uint32 NativeOpTable[NATIVE_OP_MAX] = { |
712 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_PATCH_NAME_REGISTRY), |
713 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_INSTALL_ACCEL), |
714 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_VBL), |
715 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_DO_DRIVER_IO), |
716 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_IRQ), |
717 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_INIT), |
718 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_TERM), |
719 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_OPEN), |
720 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_CLOSE), |
721 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_WPUT), |
722 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_RSRV), |
723 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_NOTHING), |
724 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_OPEN), |
725 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_IN), |
726 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_OUT), |
727 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CONTROL), |
728 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_STATUS), |
729 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CLOSE), |
730 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_RESOURCE), |
731 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_RESOURCE), |
732 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_IND_RESOURCE), |
733 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_IND_RESOURCE), |
734 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_R_GET_RESOURCE), |
735 |
– |
POWERPC_NATIVE_OP_INIT(0, NATIVE_DISABLE_INTERRUPT), |
736 |
– |
POWERPC_NATIVE_OP_INIT(0, NATIVE_ENABLE_INTERRUPT), |
737 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_MAKE_EXECUTABLE), |
738 |
– |
}; |
739 |
– |
|
806 |
|
static void get_resource(void); |
807 |
|
static void get_1_resource(void); |
808 |
|
static void get_ind_resource(void); |
813 |
|
|
814 |
|
static void NativeOp(int selector) |
815 |
|
{ |
816 |
+ |
#if EMUL_TIME_STATS |
817 |
+ |
native_exec_count++; |
818 |
+ |
const clock_t native_exec_start = clock(); |
819 |
+ |
#endif |
820 |
+ |
|
821 |
|
switch (selector) { |
822 |
|
case NATIVE_PATCH_NAME_REGISTRY: |
823 |
|
DoPatchNameRegistry(); |
832 |
|
GPR(3) = (int32)(int16)VideoDoDriverIO((void *)GPR(3), (void *)GPR(4), |
833 |
|
(void *)GPR(5), GPR(6), GPR(7)); |
834 |
|
break; |
835 |
< |
case NATIVE_GET_RESOURCE: |
836 |
< |
get_resource(); |
835 |
> |
#ifdef WORDS_BIGENDIAN |
836 |
> |
case NATIVE_ETHER_IRQ: |
837 |
> |
EtherIRQ(); |
838 |
|
break; |
839 |
< |
case NATIVE_GET_1_RESOURCE: |
840 |
< |
get_1_resource(); |
839 |
> |
case NATIVE_ETHER_INIT: |
840 |
> |
GPR(3) = InitStreamModule((void *)GPR(3)); |
841 |
|
break; |
842 |
< |
case NATIVE_GET_IND_RESOURCE: |
843 |
< |
get_ind_resource(); |
842 |
> |
case NATIVE_ETHER_TERM: |
843 |
> |
TerminateStreamModule(); |
844 |
|
break; |
845 |
< |
case NATIVE_GET_1_IND_RESOURCE: |
846 |
< |
get_1_ind_resource(); |
845 |
> |
case NATIVE_ETHER_OPEN: |
846 |
> |
GPR(3) = ether_open((queue_t *)GPR(3), (void *)GPR(4), GPR(5), GPR(6), (void*)GPR(7)); |
847 |
> |
break; |
848 |
> |
case NATIVE_ETHER_CLOSE: |
849 |
> |
GPR(3) = ether_close((queue_t *)GPR(3), GPR(4), (void *)GPR(5)); |
850 |
|
break; |
851 |
< |
case NATIVE_R_GET_RESOURCE: |
852 |
< |
r_get_resource(); |
851 |
> |
case NATIVE_ETHER_WPUT: |
852 |
> |
GPR(3) = ether_wput((queue_t *)GPR(3), (mblk_t *)GPR(4)); |
853 |
|
break; |
854 |
+ |
case NATIVE_ETHER_RSRV: |
855 |
+ |
GPR(3) = ether_rsrv((queue_t *)GPR(3)); |
856 |
+ |
break; |
857 |
+ |
#else |
858 |
+ |
case NATIVE_ETHER_INIT: |
859 |
+ |
// FIXME: needs more complicated thunks |
860 |
+ |
GPR(3) = false; |
861 |
+ |
break; |
862 |
+ |
#endif |
863 |
|
case NATIVE_SERIAL_NOTHING: |
864 |
|
case NATIVE_SERIAL_OPEN: |
865 |
|
case NATIVE_SERIAL_PRIME_IN: |
880 |
|
GPR(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](GPR(3), GPR(4)); |
881 |
|
break; |
882 |
|
} |
883 |
+ |
case NATIVE_GET_RESOURCE: |
884 |
+ |
case NATIVE_GET_1_RESOURCE: |
885 |
+ |
case NATIVE_GET_IND_RESOURCE: |
886 |
+ |
case NATIVE_GET_1_IND_RESOURCE: |
887 |
+ |
case NATIVE_R_GET_RESOURCE: { |
888 |
+ |
typedef void (*GetResourceCallback)(void); |
889 |
+ |
static const GetResourceCallback get_resource_callbacks[] = { |
890 |
+ |
get_resource, |
891 |
+ |
get_1_resource, |
892 |
+ |
get_ind_resource, |
893 |
+ |
get_1_ind_resource, |
894 |
+ |
r_get_resource |
895 |
+ |
}; |
896 |
+ |
get_resource_callbacks[selector - NATIVE_GET_RESOURCE](); |
897 |
+ |
break; |
898 |
+ |
} |
899 |
|
case NATIVE_DISABLE_INTERRUPT: |
900 |
|
DisableInterrupt(); |
901 |
|
break; |
910 |
|
QuitEmulator(); |
911 |
|
break; |
912 |
|
} |
813 |
– |
} |
814 |
– |
|
815 |
– |
/* |
816 |
– |
* Execute native subroutine (LR must contain return address) |
817 |
– |
*/ |
913 |
|
|
914 |
< |
void ExecuteNative(int selector) |
915 |
< |
{ |
916 |
< |
uint32 tvect[2]; |
822 |
< |
tvect[0] = tswap32(POWERPC_NATIVE_OP_FUNC(selector)); |
823 |
< |
tvect[1] = 0; // Fake TVECT |
824 |
< |
RoutineDescriptor desc = BUILD_PPC_ROUTINE_DESCRIPTOR(0, tvect); |
825 |
< |
M68kRegisters r; |
826 |
< |
Execute68k((uint32)&desc, &r); |
914 |
> |
#if EMUL_TIME_STATS |
915 |
> |
native_exec_time += (clock() - native_exec_start); |
916 |
> |
#endif |
917 |
|
} |
918 |
|
|
919 |
|
/* |
934 |
|
|
935 |
|
void Execute68kTrap(uint16 trap, M68kRegisters *r) |
936 |
|
{ |
937 |
< |
uint16 proc[2]; |
938 |
< |
proc[0] = htons(trap); |
939 |
< |
proc[1] = htons(M68K_RTS); |
940 |
< |
Execute68k((uint32)proc, r); |
937 |
> |
SheepVar proc_var(4); |
938 |
> |
uint32 proc = proc_var.addr(); |
939 |
> |
WriteMacInt16(proc, trap); |
940 |
> |
WriteMacInt16(proc + 2, M68K_RTS); |
941 |
> |
Execute68k(proc, r); |
942 |
|
} |
943 |
|
|
944 |
|
/* |
993 |
|
} |
994 |
|
|
995 |
|
/* |
905 |
– |
* Atomic operations |
906 |
– |
*/ |
907 |
– |
|
908 |
– |
int atomic_add(int *var, int v) |
909 |
– |
{ |
910 |
– |
int ret = *var; |
911 |
– |
*var += v; |
912 |
– |
return ret; |
913 |
– |
} |
914 |
– |
|
915 |
– |
int atomic_and(int *var, int v) |
916 |
– |
{ |
917 |
– |
int ret = *var; |
918 |
– |
*var &= v; |
919 |
– |
return ret; |
920 |
– |
} |
921 |
– |
|
922 |
– |
int atomic_or(int *var, int v) |
923 |
– |
{ |
924 |
– |
int ret = *var; |
925 |
– |
*var |= v; |
926 |
– |
return ret; |
927 |
– |
} |
928 |
– |
|
929 |
– |
/* |
996 |
|
* Resource Manager thunks |
997 |
|
*/ |
998 |
|
|