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root/cebix/SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.68 by gbeauche, 2006-05-03T21:45:14Z vs.
Revision 1.77 by asvitkine, 2012-06-16T02:16:40Z

#	Line 1 | Line 1
1		/*
2		*  sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface
3		*
4	<	*  SheepShaver (C) 1997-2005 Christian Bauer and Marc Hellwig
4	>	*  SheepShaver (C) 1997-2008 Christian Bauer and Marc Hellwig
5		*
6		*  This program is free software; you can redistribute it and/or modify
7		*  it under the terms of the GNU General Public License as published by
#	Line 58 | Line 58
58		#define DEBUG 0
59		#include "debug.h"
60
61	+	extern "C" {
62	+	#include "dis-asm.h"
63	+	}
64	+
65		// Emulation time statistics
66		#ifndef EMUL_TIME_STATS
67		#define EMUL_TIME_STATS 0
#	Line 118 | Line 122 | static uint8 *emul_op_trampoline;
122		static uint8 *native_op_trampoline;
123		#endif
124
121	–	// JIT Compiler enabled?
122	–	static inline bool enable_jit_p()
123	–	{
124	–	return PrefsFindBool("jit");
125	–	}
126	–
125
126		/**
127		*              PowerPC emulator glue with special 'sheep' opcodes
#	Line 177 | Line 175 | public:
175		void interrupt(uint32 entry);
176
177		// Make sure the SIGSEGV handler can access CPU registers
178	<	friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
178	>	friend sigsegv_return_t sigsegv_handler(sigsegv_info_t *sip);
179		};
180
181		sheepshaver_cpu::sheepshaver_cpu()
184	–	: powerpc_cpu(enable_jit_p())
182		{
183		init_decoder();
184	+
185	+	#if PPC_ENABLE_JIT
186	+	if (PrefsFindBool("jit"))
187	+	enable_jit();
188	+	#endif
189		}
190
191		void sheepshaver_cpu::init_decoder()
#	Line 191 | Line 193 | void sheepshaver_cpu::init_decoder()
193		static const instr_info_t sheep_ii_table[] = {
194		{ "sheep",
195		(execute_pmf)&sheepshaver_cpu::execute_sheep,
194	–	NULL,
196		PPC_I(SHEEP),
197		D_form, 6, 0, CFLOW_JUMP | CFLOW_TRAP
198		}
#	Line 336 | Line 337 | int sheepshaver_cpu::compile1(codegen_co
337		status = COMPILE_CODE_OK;
338		break;
339		}
340	+	#endif
341		case NATIVE_CHECK_LOAD_INVOC:
342		dg.gen_load_T0_GPR(3);
343		dg.gen_load_T1_GPR(4);
#	Line 351 | Line 353 | int sheepshaver_cpu::compile1(codegen_co
353		dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))named_check_load_invoc);
354		status = COMPILE_CODE_OK;
355		break;
356	<	#endif
357	<	case NATIVE_BITBLT:
356	>	case NATIVE_NQD_SYNC_HOOK:
357	>	dg.gen_load_T0_GPR(3);
358	>	dg.gen_invoke_T0_ret_T0((uint32 (*)(uint32))NQD_sync_hook);
359	>	dg.gen_store_T0_GPR(3);
360	>	status = COMPILE_CODE_OK;
361	>	break;
362	>	case NATIVE_NQD_BITBLT_HOOK:
363	>	dg.gen_load_T0_GPR(3);
364	>	dg.gen_invoke_T0_ret_T0((uint32 (*)(uint32))NQD_bitblt_hook);
365	>	dg.gen_store_T0_GPR(3);
366	>	status = COMPILE_CODE_OK;
367	>	break;
368	>	case NATIVE_NQD_FILLRECT_HOOK:
369	>	dg.gen_load_T0_GPR(3);
370	>	dg.gen_invoke_T0_ret_T0((uint32 (*)(uint32))NQD_fillrect_hook);
371	>	dg.gen_store_T0_GPR(3);
372	>	status = COMPILE_CODE_OK;
373	>	break;
374	>	case NATIVE_NQD_UNKNOWN_HOOK:
375	>	dg.gen_load_T0_GPR(3);
376	>	dg.gen_invoke_T0_ret_T0((uint32 (*)(uint32))NQD_unknown_hook);
377	>	dg.gen_store_T0_GPR(3);
378	>	status = COMPILE_CODE_OK;
379	>	break;
380	>	case NATIVE_NQD_BITBLT:
381		dg.gen_load_T0_GPR(3);
382		dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt);
383		status = COMPILE_CODE_OK;
384		break;
385	<	case NATIVE_INVRECT:
385	>	case NATIVE_NQD_INVRECT:
386		dg.gen_load_T0_GPR(3);
387		dg.gen_invoke_T0((void (*)(uint32))NQD_invrect);
388		status = COMPILE_CODE_OK;
389		break;
390	<	case NATIVE_FILLRECT:
390	>	case NATIVE_NQD_FILLRECT:
391		dg.gen_load_T0_GPR(3);
392		dg.gen_invoke_T0((void (*)(uint32))NQD_fillrect);
393		status = COMPILE_CODE_OK;
#	Line 373 | Line 398 | int sheepshaver_cpu::compile1(codegen_co
398		if (!FN_field::test(opcode))
399		cg_context.done_compile = false;
400		else {
401	<	dg.gen_load_A0_LR();
402	<	dg.gen_set_PC_A0();
401	>	dg.gen_load_T0_LR_aligned();
402	>	dg.gen_set_PC_T0();
403		cg_context.done_compile = true;
404		}
405		break;
#	Line 384 | Line 409 | int sheepshaver_cpu::compile1(codegen_co
409		if (!FN_field::test(opcode))
410		dg.gen_set_PC_im(cg_context.pc + 4);
411		else {
412	<	dg.gen_load_A0_LR();
413	<	dg.gen_set_PC_A0();
412	>	dg.gen_load_T0_LR_aligned();
413	>	dg.gen_set_PC_T0();
414		}
415		dg.gen_mov_32_T0_im(selector);
416		dg.gen_jmp(native_op_trampoline);
#	Line 705 | Line 730 | static void dump_log(void)
730		ppc_cpu->dump_log();
731		}
732
733	<	/*
734	<	*  Initialize CPU emulation
735	<	*/
733	>	static int read_mem(bfd_vma memaddr, bfd_byte *myaddr, int length, struct disassemble_info *info)
734	>	{
735	>	Mac2Host_memcpy(myaddr, memaddr, length);
736	>	return 0;
737	>	}
738
739	<	sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
739	>	static void dump_disassembly(const uint32 pc, const int prefix_count, const int suffix_count)
740	>	{
741	>	struct disassemble_info info;
742	>	INIT_DISASSEMBLE_INFO(info, stderr, fprintf);
743	>	info.read_memory_func = read_mem;
744	>
745	>	const int count = prefix_count + suffix_count + 1;
746	>	const uint32 base_addr = pc - prefix_count * 4;
747	>	for (int i = 0; i < count; i++) {
748	>	const bfd_vma addr = base_addr + i * 4;
749	>	fprintf(stderr, "%s0x%8llx:  ", addr == pc ? " >" : "  ", addr);
750	>	print_insn_ppc(addr, &info);
751	>	fprintf(stderr, "\n");
752	>	}
753	>	}
754	>
755	>	sigsegv_return_t sigsegv_handler(sigsegv_info_t *sip)
756		{
757		#if ENABLE_VOSF
758		// Handle screen fault
759	<	extern bool Screen_fault_handler(sigsegv_address_t, sigsegv_address_t);
760	<	if (Screen_fault_handler(fault_address, fault_instruction))
759	>	extern bool Screen_fault_handler(sigsegv_info_t *sip);
760	>	if (Screen_fault_handler(sip))
761		return SIGSEGV_RETURN_SUCCESS;
762		#endif
763
764	<	const uintptr addr = (uintptr)fault_address;
764	>	const uintptr addr = (uintptr)sigsegv_get_fault_address(sip);
765		#if HAVE_SIGSEGV_SKIP_INSTRUCTION
766		// Ignore writes to ROM
767		if ((addr - (uintptr)ROMBaseHost) < ROM_SIZE)
#	Line 729 | Line 772 | sigsegv_return_t sigsegv_handler(sigsegv
772		const uint32 pc = cpu->pc();
773
774		// Fault in Mac ROM or RAM?
775	<	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize)) || (pc >= DR_CACHE_BASE && pc < (DR_CACHE_BASE + DR_CACHE_SIZE));
775	>	bool mac_fault = (pc >= ROMBase) && (pc < (ROMBase + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize)) || (pc >= DR_CACHE_BASE && pc < (DR_CACHE_BASE + DR_CACHE_SIZE));
776		if (mac_fault) {
777
778		// "VM settings" during MacOS 8 installation
779	<	if (pc == ROM_BASE + 0x488160 && cpu->gpr(20) == 0xf8000000)
779	>	if (pc == ROMBase + 0x488160 && cpu->gpr(20) == 0xf8000000)
780		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
781
782		// MacOS 8.5 installation
783	<	else if (pc == ROM_BASE + 0x488140 && cpu->gpr(16) == 0xf8000000)
783	>	else if (pc == ROMBase + 0x488140 && cpu->gpr(16) == 0xf8000000)
784		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
785
786		// MacOS 8 serial drivers on startup
787	<	else if (pc == ROM_BASE + 0x48e080 && (cpu->gpr(8) == 0xf3012002 || cpu->gpr(8) == 0xf3012000))
787	>	else if (pc == ROMBase + 0x48e080 && (cpu->gpr(8) == 0xf3012002 || cpu->gpr(8) == 0xf3012000))
788		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
789
790		// MacOS 8.1 serial drivers on startup
791	<	else if (pc == ROM_BASE + 0x48c5e0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
791	>	else if (pc == ROMBase + 0x48c5e0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
792		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
793	<	else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
793	>	else if (pc == ROMBase + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
794		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
795
796		// MacOS 8.6 serial drivers on startup (with DR Cache and OldWorld ROM)
#	Line 769 | Line 812 | sigsegv_return_t sigsegv_handler(sigsegv
812		#endif
813
814		fprintf(stderr, "SIGSEGV\n");
815	<	fprintf(stderr, "  pc %p\n", fault_instruction);
816	<	fprintf(stderr, "  ea %p\n", fault_address);
815	>	fprintf(stderr, "  pc %p\n", sigsegv_get_fault_instruction_address(sip));
816	>	fprintf(stderr, "  ea %p\n", sigsegv_get_fault_address(sip));
817		dump_registers();
818		ppc_cpu->dump_log();
819	+	dump_disassembly(pc, 8, 8);
820	+
821		enter_mon();
822		QuitEmulator();
823
824		return SIGSEGV_RETURN_FAILURE;
825		}
826
827	+	/*
828	+	*  Initialize CPU emulation
829	+	*/
830	+
831		void init_emul_ppc(void)
832		{
833		// Get pointer to KernelData in host address space
#	Line 786 | Line 835 | void init_emul_ppc(void)
835
836		// Initialize main CPU emulator
837		ppc_cpu = new sheepshaver_cpu();
838	<	ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
838	>	ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROMBase + 0x30d000));
839		ppc_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
840		WriteMacInt32(XLM_RUN_MODE, MODE_68K);
841
#	Line 930 | Line 979 | void HandleInterrupt(powerpc_registers *
979		// Execute nanokernel interrupt routine (this will activate the 68k emulator)
980		DisableInterrupt();
981		if (ROMType == ROMTYPE_NEWWORLD)
982	<	ppc_cpu->interrupt(ROM_BASE + 0x312b1c);
982	>	ppc_cpu->interrupt(ROMBase + 0x312b1c);
983		else
984	<	ppc_cpu->interrupt(ROM_BASE + 0x312a3c);
984	>	ppc_cpu->interrupt(ROMBase + 0x312a3c);
985		}
986		break;
987		#endif
#	Line 1033 | Line 1082 | void sheepshaver_cpu::execute_native_op(
1082		case NATIVE_ETHER_RSRV:
1083		gpr(3) = ether_rsrv((queue_t *)gpr(3));
1084		break;
1085	<	case NATIVE_SYNC_HOOK:
1085	>	case NATIVE_NQD_SYNC_HOOK:
1086		gpr(3) = NQD_sync_hook(gpr(3));
1087		break;
1088	<	case NATIVE_BITBLT_HOOK:
1088	>	case NATIVE_NQD_UNKNOWN_HOOK:
1089	>	gpr(3) = NQD_unknown_hook(gpr(3));
1090	>	break;
1091	>	case NATIVE_NQD_BITBLT_HOOK:
1092		gpr(3) = NQD_bitblt_hook(gpr(3));
1093		break;
1094	<	case NATIVE_BITBLT:
1094	>	case NATIVE_NQD_BITBLT:
1095		NQD_bitblt(gpr(3));
1096		break;
1097	<	case NATIVE_FILLRECT_HOOK:
1097	>	case NATIVE_NQD_FILLRECT_HOOK:
1098		gpr(3) = NQD_fillrect_hook(gpr(3));
1099		break;
1100	<	case NATIVE_INVRECT:
1100	>	case NATIVE_NQD_INVRECT:
1101		NQD_invrect(gpr(3));
1102		break;
1103	<	case NATIVE_FILLRECT:
1103	>	case NATIVE_NQD_FILLRECT:
1104		NQD_fillrect(gpr(3));
1105		break;
1106		case NATIVE_SERIAL_NOTHING:

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