1 |
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/* |
2 |
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* sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface |
3 |
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* |
4 |
< |
* SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig |
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* SheepShaver (C) 1997-2008 Christian Bauer and Marc Hellwig |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License as published by |
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#include <stdio.h> |
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#include <stdlib.h> |
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#ifdef HAVE_MALLOC_H |
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#include <malloc.h> |
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#endif |
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|
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#ifdef USE_SDL_VIDEO |
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#include <SDL_events.h> |
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#define DEBUG 0 |
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#include "debug.h" |
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|
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extern "C" { |
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#include "dis-asm.h" |
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} |
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|
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// Emulation time statistics |
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#ifndef EMUL_TIME_STATS |
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#define EMUL_TIME_STATS 0 |
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|
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// From rsrc_patches.cpp |
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extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h); |
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extern "C" void named_check_load_invoc(uint32 type, uint32 name, uint32 h); |
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|
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// PowerPC EmulOp to exit from emulation looop |
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const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1; |
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|
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// Enable interrupt routine safety checks? |
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#define SAFE_INTERRUPT_PPC 1 |
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|
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// Enable Execute68k() safety checks? |
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#define SAFE_EXEC_68K 1 |
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|
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// Interrupts in native mode? |
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#define INTERRUPTS_IN_NATIVE_MODE 1 |
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|
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// Enable native EMUL_OPs to be run without a mode switch |
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#define ENABLE_NATIVE_EMUL_OP 1 |
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|
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// Pointer to Kernel Data |
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static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE; |
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static KernelData * kernel_data; |
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|
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// SIGSEGV handler |
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static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t); |
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sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t); |
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|
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#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT |
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// Special trampolines for EmulOp and NativeOp |
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static uint8 *native_op_trampoline; |
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#endif |
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|
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// JIT Compiler enabled? |
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static inline bool enable_jit_p() |
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{ |
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return PrefsFindBool("jit"); |
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} |
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|
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|
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/** |
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* PowerPC emulator glue with special 'sheep' opcodes |
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void init_decoder(); |
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void execute_sheep(uint32 opcode); |
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|
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// Filter out EMUL_OP routines that only call native code |
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bool filter_execute_emul_op(uint32 emul_op); |
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|
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// "Native" EMUL_OP routines |
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void execute_emul_op_microseconds(); |
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void execute_emul_op_idle_time_1(); |
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void execute_emul_op_idle_time_2(); |
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|
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// CPU context to preserve on interrupt |
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class interrupt_context { |
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uint32 gpr[32]; |
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uint32 pc; |
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uint32 lr; |
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uint32 ctr; |
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uint32 cr; |
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uint32 xer; |
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sheepshaver_cpu *cpu; |
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const char *where; |
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public: |
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interrupt_context(sheepshaver_cpu *_cpu, const char *_where); |
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~interrupt_context(); |
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}; |
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|
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public: |
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|
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// Constructor |
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// Execute MacOS/PPC code |
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uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args); |
166 |
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|
167 |
+ |
#if PPC_ENABLE_JIT |
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// Compile one instruction |
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virtual int compile1(codegen_context_t & cg_context); |
170 |
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|
170 |
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#endif |
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// Resource manager thunk |
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void get_resource(uint32 old_get_resource); |
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|
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// Handle MacOS interrupt |
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void interrupt(uint32 entry); |
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void handle_interrupt(); |
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|
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// Make sure the SIGSEGV handler can access CPU registers |
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friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t); |
178 |
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friend sigsegv_return_t sigsegv_handler(sigsegv_info_t *sip); |
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}; |
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|
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// Memory allocator returning areas aligned on 16-byte boundaries |
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void *operator new(size_t size) |
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{ |
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void *p; |
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|
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#if defined(HAVE_POSIX_MEMALIGN) |
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if (posix_memalign(&p, 16, size) != 0) |
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throw std::bad_alloc(); |
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#elif defined(HAVE_MEMALIGN) |
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p = memalign(16, size); |
218 |
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#elif defined(HAVE_VALLOC) |
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p = valloc(size); // page-aligned! |
220 |
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#else |
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/* XXX: handle padding ourselves */ |
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p = malloc(size); |
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#endif |
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|
225 |
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return p; |
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} |
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|
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void operator delete(void *p) |
229 |
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{ |
230 |
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#if defined(HAVE_MEMALIGN) || defined(HAVE_VALLOC) |
231 |
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#if defined(__GLIBC__) |
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// this is known to work only with GNU libc |
233 |
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free(p); |
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#endif |
235 |
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#else |
236 |
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free(p); |
237 |
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#endif |
238 |
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} |
239 |
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|
181 |
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sheepshaver_cpu::sheepshaver_cpu() |
241 |
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: powerpc_cpu(enable_jit_p()) |
182 |
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{ |
183 |
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init_decoder(); |
184 |
+ |
|
185 |
+ |
#if PPC_ENABLE_JIT |
186 |
+ |
if (PrefsFindBool("jit")) |
187 |
+ |
enable_jit(); |
188 |
+ |
#endif |
189 |
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} |
190 |
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|
191 |
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void sheepshaver_cpu::init_decoder() |
193 |
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static const instr_info_t sheep_ii_table[] = { |
194 |
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{ "sheep", |
195 |
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(execute_pmf)&sheepshaver_cpu::execute_sheep, |
251 |
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NULL, |
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PPC_I(SHEEP), |
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D_form, 6, 0, CFLOW_JUMP | CFLOW_TRAP |
198 |
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} |
218 |
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typedef bit_field< 20, 25 > NATIVE_OP_field; |
219 |
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typedef bit_field< 26, 31 > EMUL_OP_field; |
220 |
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|
277 |
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// "Native" EMUL_OP routines |
278 |
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#define GPR_A(REG) gpr(16 + (REG)) |
279 |
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#define GPR_D(REG) gpr( 8 + (REG)) |
280 |
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|
281 |
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void sheepshaver_cpu::execute_emul_op_microseconds() |
282 |
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{ |
283 |
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Microseconds(GPR_A(0), GPR_D(0)); |
284 |
– |
} |
285 |
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|
286 |
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void sheepshaver_cpu::execute_emul_op_idle_time_1() |
287 |
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{ |
288 |
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// Sleep if no events pending |
289 |
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if (ReadMacInt32(0x14c) == 0) |
290 |
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Delay_usec(16667); |
291 |
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GPR_A(0) = ReadMacInt32(0x2b6); |
292 |
– |
} |
293 |
– |
|
294 |
– |
void sheepshaver_cpu::execute_emul_op_idle_time_2() |
295 |
– |
{ |
296 |
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// Sleep if no events pending |
297 |
– |
if (ReadMacInt32(0x14c) == 0) |
298 |
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Delay_usec(16667); |
299 |
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GPR_D(0) = (uint32)-2; |
300 |
– |
} |
301 |
– |
|
302 |
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// Filter out EMUL_OP routines that only call native code |
303 |
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bool sheepshaver_cpu::filter_execute_emul_op(uint32 emul_op) |
304 |
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{ |
305 |
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switch (emul_op) { |
306 |
– |
case OP_MICROSECONDS: |
307 |
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execute_emul_op_microseconds(); |
308 |
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return true; |
309 |
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case OP_IDLE_TIME: |
310 |
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execute_emul_op_idle_time_1(); |
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return true; |
312 |
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case OP_IDLE_TIME_2: |
313 |
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execute_emul_op_idle_time_2(); |
314 |
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return true; |
315 |
– |
} |
316 |
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return false; |
317 |
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} |
318 |
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|
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// Execute EMUL_OP routine |
222 |
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void sheepshaver_cpu::execute_emul_op(uint32 emul_op) |
223 |
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{ |
322 |
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#if ENABLE_NATIVE_EMUL_OP |
323 |
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// First, filter out EMUL_OPs that can be executed without a mode switch |
324 |
– |
if (filter_execute_emul_op(emul_op)) |
325 |
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return; |
326 |
– |
#endif |
327 |
– |
|
224 |
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M68kRegisters r68; |
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WriteMacInt32(XLM_68K_R25, gpr(25)); |
226 |
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WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP); |
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for (int i = 0; i < 7; i++) |
230 |
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r68.a[i] = gpr(16 + i); |
231 |
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r68.a[7] = gpr(1); |
232 |
< |
uint32 saved_cr = get_cr() & CR_field<2>::mask(); |
232 |
> |
uint32 saved_cr = get_cr() & 0xff9fffff; // mask_operand::compute(11, 8) |
233 |
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uint32 saved_xer = get_xer(); |
234 |
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EmulOp(&r68, gpr(24), emul_op); |
235 |
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set_cr(saved_cr); |
273 |
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} |
274 |
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|
275 |
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// Compile one instruction |
276 |
+ |
#if PPC_ENABLE_JIT |
277 |
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int sheepshaver_cpu::compile1(codegen_context_t & cg_context) |
278 |
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{ |
382 |
– |
#if PPC_ENABLE_JIT |
279 |
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const instr_info_t *ii = cg_context.instr_info; |
280 |
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if (ii->mnemo != PPC_I(SHEEP)) |
281 |
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return COMPILE_FAILURE; |
337 |
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status = COMPILE_CODE_OK; |
338 |
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break; |
339 |
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} |
340 |
+ |
#endif |
341 |
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case NATIVE_CHECK_LOAD_INVOC: |
342 |
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dg.gen_load_T0_GPR(3); |
343 |
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dg.gen_load_T1_GPR(4); |
346 |
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dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))check_load_invoc); |
347 |
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status = COMPILE_CODE_OK; |
348 |
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break; |
349 |
< |
#endif |
350 |
< |
case NATIVE_BITBLT: |
349 |
> |
case NATIVE_NAMED_CHECK_LOAD_INVOC: |
350 |
> |
dg.gen_load_T0_GPR(3); |
351 |
> |
dg.gen_load_T1_GPR(4); |
352 |
> |
dg.gen_load_T2_GPR(5); |
353 |
> |
dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))named_check_load_invoc); |
354 |
> |
status = COMPILE_CODE_OK; |
355 |
> |
break; |
356 |
> |
case NATIVE_NQD_SYNC_HOOK: |
357 |
> |
dg.gen_load_T0_GPR(3); |
358 |
> |
dg.gen_invoke_T0_ret_T0((uint32 (*)(uint32))NQD_sync_hook); |
359 |
> |
dg.gen_store_T0_GPR(3); |
360 |
> |
status = COMPILE_CODE_OK; |
361 |
> |
break; |
362 |
> |
case NATIVE_NQD_BITBLT_HOOK: |
363 |
> |
dg.gen_load_T0_GPR(3); |
364 |
> |
dg.gen_invoke_T0_ret_T0((uint32 (*)(uint32))NQD_bitblt_hook); |
365 |
> |
dg.gen_store_T0_GPR(3); |
366 |
> |
status = COMPILE_CODE_OK; |
367 |
> |
break; |
368 |
> |
case NATIVE_NQD_FILLRECT_HOOK: |
369 |
> |
dg.gen_load_T0_GPR(3); |
370 |
> |
dg.gen_invoke_T0_ret_T0((uint32 (*)(uint32))NQD_fillrect_hook); |
371 |
> |
dg.gen_store_T0_GPR(3); |
372 |
> |
status = COMPILE_CODE_OK; |
373 |
> |
break; |
374 |
> |
case NATIVE_NQD_UNKNOWN_HOOK: |
375 |
> |
dg.gen_load_T0_GPR(3); |
376 |
> |
dg.gen_invoke_T0_ret_T0((uint32 (*)(uint32))NQD_unknown_hook); |
377 |
> |
dg.gen_store_T0_GPR(3); |
378 |
> |
status = COMPILE_CODE_OK; |
379 |
> |
break; |
380 |
> |
case NATIVE_NQD_BITBLT: |
381 |
|
dg.gen_load_T0_GPR(3); |
382 |
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dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt); |
383 |
|
status = COMPILE_CODE_OK; |
384 |
|
break; |
385 |
< |
case NATIVE_INVRECT: |
385 |
> |
case NATIVE_NQD_INVRECT: |
386 |
|
dg.gen_load_T0_GPR(3); |
387 |
|
dg.gen_invoke_T0((void (*)(uint32))NQD_invrect); |
388 |
|
status = COMPILE_CODE_OK; |
389 |
|
break; |
390 |
< |
case NATIVE_FILLRECT: |
390 |
> |
case NATIVE_NQD_FILLRECT: |
391 |
|
dg.gen_load_T0_GPR(3); |
392 |
|
dg.gen_invoke_T0((void (*)(uint32))NQD_fillrect); |
393 |
|
status = COMPILE_CODE_OK; |
398 |
|
if (!FN_field::test(opcode)) |
399 |
|
cg_context.done_compile = false; |
400 |
|
else { |
401 |
< |
dg.gen_load_A0_LR(); |
402 |
< |
dg.gen_set_PC_A0(); |
401 |
> |
dg.gen_load_T0_LR_aligned(); |
402 |
> |
dg.gen_set_PC_T0(); |
403 |
|
cg_context.done_compile = true; |
404 |
|
} |
405 |
|
break; |
409 |
|
if (!FN_field::test(opcode)) |
410 |
|
dg.gen_set_PC_im(cg_context.pc + 4); |
411 |
|
else { |
412 |
< |
dg.gen_load_A0_LR(); |
413 |
< |
dg.gen_set_PC_A0(); |
412 |
> |
dg.gen_load_T0_LR_aligned(); |
413 |
> |
dg.gen_set_PC_T0(); |
414 |
|
} |
415 |
|
dg.gen_mov_32_T0_im(selector); |
416 |
|
dg.gen_jmp(native_op_trampoline); |
433 |
|
|
434 |
|
default: { // EMUL_OP |
435 |
|
uint32 emul_op = EMUL_OP_field::extract(opcode) - 3; |
509 |
– |
#if ENABLE_NATIVE_EMUL_OP |
510 |
– |
typedef void (*emul_op_func_t)(dyngen_cpu_base); |
511 |
– |
emul_op_func_t emul_op_func = 0; |
512 |
– |
switch (emul_op) { |
513 |
– |
case OP_MICROSECONDS: |
514 |
– |
emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_microseconds).ptr(); |
515 |
– |
break; |
516 |
– |
case OP_IDLE_TIME: |
517 |
– |
emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_1).ptr(); |
518 |
– |
break; |
519 |
– |
case OP_IDLE_TIME_2: |
520 |
– |
emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_2).ptr(); |
521 |
– |
break; |
522 |
– |
} |
523 |
– |
if (emul_op_func) { |
524 |
– |
dg.gen_invoke_CPU(emul_op_func); |
525 |
– |
cg_context.done_compile = false; |
526 |
– |
status = COMPILE_CODE_OK; |
527 |
– |
break; |
528 |
– |
} |
529 |
– |
#endif |
436 |
|
#if PPC_REENTRANT_JIT |
437 |
|
// Try to execute EmulOp trampoline |
438 |
|
dg.gen_set_PC_im(cg_context.pc + 4); |
452 |
|
} |
453 |
|
} |
454 |
|
return status; |
549 |
– |
#endif |
550 |
– |
return COMPILE_FAILURE; |
551 |
– |
} |
552 |
– |
|
553 |
– |
// CPU context to preserve on interrupt |
554 |
– |
sheepshaver_cpu::interrupt_context::interrupt_context(sheepshaver_cpu *_cpu, const char *_where) |
555 |
– |
{ |
556 |
– |
#if SAFE_INTERRUPT_PPC >= 2 |
557 |
– |
cpu = _cpu; |
558 |
– |
where = _where; |
559 |
– |
|
560 |
– |
// Save interrupt context |
561 |
– |
memcpy(&gpr[0], &cpu->gpr(0), sizeof(gpr)); |
562 |
– |
pc = cpu->pc(); |
563 |
– |
lr = cpu->lr(); |
564 |
– |
ctr = cpu->ctr(); |
565 |
– |
cr = cpu->get_cr(); |
566 |
– |
xer = cpu->get_xer(); |
567 |
– |
#endif |
455 |
|
} |
569 |
– |
|
570 |
– |
sheepshaver_cpu::interrupt_context::~interrupt_context() |
571 |
– |
{ |
572 |
– |
#if SAFE_INTERRUPT_PPC >= 2 |
573 |
– |
// Check whether CPU context was preserved by interrupt |
574 |
– |
if (memcmp(&gpr[0], &cpu->gpr(0), sizeof(gpr)) != 0) { |
575 |
– |
printf("FATAL: %s: interrupt clobbers registers\n", where); |
576 |
– |
for (int i = 0; i < 32; i++) |
577 |
– |
if (gpr[i] != cpu->gpr(i)) |
578 |
– |
printf(" r%d: %08x -> %08x\n", i, gpr[i], cpu->gpr(i)); |
579 |
– |
} |
580 |
– |
if (pc != cpu->pc()) |
581 |
– |
printf("FATAL: %s: interrupt clobbers PC\n", where); |
582 |
– |
if (lr != cpu->lr()) |
583 |
– |
printf("FATAL: %s: interrupt clobbers LR\n", where); |
584 |
– |
if (ctr != cpu->ctr()) |
585 |
– |
printf("FATAL: %s: interrupt clobbers CTR\n", where); |
586 |
– |
if (cr != cpu->get_cr()) |
587 |
– |
printf("FATAL: %s: interrupt clobbers CR\n", where); |
588 |
– |
if (xer != cpu->get_xer()) |
589 |
– |
printf("FATAL: %s: interrupt clobbers XER\n", where); |
456 |
|
#endif |
591 |
– |
} |
457 |
|
|
458 |
|
// Handle MacOS interrupt |
459 |
|
void sheepshaver_cpu::interrupt(uint32 entry) |
463 |
|
const clock_t interrupt_start = clock(); |
464 |
|
#endif |
465 |
|
|
601 |
– |
#if SAFE_INTERRUPT_PPC |
602 |
– |
static int depth = 0; |
603 |
– |
if (depth != 0) |
604 |
– |
printf("FATAL: sheepshaver_cpu::interrupt() called more than once: %d\n", depth); |
605 |
– |
depth++; |
606 |
– |
#endif |
607 |
– |
|
466 |
|
// Save program counters and branch registers |
467 |
|
uint32 saved_pc = pc(); |
468 |
|
uint32 saved_lr = lr(); |
516 |
|
#if EMUL_TIME_STATS |
517 |
|
interrupt_time += (clock() - interrupt_start); |
518 |
|
#endif |
661 |
– |
|
662 |
– |
#if SAFE_INTERRUPT_PPC |
663 |
– |
depth--; |
664 |
– |
#endif |
519 |
|
} |
520 |
|
|
521 |
|
// Execute 68k routine |
730 |
|
ppc_cpu->dump_log(); |
731 |
|
} |
732 |
|
|
733 |
< |
/* |
734 |
< |
* Initialize CPU emulation |
735 |
< |
*/ |
733 |
> |
static int read_mem(bfd_vma memaddr, bfd_byte *myaddr, int length, struct disassemble_info *info) |
734 |
> |
{ |
735 |
> |
Mac2Host_memcpy(myaddr, memaddr, length); |
736 |
> |
return 0; |
737 |
> |
} |
738 |
> |
|
739 |
> |
static void dump_disassembly(const uint32 pc, const int prefix_count, const int suffix_count) |
740 |
> |
{ |
741 |
> |
struct disassemble_info info; |
742 |
> |
INIT_DISASSEMBLE_INFO(info, stderr, fprintf); |
743 |
> |
info.read_memory_func = read_mem; |
744 |
> |
|
745 |
> |
const int count = prefix_count + suffix_count + 1; |
746 |
> |
const uint32 base_addr = pc - prefix_count * 4; |
747 |
> |
for (int i = 0; i < count; i++) { |
748 |
> |
const bfd_vma addr = base_addr + i * 4; |
749 |
> |
fprintf(stderr, "%s0x%8llx: ", addr == pc ? " >" : " ", addr); |
750 |
> |
print_insn_ppc(addr, &info); |
751 |
> |
fprintf(stderr, "\n"); |
752 |
> |
} |
753 |
> |
} |
754 |
|
|
755 |
< |
static sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction) |
755 |
> |
sigsegv_return_t sigsegv_handler(sigsegv_info_t *sip) |
756 |
|
{ |
757 |
|
#if ENABLE_VOSF |
758 |
|
// Handle screen fault |
759 |
< |
extern bool Screen_fault_handler(sigsegv_address_t, sigsegv_address_t); |
760 |
< |
if (Screen_fault_handler(fault_address, fault_instruction)) |
759 |
> |
extern bool Screen_fault_handler(sigsegv_info_t *sip); |
760 |
> |
if (Screen_fault_handler(sip)) |
761 |
|
return SIGSEGV_RETURN_SUCCESS; |
762 |
|
#endif |
763 |
|
|
764 |
< |
const uintptr addr = (uintptr)fault_address; |
764 |
> |
const uintptr addr = (uintptr)sigsegv_get_fault_address(sip); |
765 |
|
#if HAVE_SIGSEGV_SKIP_INSTRUCTION |
766 |
|
// Ignore writes to ROM |
767 |
< |
if ((addr - ROM_BASE) < ROM_SIZE) |
767 |
> |
if ((addr - (uintptr)ROMBaseHost) < ROM_SIZE) |
768 |
|
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
769 |
|
|
770 |
|
// Get program counter of target CPU |
772 |
|
const uint32 pc = cpu->pc(); |
773 |
|
|
774 |
|
// Fault in Mac ROM or RAM? |
775 |
< |
bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize)) || (pc >= DR_CACHE_BASE && pc < (DR_CACHE_BASE + DR_CACHE_SIZE)); |
775 |
> |
bool mac_fault = (pc >= ROMBase) && (pc < (ROMBase + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize)) || (pc >= DR_CACHE_BASE && pc < (DR_CACHE_BASE + DR_CACHE_SIZE)); |
776 |
|
if (mac_fault) { |
777 |
|
|
778 |
|
// "VM settings" during MacOS 8 installation |
779 |
< |
if (pc == ROM_BASE + 0x488160 && cpu->gpr(20) == 0xf8000000) |
779 |
> |
if (pc == ROMBase + 0x488160 && cpu->gpr(20) == 0xf8000000) |
780 |
|
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
781 |
|
|
782 |
|
// MacOS 8.5 installation |
783 |
< |
else if (pc == ROM_BASE + 0x488140 && cpu->gpr(16) == 0xf8000000) |
783 |
> |
else if (pc == ROMBase + 0x488140 && cpu->gpr(16) == 0xf8000000) |
784 |
|
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
785 |
|
|
786 |
|
// MacOS 8 serial drivers on startup |
787 |
< |
else if (pc == ROM_BASE + 0x48e080 && (cpu->gpr(8) == 0xf3012002 || cpu->gpr(8) == 0xf3012000)) |
787 |
> |
else if (pc == ROMBase + 0x48e080 && (cpu->gpr(8) == 0xf3012002 || cpu->gpr(8) == 0xf3012000)) |
788 |
|
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
789 |
|
|
790 |
|
// MacOS 8.1 serial drivers on startup |
791 |
< |
else if (pc == ROM_BASE + 0x48c5e0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000)) |
791 |
> |
else if (pc == ROMBase + 0x48c5e0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000)) |
792 |
|
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
793 |
< |
else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000)) |
793 |
> |
else if (pc == ROMBase + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000)) |
794 |
|
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
795 |
|
|
796 |
|
// MacOS 8.6 serial drivers on startup (with DR Cache and OldWorld ROM) |
811 |
|
#error "FIXME: You don't have the capability to skip instruction within signal handlers" |
812 |
|
#endif |
813 |
|
|
814 |
< |
printf("SIGSEGV\n"); |
815 |
< |
printf(" pc %p\n", fault_instruction); |
816 |
< |
printf(" ea %p\n", fault_address); |
814 |
> |
fprintf(stderr, "SIGSEGV\n"); |
815 |
> |
fprintf(stderr, " pc %p\n", sigsegv_get_fault_instruction_address(sip)); |
816 |
> |
fprintf(stderr, " ea %p\n", sigsegv_get_fault_address(sip)); |
817 |
|
dump_registers(); |
818 |
|
ppc_cpu->dump_log(); |
819 |
+ |
dump_disassembly(pc, 8, 8); |
820 |
+ |
|
821 |
|
enter_mon(); |
822 |
|
QuitEmulator(); |
823 |
|
|
824 |
|
return SIGSEGV_RETURN_FAILURE; |
825 |
|
} |
826 |
|
|
827 |
+ |
/* |
828 |
+ |
* Initialize CPU emulation |
829 |
+ |
*/ |
830 |
+ |
|
831 |
|
void init_emul_ppc(void) |
832 |
|
{ |
833 |
+ |
// Get pointer to KernelData in host address space |
834 |
+ |
kernel_data = (KernelData *)Mac2HostAddr(KERNEL_DATA_BASE); |
835 |
+ |
|
836 |
|
// Initialize main CPU emulator |
837 |
|
ppc_cpu = new sheepshaver_cpu(); |
838 |
< |
ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000)); |
838 |
> |
ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROMBase + 0x30d000)); |
839 |
|
ppc_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000)); |
840 |
|
WriteMacInt32(XLM_RUN_MODE, MODE_68K); |
841 |
|
|
961 |
– |
// Install the handler for SIGSEGV |
962 |
– |
sigsegv_install_handler(sigsegv_handler); |
963 |
– |
|
842 |
|
#if ENABLE_MON |
843 |
|
// Install "regs" command in cxmon |
844 |
|
mon_add_command("regs", dump_registers, "regs Dump PowerPC registers\n"); |
883 |
|
#endif |
884 |
|
|
885 |
|
delete ppc_cpu; |
886 |
+ |
ppc_cpu = NULL; |
887 |
|
} |
888 |
|
|
889 |
|
#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT |
931 |
|
|
932 |
|
void TriggerInterrupt(void) |
933 |
|
{ |
934 |
+ |
idle_resume(); |
935 |
|
#if 0 |
936 |
|
WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1); |
937 |
|
#else |
941 |
|
#endif |
942 |
|
} |
943 |
|
|
944 |
< |
void sheepshaver_cpu::handle_interrupt(void) |
944 |
> |
void HandleInterrupt(powerpc_registers *r) |
945 |
|
{ |
946 |
|
#ifdef USE_SDL_VIDEO |
947 |
|
// We must fill in the events queue in the same thread that did call SDL_SetVideoMode() |
952 |
|
if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0) |
953 |
|
return; |
954 |
|
|
955 |
< |
// Current interrupt nest level |
1076 |
< |
static int interrupt_depth = 0; |
1077 |
< |
++interrupt_depth; |
955 |
> |
// Update interrupt count |
956 |
|
#if EMUL_TIME_STATS |
957 |
|
interrupt_count++; |
958 |
|
#endif |
959 |
|
|
1082 |
– |
// Disable MacOS stack sniffer |
1083 |
– |
WriteMacInt32(0x110, 0); |
1084 |
– |
|
960 |
|
// Interrupt action depends on current run mode |
961 |
|
switch (ReadMacInt32(XLM_RUN_MODE)) { |
962 |
|
case MODE_68K: |
963 |
|
// 68k emulator active, trigger 68k interrupt level 1 |
964 |
|
WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1); |
965 |
< |
set_cr(get_cr() | tswap32(kernel_data->v[0x674 >> 2])); |
965 |
> |
r->cr.set(r->cr.get() | tswap32(kernel_data->v[0x674 >> 2])); |
966 |
|
break; |
967 |
|
|
968 |
|
#if INTERRUPTS_IN_NATIVE_MODE |
969 |
|
case MODE_NATIVE: |
970 |
|
// 68k emulator inactive, in nanokernel? |
971 |
< |
if (gpr(1) != KernelDataAddr && interrupt_depth == 1) { |
1097 |
< |
interrupt_context ctx(this, "PowerPC mode"); |
971 |
> |
if (r->gpr[1] != KernelDataAddr) { |
972 |
|
|
973 |
|
// Prepare for 68k interrupt level 1 |
974 |
|
WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1); |
979 |
|
// Execute nanokernel interrupt routine (this will activate the 68k emulator) |
980 |
|
DisableInterrupt(); |
981 |
|
if (ROMType == ROMTYPE_NEWWORLD) |
982 |
< |
ppc_cpu->interrupt(ROM_BASE + 0x312b1c); |
982 |
> |
ppc_cpu->interrupt(ROMBase + 0x312b1c); |
983 |
|
else |
984 |
< |
ppc_cpu->interrupt(ROM_BASE + 0x312a3c); |
984 |
> |
ppc_cpu->interrupt(ROMBase + 0x312a3c); |
985 |
|
} |
986 |
|
break; |
987 |
|
#endif |
990 |
|
case MODE_EMUL_OP: |
991 |
|
// 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0 |
992 |
|
if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) { |
1119 |
– |
interrupt_context ctx(this, "68k mode"); |
993 |
|
#if EMUL_TIME_STATS |
994 |
|
const clock_t interrupt_start = clock(); |
995 |
|
#endif |
998 |
|
M68kRegisters r; |
999 |
|
uint32 old_r25 = ReadMacInt32(XLM_68K_R25); // Save interrupt level |
1000 |
|
WriteMacInt32(XLM_68K_R25, 0x21); // Execute with interrupt level 1 |
1001 |
< |
static const uint8 proc[] = { |
1001 |
> |
static const uint8 proc_template[] = { |
1002 |
|
0x3f, 0x3c, 0x00, 0x00, // move.w #$0000,-(sp) (fake format word) |
1003 |
|
0x48, 0x7a, 0x00, 0x0a, // pea @1(pc) (return address) |
1004 |
|
0x40, 0xe7, // move sr,-(sp) (saved SR) |
1006 |
|
0x4e, 0xd0, // jmp (a0) |
1007 |
|
M68K_RTS >> 8, M68K_RTS & 0xff // @1 |
1008 |
|
}; |
1009 |
< |
Execute68k((uint32)proc, &r); |
1009 |
> |
BUILD_SHEEPSHAVER_PROCEDURE(proc); |
1010 |
> |
Execute68k(proc, &r); |
1011 |
|
WriteMacInt32(XLM_68K_R25, old_r25); // Restore interrupt level |
1012 |
|
#else |
1013 |
|
// Only update cursor |
1026 |
|
break; |
1027 |
|
#endif |
1028 |
|
} |
1155 |
– |
|
1156 |
– |
// We are done with this interrupt |
1157 |
– |
--interrupt_depth; |
1029 |
|
} |
1030 |
|
|
1160 |
– |
static void get_resource(void); |
1161 |
– |
static void get_1_resource(void); |
1162 |
– |
static void get_ind_resource(void); |
1163 |
– |
static void get_1_ind_resource(void); |
1164 |
– |
static void r_get_resource(void); |
1165 |
– |
|
1031 |
|
// Execute NATIVE_OP routine |
1032 |
|
void sheepshaver_cpu::execute_native_op(uint32 selector) |
1033 |
|
{ |
1047 |
|
VideoVBL(); |
1048 |
|
break; |
1049 |
|
case NATIVE_VIDEO_DO_DRIVER_IO: |
1050 |
< |
gpr(3) = (int32)(int16)VideoDoDriverIO((void *)gpr(3), (void *)gpr(4), |
1051 |
< |
(void *)gpr(5), gpr(6), gpr(7)); |
1050 |
> |
gpr(3) = (int32)(int16)VideoDoDriverIO(gpr(3), gpr(4), gpr(5), gpr(6), gpr(7)); |
1051 |
> |
break; |
1052 |
> |
case NATIVE_ETHER_AO_GET_HWADDR: |
1053 |
> |
AO_get_ethernet_address(gpr(3)); |
1054 |
> |
break; |
1055 |
> |
case NATIVE_ETHER_AO_ADD_MULTI: |
1056 |
> |
AO_enable_multicast(gpr(3)); |
1057 |
> |
break; |
1058 |
> |
case NATIVE_ETHER_AO_DEL_MULTI: |
1059 |
> |
AO_disable_multicast(gpr(3)); |
1060 |
> |
break; |
1061 |
> |
case NATIVE_ETHER_AO_SEND_PACKET: |
1062 |
> |
AO_transmit_packet(gpr(3)); |
1063 |
|
break; |
1188 |
– |
#ifdef WORDS_BIGENDIAN |
1064 |
|
case NATIVE_ETHER_IRQ: |
1065 |
|
EtherIRQ(); |
1066 |
|
break; |
1082 |
|
case NATIVE_ETHER_RSRV: |
1083 |
|
gpr(3) = ether_rsrv((queue_t *)gpr(3)); |
1084 |
|
break; |
1085 |
< |
#else |
1211 |
< |
case NATIVE_ETHER_INIT: |
1212 |
< |
// FIXME: needs more complicated thunks |
1213 |
< |
gpr(3) = false; |
1214 |
< |
break; |
1215 |
< |
#endif |
1216 |
< |
case NATIVE_SYNC_HOOK: |
1085 |
> |
case NATIVE_NQD_SYNC_HOOK: |
1086 |
|
gpr(3) = NQD_sync_hook(gpr(3)); |
1087 |
|
break; |
1088 |
< |
case NATIVE_BITBLT_HOOK: |
1088 |
> |
case NATIVE_NQD_UNKNOWN_HOOK: |
1089 |
> |
gpr(3) = NQD_unknown_hook(gpr(3)); |
1090 |
> |
break; |
1091 |
> |
case NATIVE_NQD_BITBLT_HOOK: |
1092 |
|
gpr(3) = NQD_bitblt_hook(gpr(3)); |
1093 |
|
break; |
1094 |
< |
case NATIVE_BITBLT: |
1094 |
> |
case NATIVE_NQD_BITBLT: |
1095 |
|
NQD_bitblt(gpr(3)); |
1096 |
|
break; |
1097 |
< |
case NATIVE_FILLRECT_HOOK: |
1097 |
> |
case NATIVE_NQD_FILLRECT_HOOK: |
1098 |
|
gpr(3) = NQD_fillrect_hook(gpr(3)); |
1099 |
|
break; |
1100 |
< |
case NATIVE_INVRECT: |
1100 |
> |
case NATIVE_NQD_INVRECT: |
1101 |
|
NQD_invrect(gpr(3)); |
1102 |
|
break; |
1103 |
< |
case NATIVE_FILLRECT: |
1103 |
> |
case NATIVE_NQD_FILLRECT: |
1104 |
|
NQD_fillrect(gpr(3)); |
1105 |
|
break; |
1106 |
|
case NATIVE_SERIAL_NOTHING: |
1124 |
|
break; |
1125 |
|
} |
1126 |
|
case NATIVE_GET_RESOURCE: |
1127 |
+ |
get_resource(ReadMacInt32(XLM_GET_RESOURCE)); |
1128 |
+ |
break; |
1129 |
|
case NATIVE_GET_1_RESOURCE: |
1130 |
+ |
get_resource(ReadMacInt32(XLM_GET_1_RESOURCE)); |
1131 |
+ |
break; |
1132 |
|
case NATIVE_GET_IND_RESOURCE: |
1133 |
+ |
get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE)); |
1134 |
+ |
break; |
1135 |
|
case NATIVE_GET_1_IND_RESOURCE: |
1136 |
< |
case NATIVE_R_GET_RESOURCE: { |
1137 |
< |
typedef void (*GetResourceCallback)(void); |
1138 |
< |
static const GetResourceCallback get_resource_callbacks[] = { |
1139 |
< |
::get_resource, |
1262 |
< |
::get_1_resource, |
1263 |
< |
::get_ind_resource, |
1264 |
< |
::get_1_ind_resource, |
1265 |
< |
::r_get_resource |
1266 |
< |
}; |
1267 |
< |
get_resource_callbacks[selector - NATIVE_GET_RESOURCE](); |
1136 |
> |
get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE)); |
1137 |
> |
break; |
1138 |
> |
case NATIVE_R_GET_RESOURCE: |
1139 |
> |
get_resource(ReadMacInt32(XLM_R_GET_RESOURCE)); |
1140 |
|
break; |
1269 |
– |
} |
1141 |
|
case NATIVE_MAKE_EXECUTABLE: |
1142 |
< |
MakeExecutable(0, (void *)gpr(4), gpr(5)); |
1142 |
> |
MakeExecutable(0, gpr(4), gpr(5)); |
1143 |
|
break; |
1144 |
|
case NATIVE_CHECK_LOAD_INVOC: |
1145 |
|
check_load_invoc(gpr(3), gpr(4), gpr(5)); |
1146 |
|
break; |
1147 |
+ |
case NATIVE_NAMED_CHECK_LOAD_INVOC: |
1148 |
+ |
named_check_load_invoc(gpr(3), gpr(4), gpr(5)); |
1149 |
+ |
break; |
1150 |
|
default: |
1151 |
|
printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector); |
1152 |
|
QuitEmulator(); |
1233 |
|
const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6, arg7 }; |
1234 |
|
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1235 |
|
} |
1362 |
– |
|
1363 |
– |
/* |
1364 |
– |
* Resource Manager thunks |
1365 |
– |
*/ |
1366 |
– |
|
1367 |
– |
void get_resource(void) |
1368 |
– |
{ |
1369 |
– |
ppc_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE)); |
1370 |
– |
} |
1371 |
– |
|
1372 |
– |
void get_1_resource(void) |
1373 |
– |
{ |
1374 |
– |
ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE)); |
1375 |
– |
} |
1376 |
– |
|
1377 |
– |
void get_ind_resource(void) |
1378 |
– |
{ |
1379 |
– |
ppc_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE)); |
1380 |
– |
} |
1381 |
– |
|
1382 |
– |
void get_1_ind_resource(void) |
1383 |
– |
{ |
1384 |
– |
ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE)); |
1385 |
– |
} |
1386 |
– |
|
1387 |
– |
void r_get_resource(void) |
1388 |
– |
{ |
1389 |
– |
ppc_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE)); |
1390 |
– |
} |