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root/cebix/SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.40 by gbeauche, 2004-05-20T11:47:27Z vs.
Revision 1.77 by asvitkine, 2012-06-16T02:16:40Z

#	Line 1 | Line 1
1		/*
2		*  sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface
3		*
4	<	*  SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig
4	>	*  SheepShaver (C) 1997-2008 Christian Bauer and Marc Hellwig
5		*
6		*  This program is free software; you can redistribute it and/or modify
7		*  it under the terms of the GNU General Public License as published by
#	Line 42 | Line 42
42
43		#include <stdio.h>
44		#include <stdlib.h>
45	+	#ifdef HAVE_MALLOC_H
46	+	#include <malloc.h>
47	+	#endif
48	+
49	+	#ifdef USE_SDL_VIDEO
50	+	#include <SDL_events.h>
51	+	#endif
52
53		#if ENABLE_MON
54		#include "mon.h"
#	Line 51 | Line 58
58		#define DEBUG 0
59		#include "debug.h"
60
61	+	extern "C" {
62	+	#include "dis-asm.h"
63	+	}
64	+
65		// Emulation time statistics
66	<	#define EMUL_TIME_STATS 1
66	>	#ifndef EMUL_TIME_STATS
67	>	#define EMUL_TIME_STATS 0
68	>	#endif
69
70		#if EMUL_TIME_STATS
71		static clock_t emul_start_time;
72	<	static uint32 interrupt_count = 0;
72	>	static uint32 interrupt_count = 0, ppc_interrupt_count = 0;
73		static clock_t interrupt_time = 0;
74		static uint32 exec68k_count = 0;
75		static clock_t exec68k_time = 0;
#	Line 80 | Line 93 | extern uintptr SignalStackBase();
93
94		// From rsrc_patches.cpp
95		extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
96	+	extern "C" void named_check_load_invoc(uint32 type, uint32 name, uint32 h);
97
98		// PowerPC EmulOp to exit from emulation looop
99		const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1;
100
87	–	// Enable multicore (main/interrupts) cpu emulation?
88	–	#define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0)
89	–
90	–	// Enable interrupt routine safety checks?
91	–	#define SAFE_INTERRUPT_PPC 1
92	–
101		// Enable Execute68k() safety checks?
102		#define SAFE_EXEC_68K 1
103
#	Line 102 | Line 110 | const uint32 POWERPC_EXEC_RETURN = POWER
110		// Interrupts in native mode?
111		#define INTERRUPTS_IN_NATIVE_MODE 1
112
105	–	// Enable native EMUL_OPs to be run without a mode switch
106	–	#define ENABLE_NATIVE_EMUL_OP 1
107	–
113		// Pointer to Kernel Data
114	<	static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE;
114	>	static KernelData * kernel_data;
115
116		// SIGSEGV handler
117	<	static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
117	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
118
119		#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
120		// Special trampolines for EmulOp and NativeOp
#	Line 117 | Line 122 | static uint8 *emul_op_trampoline;
122		static uint8 *native_op_trampoline;
123		#endif
124
120	–	// JIT Compiler enabled?
121	–	static inline bool enable_jit_p()
122	–	{
123	–	return PrefsFindBool("jit");
124	–	}
125	–
125
126		/**
127		*              PowerPC emulator glue with special 'sheep' opcodes
#	Line 139 | Line 138 | class sheepshaver_cpu
138		void init_decoder();
139		void execute_sheep(uint32 opcode);
140
142	–	// Filter out EMUL_OP routines that only call native code
143	–	bool filter_execute_emul_op(uint32 emul_op);
144	–
145	–	// "Native" EMUL_OP routines
146	–	void execute_emul_op_microseconds();
147	–	void execute_emul_op_idle_time_1();
148	–	void execute_emul_op_idle_time_2();
149	–
150	–	// CPU context to preserve on interrupt
151	–	class interrupt_context {
152	–	uint32 gpr[32];
153	–	uint32 pc;
154	–	uint32 lr;
155	–	uint32 ctr;
156	–	uint32 cr;
157	–	uint32 xer;
158	–	sheepshaver_cpu *cpu;
159	–	const char *where;
160	–	public:
161	–	interrupt_context(sheepshaver_cpu *_cpu, const char *_where);
162	–	~interrupt_context();
163	–	};
164	–
141		public:
142
143		// Constructor
#	Line 188 | Line 164 | public:
164		// Execute MacOS/PPC code
165		uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args);
166
167	+	#if PPC_ENABLE_JIT
168		// Compile one instruction
169		virtual int compile1(codegen_context_t & cg_context);
170	<
170	>	#endif
171		// Resource manager thunk
172		void get_resource(uint32 old_get_resource);
173
174		// Handle MacOS interrupt
175		void interrupt(uint32 entry);
199	–	void handle_interrupt();
176
177		// Make sure the SIGSEGV handler can access CPU registers
178	<	friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
178	>	friend sigsegv_return_t sigsegv_handler(sigsegv_info_t *sip);
179		};
180
205	–	// Memory allocator returning areas aligned on 16-byte boundaries
206	–	void *operator new(size_t size)
207	–	{
208	–	void *p;
209	–
210	–	#if defined(HAVE_POSIX_MEMALIGN)
211	–	if (posix_memalign(&p, 16, size) != 0)
212	–	throw std::bad_alloc();
213	–	#elif defined(HAVE_MEMALIGN)
214	–	p = memalign(16, size);
215	–	#elif defined(HAVE_VALLOC)
216	–	p = valloc(size); // page-aligned!
217	–	#else
218	–	/* XXX: handle padding ourselves */
219	–	p = malloc(size);
220	–	#endif
221	–
222	–	return p;
223	–	}
224	–
225	–	void operator delete(void *p)
226	–	{
227	–	#if defined(HAVE_MEMALIGN) || defined(HAVE_VALLOC)
228	–	#if defined(__GLIBC__)
229	–	// this is known to work only with GNU libc
230	–	free(p);
231	–	#endif
232	–	#else
233	–	free(p);
234	–	#endif
235	–	}
236	–
181		sheepshaver_cpu::sheepshaver_cpu()
238	–	: powerpc_cpu(enable_jit_p())
182		{
183		init_decoder();
184	+
185	+	#if PPC_ENABLE_JIT
186	+	if (PrefsFindBool("jit"))
187	+	enable_jit();
188	+	#endif
189		}
190
191		void sheepshaver_cpu::init_decoder()
#	Line 245 | Line 193 | void sheepshaver_cpu::init_decoder()
193		static const instr_info_t sheep_ii_table[] = {
194		{ "sheep",
195		(execute_pmf)&sheepshaver_cpu::execute_sheep,
248	–	NULL,
196		PPC_I(SHEEP),
197		D_form, 6, 0, CFLOW_JUMP | CFLOW_TRAP
198		}
#	Line 271 | Line 218 | typedef bit_field< 19, 19 > FN_field;
218		typedef bit_field< 20, 25 > NATIVE_OP_field;
219		typedef bit_field< 26, 31 > EMUL_OP_field;
220
274	–	// "Native" EMUL_OP routines
275	–	#define GPR_A(REG) gpr(16 + (REG))
276	–	#define GPR_D(REG) gpr( 8 + (REG))
277	–
278	–	void sheepshaver_cpu::execute_emul_op_microseconds()
279	–	{
280	–	Microseconds(GPR_A(0), GPR_D(0));
281	–	}
282	–
283	–	void sheepshaver_cpu::execute_emul_op_idle_time_1()
284	–	{
285	–	// Sleep if no events pending
286	–	if (ReadMacInt32(0x14c) == 0)
287	–	Delay_usec(16667);
288	–	GPR_A(0) = ReadMacInt32(0x2b6);
289	–	}
290	–
291	–	void sheepshaver_cpu::execute_emul_op_idle_time_2()
292	–	{
293	–	// Sleep if no events pending
294	–	if (ReadMacInt32(0x14c) == 0)
295	–	Delay_usec(16667);
296	–	GPR_D(0) = (uint32)-2;
297	–	}
298	–
299	–	// Filter out EMUL_OP routines that only call native code
300	–	bool sheepshaver_cpu::filter_execute_emul_op(uint32 emul_op)
301	–	{
302	–	switch (emul_op) {
303	–	case OP_MICROSECONDS:
304	–	execute_emul_op_microseconds();
305	–	return true;
306	–	case OP_IDLE_TIME:
307	–	execute_emul_op_idle_time_1();
308	–	return true;
309	–	case OP_IDLE_TIME_2:
310	–	execute_emul_op_idle_time_2();
311	–	return true;
312	–	}
313	–	return false;
314	–	}
315	–
221		// Execute EMUL_OP routine
222		void sheepshaver_cpu::execute_emul_op(uint32 emul_op)
223		{
319	–	#if ENABLE_NATIVE_EMUL_OP
320	–	// First, filter out EMUL_OPs that can be executed without a mode switch
321	–	if (filter_execute_emul_op(emul_op))
322	–	return;
323	–	#endif
324	–
224		M68kRegisters r68;
225		WriteMacInt32(XLM_68K_R25, gpr(25));
226		WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
#	Line 330 | Line 229 | void sheepshaver_cpu::execute_emul_op(ui
229		for (int i = 0; i < 7; i++)
230		r68.a[i] = gpr(16 + i);
231		r68.a[7] = gpr(1);
232	<	uint32 saved_cr = get_cr() & CR_field<2>::mask();
232	>	uint32 saved_cr = get_cr() & 0xff9fffff; // mask_operand::compute(11, 8)
233		uint32 saved_xer = get_xer();
234		EmulOp(&r68, gpr(24), emul_op);
235		set_cr(saved_cr);
#	Line 374 | Line 273 | void sheepshaver_cpu::execute_sheep(uint
273		}
274
275		// Compile one instruction
276	+	#if PPC_ENABLE_JIT
277		int sheepshaver_cpu::compile1(codegen_context_t & cg_context)
278		{
379	–	#if PPC_ENABLE_JIT
279		const instr_info_t *ii = cg_context.instr_info;
280		if (ii->mnemo != PPC_I(SHEEP))
281		return COMPILE_FAILURE;
#	Line 438 | Line 337 | int sheepshaver_cpu::compile1(codegen_co
337		status = COMPILE_CODE_OK;
338		break;
339		}
340	+	#endif
341		case NATIVE_CHECK_LOAD_INVOC:
342		dg.gen_load_T0_GPR(3);
343		dg.gen_load_T1_GPR(4);
#	Line 446 | Line 346 | int sheepshaver_cpu::compile1(codegen_co
346		dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))check_load_invoc);
347		status = COMPILE_CODE_OK;
348		break;
349	<	#endif
350	<	case NATIVE_DISABLE_INTERRUPT:
351	<	dg.gen_invoke(DisableInterrupt);
349	>	case NATIVE_NAMED_CHECK_LOAD_INVOC:
350	>	dg.gen_load_T0_GPR(3);
351	>	dg.gen_load_T1_GPR(4);
352	>	dg.gen_load_T2_GPR(5);
353	>	dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))named_check_load_invoc);
354	>	status = COMPILE_CODE_OK;
355	>	break;
356	>	case NATIVE_NQD_SYNC_HOOK:
357	>	dg.gen_load_T0_GPR(3);
358	>	dg.gen_invoke_T0_ret_T0((uint32 (*)(uint32))NQD_sync_hook);
359	>	dg.gen_store_T0_GPR(3);
360	>	status = COMPILE_CODE_OK;
361	>	break;
362	>	case NATIVE_NQD_BITBLT_HOOK:
363	>	dg.gen_load_T0_GPR(3);
364	>	dg.gen_invoke_T0_ret_T0((uint32 (*)(uint32))NQD_bitblt_hook);
365	>	dg.gen_store_T0_GPR(3);
366	>	status = COMPILE_CODE_OK;
367	>	break;
368	>	case NATIVE_NQD_FILLRECT_HOOK:
369	>	dg.gen_load_T0_GPR(3);
370	>	dg.gen_invoke_T0_ret_T0((uint32 (*)(uint32))NQD_fillrect_hook);
371	>	dg.gen_store_T0_GPR(3);
372		status = COMPILE_CODE_OK;
373		break;
374	<	case NATIVE_ENABLE_INTERRUPT:
375	<	dg.gen_invoke(EnableInterrupt);
374	>	case NATIVE_NQD_UNKNOWN_HOOK:
375	>	dg.gen_load_T0_GPR(3);
376	>	dg.gen_invoke_T0_ret_T0((uint32 (*)(uint32))NQD_unknown_hook);
377	>	dg.gen_store_T0_GPR(3);
378		status = COMPILE_CODE_OK;
379		break;
380	<	case NATIVE_BITBLT:
380	>	case NATIVE_NQD_BITBLT:
381		dg.gen_load_T0_GPR(3);
382		dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt);
383		status = COMPILE_CODE_OK;
384		break;
385	<	case NATIVE_INVRECT:
385	>	case NATIVE_NQD_INVRECT:
386		dg.gen_load_T0_GPR(3);
387		dg.gen_invoke_T0((void (*)(uint32))NQD_invrect);
388		status = COMPILE_CODE_OK;
389		break;
390	<	case NATIVE_FILLRECT:
390	>	case NATIVE_NQD_FILLRECT:
391		dg.gen_load_T0_GPR(3);
392		dg.gen_invoke_T0((void (*)(uint32))NQD_fillrect);
393		status = COMPILE_CODE_OK;
394		break;
395		}
396		// Could we fully translate this NativeOp?
397	<	if (FN_field::test(opcode)) {
398	<	if (status != COMPILE_FAILURE) {
399	<	dg.gen_load_A0_LR();
400	<	dg.gen_set_PC_A0();
397	>	if (status == COMPILE_CODE_OK) {
398	>	if (!FN_field::test(opcode))
399	>	cg_context.done_compile = false;
400	>	else {
401	>	dg.gen_load_T0_LR_aligned();
402	>	dg.gen_set_PC_T0();
403	>	cg_context.done_compile = true;
404		}
480	–	cg_context.done_compile = true;
481	–	break;
482	–	}
483	–	else if (status != COMPILE_FAILURE) {
484	–	cg_context.done_compile = false;
405		break;
406		}
407		#if PPC_REENTRANT_JIT
408		// Try to execute NativeOp trampoline
409	<	dg.gen_set_PC_im(cg_context.pc + 4);
409	>	if (!FN_field::test(opcode))
410	>	dg.gen_set_PC_im(cg_context.pc + 4);
411	>	else {
412	>	dg.gen_load_T0_LR_aligned();
413	>	dg.gen_set_PC_T0();
414	>	}
415		dg.gen_mov_32_T0_im(selector);
416		dg.gen_jmp(native_op_trampoline);
417		cg_context.done_compile = true;
#	Line 494 | Line 419 | int sheepshaver_cpu::compile1(codegen_co
419		break;
420		#endif
421		// Invoke NativeOp handler
422	<	typedef void (*func_t)(dyngen_cpu_base, uint32);
423	<	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
424	<	dg.gen_invoke_CPU_im(func, selector);
425	<	cg_context.done_compile = false;
426	<	status = COMPILE_CODE_OK;
422	>	if (!FN_field::test(opcode)) {
423	>	typedef void (*func_t)(dyngen_cpu_base, uint32);
424	>	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
425	>	dg.gen_invoke_CPU_im(func, selector);
426	>	cg_context.done_compile = false;
427	>	status = COMPILE_CODE_OK;
428	>	}
429	>	// Otherwise, let it generate a call to execute_sheep() which
430	>	// will cause necessary updates to the program counter
431		break;
432		}
433
434		default: {      // EMUL_OP
435		uint32 emul_op = EMUL_OP_field::extract(opcode) - 3;
507	–	#if ENABLE_NATIVE_EMUL_OP
508	–	typedef void (*emul_op_func_t)(dyngen_cpu_base);
509	–	emul_op_func_t emul_op_func = 0;
510	–	switch (emul_op) {
511	–	case OP_MICROSECONDS:
512	–	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_microseconds).ptr();
513	–	break;
514	–	case OP_IDLE_TIME:
515	–	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_1).ptr();
516	–	break;
517	–	case OP_IDLE_TIME_2:
518	–	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_2).ptr();
519	–	break;
520	–	}
521	–	if (emul_op_func) {
522	–	dg.gen_invoke_CPU(emul_op_func);
523	–	cg_context.done_compile = false;
524	–	status = COMPILE_CODE_OK;
525	–	break;
526	–	}
527	–	#endif
436		#if PPC_REENTRANT_JIT
437		// Try to execute EmulOp trampoline
438		dg.gen_set_PC_im(cg_context.pc + 4);
#	Line 544 | Line 452 | int sheepshaver_cpu::compile1(codegen_co
452		}
453		}
454		return status;
547	–	#endif
548	–	return COMPILE_FAILURE;
549	–	}
550	–
551	–	// CPU context to preserve on interrupt
552	–	sheepshaver_cpu::interrupt_context::interrupt_context(sheepshaver_cpu *_cpu, const char *_where)
553	–	{
554	–	#if SAFE_INTERRUPT_PPC >= 2
555	–	cpu = _cpu;
556	–	where = _where;
557	–
558	–	// Save interrupt context
559	–	memcpy(&gpr[0], &cpu->gpr(0), sizeof(gpr));
560	–	pc = cpu->pc();
561	–	lr = cpu->lr();
562	–	ctr = cpu->ctr();
563	–	cr = cpu->get_cr();
564	–	xer = cpu->get_xer();
565	–	#endif
455		}
567	–
568	–	sheepshaver_cpu::interrupt_context::~interrupt_context()
569	–	{
570	–	#if SAFE_INTERRUPT_PPC >= 2
571	–	// Check whether CPU context was preserved by interrupt
572	–	if (memcmp(&gpr[0], &cpu->gpr(0), sizeof(gpr)) != 0) {
573	–	printf("FATAL: %s: interrupt clobbers registers\n", where);
574	–	for (int i = 0; i < 32; i++)
575	–	if (gpr[i] != cpu->gpr(i))
576	–	printf(" r%d: %08x -> %08x\n", i, gpr[i], cpu->gpr(i));
577	–	}
578	–	if (pc != cpu->pc())
579	–	printf("FATAL: %s: interrupt clobbers PC\n", where);
580	–	if (lr != cpu->lr())
581	–	printf("FATAL: %s: interrupt clobbers LR\n", where);
582	–	if (ctr != cpu->ctr())
583	–	printf("FATAL: %s: interrupt clobbers CTR\n", where);
584	–	if (cr != cpu->get_cr())
585	–	printf("FATAL: %s: interrupt clobbers CR\n", where);
586	–	if (xer != cpu->get_xer())
587	–	printf("FATAL: %s: interrupt clobbers XER\n", where);
456		#endif
589	–	}
457
458		// Handle MacOS interrupt
459		void sheepshaver_cpu::interrupt(uint32 entry)
460		{
461		#if EMUL_TIME_STATS
462	<	interrupt_count++;
462	>	ppc_interrupt_count++;
463		const clock_t interrupt_start = clock();
464		#endif
465
599	–	#if SAFE_INTERRUPT_PPC
600	–	static int depth = 0;
601	–	if (depth != 0)
602	–	printf("FATAL: sheepshaver_cpu::interrupt() called more than once: %d\n", depth);
603	–	depth++;
604	–	#endif
605	–
606	–	#if !MULTICORE_CPU
466		// Save program counters and branch registers
467		uint32 saved_pc = pc();
468		uint32 saved_lr = lr();
469		uint32 saved_ctr= ctr();
470		uint32 saved_sp = gpr(1);
612	–	#endif
471
472		// Initialize stack pointer to SheepShaver alternate stack base
473		gpr(1) = SignalStackBase() - 64;
#	Line 649 | Line 507 | void sheepshaver_cpu::interrupt(uint32 e
507		// Enter nanokernel
508		execute(entry);
509
652	–	#if !MULTICORE_CPU
510		// Restore program counters and branch registers
511		pc() = saved_pc;
512		lr() = saved_lr;
513		ctr()= saved_ctr;
514		gpr(1) = saved_sp;
658	–	#endif
515
516		#if EMUL_TIME_STATS
517		interrupt_time += (clock() - interrupt_start);
518		#endif
663	–
664	–	#if SAFE_INTERRUPT_PPC
665	–	depth--;
666	–	#endif
519		}
520
521		// Execute 68k routine
#	Line 857 | Line 709 | inline void sheepshaver_cpu::get_resourc
709		*              SheepShaver CPU engine interface
710		**/
711
712	<	static sheepshaver_cpu *main_cpu = NULL;                // CPU emulator to handle usual control flow
713	<	static sheepshaver_cpu *interrupt_cpu = NULL;   // CPU emulator to handle interrupts
862	<	static sheepshaver_cpu *current_cpu = NULL;             // Current CPU emulator context
712	>	// PowerPC CPU emulator
713	>	static sheepshaver_cpu *ppc_cpu = NULL;
714
715		void FlushCodeCache(uintptr start, uintptr end)
716		{
717		D(bug("FlushCodeCache(%08x, %08x)\n", start, end));
718	<	main_cpu->invalidate_cache_range(start, end);
868	<	#if MULTICORE_CPU
869	<	interrupt_cpu->invalidate_cache_range(start, end);
870	<	#endif
718	>	ppc_cpu->invalidate_cache_range(start, end);
719		}
720
721	<	static inline void cpu_push(sheepshaver_cpu *new_cpu)
721	>	// Dump PPC registers
722	>	static void dump_registers(void)
723		{
724	<	#if MULTICORE_CPU
876	<	current_cpu = new_cpu;
877	<	#endif
724	>	ppc_cpu->dump_registers();
725		}
726
727	<	static inline void cpu_pop()
727	>	// Dump log
728	>	static void dump_log(void)
729		{
730	<	#if MULTICORE_CPU
883	<	current_cpu = main_cpu;
884	<	#endif
730	>	ppc_cpu->dump_log();
731		}
732
733	<	// Dump PPC registers
888	<	static void dump_registers(void)
733	>	static int read_mem(bfd_vma memaddr, bfd_byte *myaddr, int length, struct disassemble_info *info)
734		{
735	<	current_cpu->dump_registers();
735	>	Mac2Host_memcpy(myaddr, memaddr, length);
736	>	return 0;
737		}
738
739	<	// Dump log
894	<	static void dump_log(void)
739	>	static void dump_disassembly(const uint32 pc, const int prefix_count, const int suffix_count)
740		{
741	<	current_cpu->dump_log();
742	<	}
741	>	struct disassemble_info info;
742	>	INIT_DISASSEMBLE_INFO(info, stderr, fprintf);
743	>	info.read_memory_func = read_mem;
744
745	<	/*
746	<	*  Initialize CPU emulation
747	<	*/
745	>	const int count = prefix_count + suffix_count + 1;
746	>	const uint32 base_addr = pc - prefix_count * 4;
747	>	for (int i = 0; i < count; i++) {
748	>	const bfd_vma addr = base_addr + i * 4;
749	>	fprintf(stderr, "%s0x%8llx:  ", addr == pc ? " >" : "  ", addr);
750	>	print_insn_ppc(addr, &info);
751	>	fprintf(stderr, "\n");
752	>	}
753	>	}
754
755	<	static sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
755	>	sigsegv_return_t sigsegv_handler(sigsegv_info_t *sip)
756		{
757		#if ENABLE_VOSF
758		// Handle screen fault
759	<	extern bool Screen_fault_handler(sigsegv_address_t, sigsegv_address_t);
760	<	if (Screen_fault_handler(fault_address, fault_instruction))
759	>	extern bool Screen_fault_handler(sigsegv_info_t *sip);
760	>	if (Screen_fault_handler(sip))
761		return SIGSEGV_RETURN_SUCCESS;
762		#endif
763
764	<	const uintptr addr = (uintptr)fault_address;
764	>	const uintptr addr = (uintptr)sigsegv_get_fault_address(sip);
765		#if HAVE_SIGSEGV_SKIP_INSTRUCTION
766		// Ignore writes to ROM
767	<	if ((addr - ROM_BASE) < ROM_SIZE)
767	>	if ((addr - (uintptr)ROMBaseHost) < ROM_SIZE)
768		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
769
770		// Get program counter of target CPU
771	<	sheepshaver_cpu * const cpu = current_cpu;
771	>	sheepshaver_cpu * const cpu = ppc_cpu;
772		const uint32 pc = cpu->pc();
773
774		// Fault in Mac ROM or RAM?
775	<	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize));
775	>	bool mac_fault = (pc >= ROMBase) && (pc < (ROMBase + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize)) || (pc >= DR_CACHE_BASE && pc < (DR_CACHE_BASE + DR_CACHE_SIZE));
776		if (mac_fault) {
777
778		// "VM settings" during MacOS 8 installation
779	<	if (pc == ROM_BASE + 0x488160 && cpu->gpr(20) == 0xf8000000)
779	>	if (pc == ROMBase + 0x488160 && cpu->gpr(20) == 0xf8000000)
780		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
781
782		// MacOS 8.5 installation
783	<	else if (pc == ROM_BASE + 0x488140 && cpu->gpr(16) == 0xf8000000)
783	>	else if (pc == ROMBase + 0x488140 && cpu->gpr(16) == 0xf8000000)
784		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
785
786		// MacOS 8 serial drivers on startup
787	<	else if (pc == ROM_BASE + 0x48e080 && (cpu->gpr(8) == 0xf3012002 || cpu->gpr(8) == 0xf3012000))
787	>	else if (pc == ROMBase + 0x48e080 && (cpu->gpr(8) == 0xf3012002 || cpu->gpr(8) == 0xf3012000))
788		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
789
790		// MacOS 8.1 serial drivers on startup
791	<	else if (pc == ROM_BASE + 0x48c5e0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
791	>	else if (pc == ROMBase + 0x48c5e0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
792	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
793	>	else if (pc == ROMBase + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
794		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
795	<	else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
795	>
796	>	// MacOS 8.6 serial drivers on startup (with DR Cache and OldWorld ROM)
797	>	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(16) == 0xf3012002 || cpu->gpr(16) == 0xf3012000))
798	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
799	>	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
800		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
801
802		// Ignore writes to the zero page
#	Line 953 | Line 811 | static sigsegv_return_t sigsegv_handler(
811		#error "FIXME: You don't have the capability to skip instruction within signal handlers"
812		#endif
813
814	<	printf("SIGSEGV\n");
815	<	printf("  pc %p\n", fault_instruction);
816	<	printf("  ea %p\n", fault_address);
959	<	printf(" cpu %s\n", current_cpu == main_cpu ? "main" : "interrupts");
814	>	fprintf(stderr, "SIGSEGV\n");
815	>	fprintf(stderr, "  pc %p\n", sigsegv_get_fault_instruction_address(sip));
816	>	fprintf(stderr, "  ea %p\n", sigsegv_get_fault_address(sip));
817		dump_registers();
818	<	current_cpu->dump_log();
818	>	ppc_cpu->dump_log();
819	>	dump_disassembly(pc, 8, 8);
820	>
821		enter_mon();
822		QuitEmulator();
823
824		return SIGSEGV_RETURN_FAILURE;
825		}
826
827	+	/*
828	+	*  Initialize CPU emulation
829	+	*/
830	+
831		void init_emul_ppc(void)
832		{
833	+	// Get pointer to KernelData in host address space
834	+	kernel_data = (KernelData *)Mac2HostAddr(KERNEL_DATA_BASE);
835	+
836		// Initialize main CPU emulator
837	<	main_cpu = new sheepshaver_cpu();
838	<	main_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
839	<	main_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
837	>	ppc_cpu = new sheepshaver_cpu();
838	>	ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROMBase + 0x30d000));
839	>	ppc_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
840		WriteMacInt32(XLM_RUN_MODE, MODE_68K);
841
976	–	#if MULTICORE_CPU
977	–	// Initialize alternate CPU emulator to handle interrupts
978	–	interrupt_cpu = new sheepshaver_cpu();
979	–	#endif
980	–
981	–	// Install the handler for SIGSEGV
982	–	sigsegv_install_handler(sigsegv_handler);
983	–
842		#if ENABLE_MON
843		// Install "regs" command in cxmon
844		mon_add_command("regs", dump_registers, "regs                     Dump PowerPC registers\n");
#	Line 1006 | Line 864 | void exit_emul_ppc(void)
864		printf("Total emulation time : %.1f sec\n", double(emul_time) / double(CLOCKS_PER_SEC));
865		printf("Total interrupt count: %d (%2.1f Hz)\n", interrupt_count,
866		(double(interrupt_count) * CLOCKS_PER_SEC) / double(emul_time));
867	+	printf("Total ppc interrupt count: %d (%2.1f %%)\n", ppc_interrupt_count,
868	+	(double(ppc_interrupt_count) * 100.0) / double(interrupt_count));
869
870		#define PRINT_STATS(LABEL, VAR_PREFIX) do {                                                             \
871		printf("Total " LABEL " count : %d\n", VAR_PREFIX##_count);             \
#	Line 1022 | Line 882 | void exit_emul_ppc(void)
882		printf("\n");
883		#endif
884
885	<	delete main_cpu;
886	<	#if MULTICORE_CPU
1027	<	delete interrupt_cpu;
1028	<	#endif
885	>	delete ppc_cpu;
886	>	ppc_cpu = NULL;
887		}
888
889		#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
#	Line 1060 | Line 918 | void init_emul_op_trampolines(basic_dyng
918
919		void emul_ppc(uint32 entry)
920		{
1063	–	current_cpu = main_cpu;
921		#if 0
922	<	current_cpu->start_log();
922	>	ppc_cpu->start_log();
923		#endif
924		// start emulation loop and enable code translation or caching
925	<	current_cpu->execute(entry);
925	>	ppc_cpu->execute(entry);
926		}
927
928		/*
929		*  Handle PowerPC interrupt
930		*/
931
1075	–	#if ASYNC_IRQ
1076	–	void HandleInterrupt(void)
1077	–	{
1078	–	main_cpu->handle_interrupt();
1079	–	}
1080	–	#else
932		void TriggerInterrupt(void)
933		{
934	+	idle_resume();
935		#if 0
936		WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1);
937		#else
938		// Trigger interrupt to main cpu only
939	<	if (main_cpu)
940	<	main_cpu->trigger_interrupt();
939	>	if (ppc_cpu)
940	>	ppc_cpu->trigger_interrupt();
941		#endif
942		}
1091	–	#endif
943
944	<	void sheepshaver_cpu::handle_interrupt(void)
944	>	void HandleInterrupt(powerpc_registers *r)
945		{
946	<	// Do nothing if interrupts are disabled
947	<	if (*(int32 *)XLM_IRQ_NEST > 0)
948	<	return;
946	>	#ifdef USE_SDL_VIDEO
947	>	// We must fill in the events queue in the same thread that did call SDL_SetVideoMode()
948	>	SDL_PumpEvents();
949	>	#endif
950
951	<	// Do nothing if there is no interrupt pending
952	<	if (InterruptFlags == 0)
951	>	// Do nothing if interrupts are disabled
952	>	if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0)
953		return;
954
955	<	// Current interrupt nest level
956	<	static int interrupt_depth = 0;
957	<	++interrupt_depth;
958	<
1107	<	// Disable MacOS stack sniffer
1108	<	WriteMacInt32(0x110, 0);
955	>	// Update interrupt count
956	>	#if EMUL_TIME_STATS
957	>	interrupt_count++;
958	>	#endif
959
960		// Interrupt action depends on current run mode
961		switch (ReadMacInt32(XLM_RUN_MODE)) {
962		case MODE_68K:
963		// 68k emulator active, trigger 68k interrupt level 1
1114	–	assert(current_cpu == main_cpu);
964		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
965	<	set_cr(get_cr() | tswap32(kernel_data->v[0x674 >> 2]));
965	>	r->cr.set(r->cr.get() | tswap32(kernel_data->v[0x674 >> 2]));
966		break;
967
968		#if INTERRUPTS_IN_NATIVE_MODE
969		case MODE_NATIVE:
970		// 68k emulator inactive, in nanokernel?
971	<	assert(current_cpu == main_cpu);
1123	<	if (gpr(1) != KernelDataAddr && interrupt_depth == 1) {
1124	<	interrupt_context ctx(this, "PowerPC mode");
971	>	if (r->gpr[1] != KernelDataAddr) {
972
973		// Prepare for 68k interrupt level 1
974		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
#	Line 1131 | Line 978 | void sheepshaver_cpu::handle_interrupt(v
978
979		// Execute nanokernel interrupt routine (this will activate the 68k emulator)
980		DisableInterrupt();
1134	–	cpu_push(interrupt_cpu);
981		if (ROMType == ROMTYPE_NEWWORLD)
982	<	current_cpu->interrupt(ROM_BASE + 0x312b1c);
982	>	ppc_cpu->interrupt(ROMBase + 0x312b1c);
983		else
984	<	current_cpu->interrupt(ROM_BASE + 0x312a3c);
1139	<	cpu_pop();
984	>	ppc_cpu->interrupt(ROMBase + 0x312a3c);
985		}
986		break;
987		#endif
#	Line 1145 | Line 990 | void sheepshaver_cpu::handle_interrupt(v
990		case MODE_EMUL_OP:
991		// 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0
992		if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) {
993	<	interrupt_context ctx(this, "68k mode");
993	>	#if EMUL_TIME_STATS
994	>	const clock_t interrupt_start = clock();
995	>	#endif
996		#if 1
997		// Execute full 68k interrupt routine
998		M68kRegisters r;
999		uint32 old_r25 = ReadMacInt32(XLM_68K_R25);     // Save interrupt level
1000		WriteMacInt32(XLM_68K_R25, 0x21);                       // Execute with interrupt level 1
1001	<	static const uint8 proc[] = {
1001	>	static const uint8 proc_template[] = {
1002		0x3f, 0x3c, 0x00, 0x00,                 // move.w       #$0000,-(sp)    (fake format word)
1003		0x48, 0x7a, 0x00, 0x0a,                 // pea          @1(pc)                  (return address)
1004		0x40, 0xe7,                                             // move         sr,-(sp)                (saved SR)
#	Line 1159 | Line 1006 | void sheepshaver_cpu::handle_interrupt(v
1006		0x4e, 0xd0,                                             // jmp          (a0)
1007		M68K_RTS >> 8, M68K_RTS & 0xff  // @1
1008		};
1009	<	Execute68k((uint32)proc, &r);
1009	>	BUILD_SHEEPSHAVER_PROCEDURE(proc);
1010	>	Execute68k(proc, &r);
1011		WriteMacInt32(XLM_68K_R25, old_r25);            // Restore interrupt level
1012		#else
1013		// Only update cursor
#	Line 1171 | Line 1019 | void sheepshaver_cpu::handle_interrupt(v
1019		}
1020		}
1021		#endif
1022	+	#if EMUL_TIME_STATS
1023	+	interrupt_time += (clock() - interrupt_start);
1024	+	#endif
1025		}
1026		break;
1027		#endif
1028		}
1178	–
1179	–	// We are done with this interrupt
1180	–	--interrupt_depth;
1029		}
1030
1183	–	static void get_resource(void);
1184	–	static void get_1_resource(void);
1185	–	static void get_ind_resource(void);
1186	–	static void get_1_ind_resource(void);
1187	–	static void r_get_resource(void);
1188	–
1031		// Execute NATIVE_OP routine
1032		void sheepshaver_cpu::execute_native_op(uint32 selector)
1033		{
#	Line 1205 | Line 1047 | void sheepshaver_cpu::execute_native_op(
1047		VideoVBL();
1048		break;
1049		case NATIVE_VIDEO_DO_DRIVER_IO:
1050	<	gpr(3) = (int32)(int16)VideoDoDriverIO((void *)gpr(3), (void *)gpr(4),
1051	<	(void *)gpr(5), gpr(6), gpr(7));
1050	>	gpr(3) = (int32)(int16)VideoDoDriverIO(gpr(3), gpr(4), gpr(5), gpr(6), gpr(7));
1051	>	break;
1052	>	case NATIVE_ETHER_AO_GET_HWADDR:
1053	>	AO_get_ethernet_address(gpr(3));
1054	>	break;
1055	>	case NATIVE_ETHER_AO_ADD_MULTI:
1056	>	AO_enable_multicast(gpr(3));
1057	>	break;
1058	>	case NATIVE_ETHER_AO_DEL_MULTI:
1059	>	AO_disable_multicast(gpr(3));
1060	>	break;
1061	>	case NATIVE_ETHER_AO_SEND_PACKET:
1062	>	AO_transmit_packet(gpr(3));
1063		break;
1211	–	#ifdef WORDS_BIGENDIAN
1064		case NATIVE_ETHER_IRQ:
1065		EtherIRQ();
1066		break;
#	Line 1230 | Line 1082 | void sheepshaver_cpu::execute_native_op(
1082		case NATIVE_ETHER_RSRV:
1083		gpr(3) = ether_rsrv((queue_t *)gpr(3));
1084		break;
1085	<	#else
1234	<	case NATIVE_ETHER_INIT:
1235	<	// FIXME: needs more complicated thunks
1236	<	gpr(3) = false;
1237	<	break;
1238	<	#endif
1239	<	case NATIVE_SYNC_HOOK:
1085	>	case NATIVE_NQD_SYNC_HOOK:
1086		gpr(3) = NQD_sync_hook(gpr(3));
1087		break;
1088	<	case NATIVE_BITBLT_HOOK:
1088	>	case NATIVE_NQD_UNKNOWN_HOOK:
1089	>	gpr(3) = NQD_unknown_hook(gpr(3));
1090	>	break;
1091	>	case NATIVE_NQD_BITBLT_HOOK:
1092		gpr(3) = NQD_bitblt_hook(gpr(3));
1093		break;
1094	<	case NATIVE_BITBLT:
1094	>	case NATIVE_NQD_BITBLT:
1095		NQD_bitblt(gpr(3));
1096		break;
1097	<	case NATIVE_FILLRECT_HOOK:
1097	>	case NATIVE_NQD_FILLRECT_HOOK:
1098		gpr(3) = NQD_fillrect_hook(gpr(3));
1099		break;
1100	<	case NATIVE_INVRECT:
1100	>	case NATIVE_NQD_INVRECT:
1101		NQD_invrect(gpr(3));
1102		break;
1103	<	case NATIVE_FILLRECT:
1103	>	case NATIVE_NQD_FILLRECT:
1104		NQD_fillrect(gpr(3));
1105		break;
1106		case NATIVE_SERIAL_NOTHING:
#	Line 1275 | Line 1124 | void sheepshaver_cpu::execute_native_op(
1124		break;
1125		}
1126		case NATIVE_GET_RESOURCE:
1127	+	get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1128	+	break;
1129		case NATIVE_GET_1_RESOURCE:
1130	+	get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1131	+	break;
1132		case NATIVE_GET_IND_RESOURCE:
1133	<	case NATIVE_GET_1_IND_RESOURCE:
1281	<	case NATIVE_R_GET_RESOURCE: {
1282	<	typedef void (*GetResourceCallback)(void);
1283	<	static const GetResourceCallback get_resource_callbacks[] = {
1284	<	::get_resource,
1285	<	::get_1_resource,
1286	<	::get_ind_resource,
1287	<	::get_1_ind_resource,
1288	<	::r_get_resource
1289	<	};
1290	<	get_resource_callbacks[selector - NATIVE_GET_RESOURCE]();
1133	>	get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1134		break;
1135	<	}
1136	<	case NATIVE_DISABLE_INTERRUPT:
1294	<	DisableInterrupt();
1135	>	case NATIVE_GET_1_IND_RESOURCE:
1136	>	get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1137		break;
1138	<	case NATIVE_ENABLE_INTERRUPT:
1139	<	EnableInterrupt();
1138	>	case NATIVE_R_GET_RESOURCE:
1139	>	get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1140		break;
1141		case NATIVE_MAKE_EXECUTABLE:
1142	<	MakeExecutable(0, (void *)gpr(4), gpr(5));
1142	>	MakeExecutable(0, gpr(4), gpr(5));
1143		break;
1144		case NATIVE_CHECK_LOAD_INVOC:
1145		check_load_invoc(gpr(3), gpr(4), gpr(5));
1146		break;
1147	+	case NATIVE_NAMED_CHECK_LOAD_INVOC:
1148	+	named_check_load_invoc(gpr(3), gpr(4), gpr(5));
1149	+	break;
1150		default:
1151		printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector);
1152		QuitEmulator();
#	Line 1321 | Line 1166 | void sheepshaver_cpu::execute_native_op(
1166
1167		void Execute68k(uint32 pc, M68kRegisters *r)
1168		{
1169	<	current_cpu->execute_68k(pc, r);
1169	>	ppc_cpu->execute_68k(pc, r);
1170		}
1171
1172		/*
#	Line 1344 | Line 1189 | void Execute68kTrap(uint16 trap, M68kReg
1189
1190		uint32 call_macos(uint32 tvect)
1191		{
1192	<	return current_cpu->execute_macos_code(tvect, 0, NULL);
1192	>	return ppc_cpu->execute_macos_code(tvect, 0, NULL);
1193		}
1194
1195		uint32 call_macos1(uint32 tvect, uint32 arg1)
1196		{
1197		const uint32 args[] = { arg1 };
1198	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1198	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1199		}
1200
1201		uint32 call_macos2(uint32 tvect, uint32 arg1, uint32 arg2)
1202		{
1203		const uint32 args[] = { arg1, arg2 };
1204	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1204	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1205		}
1206
1207		uint32 call_macos3(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3)
1208		{
1209		const uint32 args[] = { arg1, arg2, arg3 };
1210	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1210	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1211		}
1212
1213		uint32 call_macos4(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4)
1214		{
1215		const uint32 args[] = { arg1, arg2, arg3, arg4 };
1216	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1216	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1217		}
1218
1219		uint32 call_macos5(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5)
1220		{
1221		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5 };
1222	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1222	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1223		}
1224
1225		uint32 call_macos6(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6)
1226		{
1227		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6 };
1228	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1228	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1229		}
1230
1231		uint32 call_macos7(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6, uint32 arg7)
1232		{
1233		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6, arg7 };
1234	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1390	<	}
1391	<
1392	<	/*
1393	<	*  Resource Manager thunks
1394	<	*/
1395	<
1396	<	void get_resource(void)
1397	<	{
1398	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1399	<	}
1400	<
1401	<	void get_1_resource(void)
1402	<	{
1403	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1404	<	}
1405	<
1406	<	void get_ind_resource(void)
1407	<	{
1408	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1409	<	}
1410	<
1411	<	void get_1_ind_resource(void)
1412	<	{
1413	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1414	<	}
1415	<
1416	<	void r_get_resource(void)
1417	<	{
1418	<	current_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1234	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1235		}

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