1 |
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/* |
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* sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface |
3 |
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* |
4 |
< |
* SheepShaver (C) 1997-2002 Christian Bauer and Marc Hellwig |
4 |
> |
* SheepShaver (C) 1997-2008 Christian Bauer and Marc Hellwig |
5 |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License as published by |
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#include "sysdeps.h" |
22 |
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#include "cpu_emulation.h" |
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#include "main.h" |
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#include "prefs.h" |
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#include "xlowmem.h" |
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#include "emul_op.h" |
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#include "rom_patches.h" |
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#include "macos_util.h" |
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#include "block-alloc.hpp" |
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#include "sigsegv.h" |
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#include "spcflags.h" |
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#include "cpu/ppc/ppc-cpu.hpp" |
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#include "cpu/ppc/ppc-operations.hpp" |
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#include "cpu/ppc/ppc-instructions.hpp" |
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#include "thunks.h" |
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|
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// Used for NativeOp trampolines |
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#include "video.h" |
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#include "name_registry.h" |
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#include "serial.h" |
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#include "ether.h" |
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#include "timer.h" |
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|
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#include <stdio.h> |
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#include <stdlib.h> |
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#ifdef HAVE_MALLOC_H |
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#include <malloc.h> |
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#endif |
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|
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#ifdef USE_SDL_VIDEO |
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#include <SDL_events.h> |
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#endif |
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|
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#if ENABLE_MON |
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#include "mon.h" |
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#include "mon_disass.h" |
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#endif |
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|
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#define DEBUG 1 |
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#define DEBUG 0 |
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#include "debug.h" |
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|
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extern "C" { |
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#include "dis-asm.h" |
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} |
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|
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// Emulation time statistics |
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#ifndef EMUL_TIME_STATS |
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#define EMUL_TIME_STATS 0 |
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#endif |
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|
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#if EMUL_TIME_STATS |
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static clock_t emul_start_time; |
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static uint32 interrupt_count = 0, ppc_interrupt_count = 0; |
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static clock_t interrupt_time = 0; |
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static uint32 exec68k_count = 0; |
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static clock_t exec68k_time = 0; |
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static uint32 native_exec_count = 0; |
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static clock_t native_exec_time = 0; |
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static uint32 macos_exec_count = 0; |
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static clock_t macos_exec_time = 0; |
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#endif |
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|
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static void enter_mon(void) |
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{ |
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// Start up mon in real-mode |
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#endif |
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} |
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|
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// Enable multicore (main/interrupts) cpu emulation? |
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#define MULTICORE_CPU 0 |
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// From main_*.cpp |
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extern uintptr SignalStackBase(); |
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|
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// From rsrc_patches.cpp |
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extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h); |
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extern "C" void named_check_load_invoc(uint32 type, uint32 name, uint32 h); |
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|
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// PowerPC EmulOp to exit from emulation looop |
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const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1; |
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|
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// Enable Execute68k() safety checks? |
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#define SAFE_EXEC_68K 1 |
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// Interrupts in native mode? |
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#define INTERRUPTS_IN_NATIVE_MODE 1 |
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|
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// 68k Emulator Data |
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struct EmulatorData { |
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uint32 v[0x400]; |
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}; |
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// Pointer to Kernel Data |
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static KernelData * kernel_data; |
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|
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// Kernel Data |
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struct KernelData { |
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uint32 v[0x400]; |
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EmulatorData ed; |
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}; |
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// SIGSEGV handler |
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sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t); |
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|
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// Pointer to Kernel Data |
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static KernelData * const kernel_data = (KernelData *)0x68ffe000; |
119 |
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#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT |
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// Special trampolines for EmulOp and NativeOp |
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static uint8 *emul_op_trampoline; |
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static uint8 *native_op_trampoline; |
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#endif |
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|
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|
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/** |
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* PowerPC emulator glue with special 'sheep' opcodes |
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**/ |
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|
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< |
struct sheepshaver_exec_return { }; |
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enum { |
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PPC_I(SHEEP) = PPC_I(MAX), |
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PPC_I(SHEEP_MAX) |
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}; |
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|
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class sheepshaver_cpu |
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: public powerpc_cpu |
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|
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public: |
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|
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sheepshaver_cpu() |
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: powerpc_cpu() |
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{ init_decoder(); } |
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// Constructor |
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sheepshaver_cpu(); |
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|
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// Condition Register accessors |
146 |
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// CR & XER accessors |
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uint32 get_cr() const { return cr().get(); } |
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void set_cr(uint32 v) { cr().set(v); } |
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uint32 get_xer() const { return xer().get(); } |
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void set_xer(uint32 v) { xer().set(v); } |
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|
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// Execution loop |
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void execute(uint32 pc); |
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// Execute NATIVE_OP routine |
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void execute_native_op(uint32 native_op); |
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|
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// Execute EMUL_OP routine |
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void execute_emul_op(uint32 emul_op); |
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|
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// Execute 68k routine |
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void execute_68k(uint32 entry, M68kRegisters *r); |
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// Execute MacOS/PPC code |
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uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args); |
166 |
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|
167 |
+ |
#if PPC_ENABLE_JIT |
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// Compile one instruction |
169 |
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virtual int compile1(codegen_context_t & cg_context); |
170 |
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#endif |
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// Resource manager thunk |
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void get_resource(uint32 old_get_resource); |
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|
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// Handle MacOS interrupt |
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< |
void interrupt(uint32 entry, sheepshaver_cpu *cpu); |
175 |
> |
void interrupt(uint32 entry); |
176 |
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|
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< |
// spcflags for interrupts handling |
178 |
< |
static uint32 spcflags; |
130 |
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|
131 |
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// Lazy memory allocator (one item at a time) |
132 |
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void *operator new(size_t size) |
133 |
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{ return allocator_helper< sheepshaver_cpu, lazy_allocator >::allocate(); } |
134 |
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void operator delete(void *p) |
135 |
< |
{ allocator_helper< sheepshaver_cpu, lazy_allocator >::deallocate(p); } |
136 |
< |
// FIXME: really make surre array allocation fail at link time? |
137 |
< |
void *operator new[](size_t); |
138 |
< |
void operator delete[](void *p); |
177 |
> |
// Make sure the SIGSEGV handler can access CPU registers |
178 |
> |
friend sigsegv_return_t sigsegv_handler(sigsegv_info_t *sip); |
179 |
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}; |
180 |
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|
181 |
< |
uint32 sheepshaver_cpu::spcflags = 0; |
142 |
< |
lazy_allocator< sheepshaver_cpu > allocator_helper< sheepshaver_cpu, lazy_allocator >::allocator; |
143 |
< |
|
144 |
< |
void sheepshaver_cpu::init_decoder() |
181 |
> |
sheepshaver_cpu::sheepshaver_cpu() |
182 |
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{ |
183 |
< |
#ifndef PPC_NO_STATIC_II_INDEX_TABLE |
184 |
< |
static bool initialized = false; |
185 |
< |
if (initialized) |
186 |
< |
return; |
187 |
< |
initialized = true; |
183 |
> |
init_decoder(); |
184 |
> |
|
185 |
> |
#if PPC_ENABLE_JIT |
186 |
> |
if (PrefsFindBool("jit")) |
187 |
> |
enable_jit(); |
188 |
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#endif |
189 |
+ |
} |
190 |
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|
191 |
+ |
void sheepshaver_cpu::init_decoder() |
192 |
+ |
{ |
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static const instr_info_t sheep_ii_table[] = { |
194 |
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{ "sheep", |
195 |
< |
(execute_fn)&sheepshaver_cpu::execute_sheep, |
196 |
< |
NULL, |
197 |
< |
D_form, 6, 0, CFLOW_TRAP |
195 |
> |
(execute_pmf)&sheepshaver_cpu::execute_sheep, |
196 |
> |
PPC_I(SHEEP), |
197 |
> |
D_form, 6, 0, CFLOW_JUMP | CFLOW_TRAP |
198 |
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} |
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}; |
200 |
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|
207 |
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} |
208 |
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} |
209 |
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|
170 |
– |
// Forward declaration for native opcode handler |
171 |
– |
static void NativeOp(int selector); |
172 |
– |
|
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/* NativeOp instruction format: |
211 |
< |
+------------+--------------------------+--+----------+------------+ |
212 |
< |
| 6 | |FN| OP | 2 | |
213 |
< |
+------------+--------------------------+--+----------+------------+ |
214 |
< |
0 5 |6 19 20 21 25 26 31 |
211 |
> |
+------------+-------------------------+--+-----------+------------+ |
212 |
> |
| 6 | |FN| OP | 2 | |
213 |
> |
+------------+-------------------------+--+-----------+------------+ |
214 |
> |
0 5 |6 18 19 20 25 26 31 |
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*/ |
216 |
|
|
217 |
< |
typedef bit_field< 20, 20 > FN_field; |
218 |
< |
typedef bit_field< 21, 25 > NATIVE_OP_field; |
217 |
> |
typedef bit_field< 19, 19 > FN_field; |
218 |
> |
typedef bit_field< 20, 25 > NATIVE_OP_field; |
219 |
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typedef bit_field< 26, 31 > EMUL_OP_field; |
220 |
|
|
221 |
+ |
// Execute EMUL_OP routine |
222 |
+ |
void sheepshaver_cpu::execute_emul_op(uint32 emul_op) |
223 |
+ |
{ |
224 |
+ |
M68kRegisters r68; |
225 |
+ |
WriteMacInt32(XLM_68K_R25, gpr(25)); |
226 |
+ |
WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP); |
227 |
+ |
for (int i = 0; i < 8; i++) |
228 |
+ |
r68.d[i] = gpr(8 + i); |
229 |
+ |
for (int i = 0; i < 7; i++) |
230 |
+ |
r68.a[i] = gpr(16 + i); |
231 |
+ |
r68.a[7] = gpr(1); |
232 |
+ |
uint32 saved_cr = get_cr() & 0xff9fffff; // mask_operand::compute(11, 8) |
233 |
+ |
uint32 saved_xer = get_xer(); |
234 |
+ |
EmulOp(&r68, gpr(24), emul_op); |
235 |
+ |
set_cr(saved_cr); |
236 |
+ |
set_xer(saved_xer); |
237 |
+ |
for (int i = 0; i < 8; i++) |
238 |
+ |
gpr(8 + i) = r68.d[i]; |
239 |
+ |
for (int i = 0; i < 7; i++) |
240 |
+ |
gpr(16 + i) = r68.a[i]; |
241 |
+ |
gpr(1) = r68.a[7]; |
242 |
+ |
WriteMacInt32(XLM_RUN_MODE, MODE_68K); |
243 |
+ |
} |
244 |
+ |
|
245 |
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// Execute SheepShaver instruction |
246 |
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void sheepshaver_cpu::execute_sheep(uint32 opcode) |
247 |
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{ |
252 |
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case 0: // EMUL_RETURN |
253 |
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QuitEmulator(); |
254 |
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break; |
255 |
< |
|
255 |
> |
|
256 |
|
case 1: // EXEC_RETURN |
257 |
< |
throw sheepshaver_exec_return(); |
257 |
> |
spcflags().set(SPCFLAG_CPU_EXEC_RETURN); |
258 |
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break; |
259 |
|
|
260 |
|
case 2: // EXEC_NATIVE |
261 |
< |
NativeOp(NATIVE_OP_field::extract(opcode)); |
261 |
> |
execute_native_op(NATIVE_OP_field::extract(opcode)); |
262 |
|
if (FN_field::test(opcode)) |
263 |
|
pc() = lr(); |
264 |
|
else |
265 |
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pc() += 4; |
266 |
|
break; |
267 |
|
|
268 |
< |
default: { // EMUL_OP |
269 |
< |
M68kRegisters r68; |
209 |
< |
WriteMacInt32(XLM_68K_R25, gpr(25)); |
210 |
< |
WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP); |
211 |
< |
for (int i = 0; i < 8; i++) |
212 |
< |
r68.d[i] = gpr(8 + i); |
213 |
< |
for (int i = 0; i < 7; i++) |
214 |
< |
r68.a[i] = gpr(16 + i); |
215 |
< |
r68.a[7] = gpr(1); |
216 |
< |
EmulOp(&r68, gpr(24), EMUL_OP_field::extract(opcode) - 3); |
217 |
< |
for (int i = 0; i < 8; i++) |
218 |
< |
gpr(8 + i) = r68.d[i]; |
219 |
< |
for (int i = 0; i < 7; i++) |
220 |
< |
gpr(16 + i) = r68.a[i]; |
221 |
< |
gpr(1) = r68.a[7]; |
222 |
< |
WriteMacInt32(XLM_RUN_MODE, MODE_68K); |
268 |
> |
default: // EMUL_OP |
269 |
> |
execute_emul_op(EMUL_OP_field::extract(opcode) - 3); |
270 |
|
pc() += 4; |
271 |
|
break; |
272 |
|
} |
226 |
– |
} |
273 |
|
} |
274 |
|
|
275 |
< |
// Checks for pending interrupts |
276 |
< |
struct execute_nothing { |
277 |
< |
static inline void execute(powerpc_cpu *) { } |
278 |
< |
}; |
275 |
> |
// Compile one instruction |
276 |
> |
#if PPC_ENABLE_JIT |
277 |
> |
int sheepshaver_cpu::compile1(codegen_context_t & cg_context) |
278 |
> |
{ |
279 |
> |
const instr_info_t *ii = cg_context.instr_info; |
280 |
> |
if (ii->mnemo != PPC_I(SHEEP)) |
281 |
> |
return COMPILE_FAILURE; |
282 |
> |
|
283 |
> |
int status = COMPILE_FAILURE; |
284 |
> |
powerpc_dyngen & dg = cg_context.codegen; |
285 |
> |
uint32 opcode = cg_context.opcode; |
286 |
|
|
287 |
< |
static void HandleInterrupt(void); |
287 |
> |
switch (opcode & 0x3f) { |
288 |
> |
case 0: // EMUL_RETURN |
289 |
> |
dg.gen_invoke(QuitEmulator); |
290 |
> |
status = COMPILE_CODE_OK; |
291 |
> |
break; |
292 |
|
|
293 |
< |
struct execute_spcflags_check { |
294 |
< |
static inline void execute(powerpc_cpu *cpu) { |
295 |
< |
if (SPCFLAGS_TEST(SPCFLAG_ALL_BUT_EXEC_RETURN)) { |
296 |
< |
if (SPCFLAGS_TEST( SPCFLAG_ENTER_MON )) { |
297 |
< |
SPCFLAGS_CLEAR( SPCFLAG_ENTER_MON ); |
298 |
< |
enter_mon(); |
299 |
< |
} |
300 |
< |
if (SPCFLAGS_TEST( SPCFLAG_DOINT )) { |
301 |
< |
SPCFLAGS_CLEAR( SPCFLAG_DOINT ); |
302 |
< |
HandleInterrupt(); |
303 |
< |
} |
304 |
< |
if (SPCFLAGS_TEST( SPCFLAG_INT )) { |
305 |
< |
SPCFLAGS_CLEAR( SPCFLAG_INT ); |
306 |
< |
SPCFLAGS_SET( SPCFLAG_DOINT ); |
293 |
> |
case 1: // EXEC_RETURN |
294 |
> |
dg.gen_spcflags_set(SPCFLAG_CPU_EXEC_RETURN); |
295 |
> |
// Don't check for pending interrupts, we do know we have to |
296 |
> |
// get out of this block ASAP |
297 |
> |
dg.gen_exec_return(); |
298 |
> |
status = COMPILE_EPILOGUE_OK; |
299 |
> |
break; |
300 |
> |
|
301 |
> |
case 2: { // EXEC_NATIVE |
302 |
> |
uint32 selector = NATIVE_OP_field::extract(opcode); |
303 |
> |
switch (selector) { |
304 |
> |
#if !PPC_REENTRANT_JIT |
305 |
> |
// Filter out functions that may invoke Execute68k() or |
306 |
> |
// CallMacOS(), this would break reentrancy as they could |
307 |
> |
// invalidate the translation cache and even overwrite |
308 |
> |
// continuation code when we are done with them. |
309 |
> |
case NATIVE_PATCH_NAME_REGISTRY: |
310 |
> |
dg.gen_invoke(DoPatchNameRegistry); |
311 |
> |
status = COMPILE_CODE_OK; |
312 |
> |
break; |
313 |
> |
case NATIVE_VIDEO_INSTALL_ACCEL: |
314 |
> |
dg.gen_invoke(VideoInstallAccel); |
315 |
> |
status = COMPILE_CODE_OK; |
316 |
> |
break; |
317 |
> |
case NATIVE_VIDEO_VBL: |
318 |
> |
dg.gen_invoke(VideoVBL); |
319 |
> |
status = COMPILE_CODE_OK; |
320 |
> |
break; |
321 |
> |
case NATIVE_GET_RESOURCE: |
322 |
> |
case NATIVE_GET_1_RESOURCE: |
323 |
> |
case NATIVE_GET_IND_RESOURCE: |
324 |
> |
case NATIVE_GET_1_IND_RESOURCE: |
325 |
> |
case NATIVE_R_GET_RESOURCE: { |
326 |
> |
static const uint32 get_resource_ptr[] = { |
327 |
> |
XLM_GET_RESOURCE, |
328 |
> |
XLM_GET_1_RESOURCE, |
329 |
> |
XLM_GET_IND_RESOURCE, |
330 |
> |
XLM_GET_1_IND_RESOURCE, |
331 |
> |
XLM_R_GET_RESOURCE |
332 |
> |
}; |
333 |
> |
uint32 old_get_resource = ReadMacInt32(get_resource_ptr[selector - NATIVE_GET_RESOURCE]); |
334 |
> |
typedef void (*func_t)(dyngen_cpu_base, uint32); |
335 |
> |
func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::get_resource).ptr(); |
336 |
> |
dg.gen_invoke_CPU_im(func, old_get_resource); |
337 |
> |
status = COMPILE_CODE_OK; |
338 |
> |
break; |
339 |
> |
} |
340 |
> |
#endif |
341 |
> |
case NATIVE_CHECK_LOAD_INVOC: |
342 |
> |
dg.gen_load_T0_GPR(3); |
343 |
> |
dg.gen_load_T1_GPR(4); |
344 |
> |
dg.gen_se_16_32_T1(); |
345 |
> |
dg.gen_load_T2_GPR(5); |
346 |
> |
dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))check_load_invoc); |
347 |
> |
status = COMPILE_CODE_OK; |
348 |
> |
break; |
349 |
> |
case NATIVE_NAMED_CHECK_LOAD_INVOC: |
350 |
> |
dg.gen_load_T0_GPR(3); |
351 |
> |
dg.gen_load_T1_GPR(4); |
352 |
> |
dg.gen_load_T2_GPR(5); |
353 |
> |
dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))named_check_load_invoc); |
354 |
> |
status = COMPILE_CODE_OK; |
355 |
> |
break; |
356 |
> |
case NATIVE_NQD_SYNC_HOOK: |
357 |
> |
dg.gen_load_T0_GPR(3); |
358 |
> |
dg.gen_invoke_T0_ret_T0((uint32 (*)(uint32))NQD_sync_hook); |
359 |
> |
dg.gen_store_T0_GPR(3); |
360 |
> |
status = COMPILE_CODE_OK; |
361 |
> |
break; |
362 |
> |
case NATIVE_NQD_BITBLT_HOOK: |
363 |
> |
dg.gen_load_T0_GPR(3); |
364 |
> |
dg.gen_invoke_T0_ret_T0((uint32 (*)(uint32))NQD_bitblt_hook); |
365 |
> |
dg.gen_store_T0_GPR(3); |
366 |
> |
status = COMPILE_CODE_OK; |
367 |
> |
break; |
368 |
> |
case NATIVE_NQD_FILLRECT_HOOK: |
369 |
> |
dg.gen_load_T0_GPR(3); |
370 |
> |
dg.gen_invoke_T0_ret_T0((uint32 (*)(uint32))NQD_fillrect_hook); |
371 |
> |
dg.gen_store_T0_GPR(3); |
372 |
> |
status = COMPILE_CODE_OK; |
373 |
> |
break; |
374 |
> |
case NATIVE_NQD_UNKNOWN_HOOK: |
375 |
> |
dg.gen_load_T0_GPR(3); |
376 |
> |
dg.gen_invoke_T0_ret_T0((uint32 (*)(uint32))NQD_unknown_hook); |
377 |
> |
dg.gen_store_T0_GPR(3); |
378 |
> |
status = COMPILE_CODE_OK; |
379 |
> |
break; |
380 |
> |
case NATIVE_NQD_BITBLT: |
381 |
> |
dg.gen_load_T0_GPR(3); |
382 |
> |
dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt); |
383 |
> |
status = COMPILE_CODE_OK; |
384 |
> |
break; |
385 |
> |
case NATIVE_NQD_INVRECT: |
386 |
> |
dg.gen_load_T0_GPR(3); |
387 |
> |
dg.gen_invoke_T0((void (*)(uint32))NQD_invrect); |
388 |
> |
status = COMPILE_CODE_OK; |
389 |
> |
break; |
390 |
> |
case NATIVE_NQD_FILLRECT: |
391 |
> |
dg.gen_load_T0_GPR(3); |
392 |
> |
dg.gen_invoke_T0((void (*)(uint32))NQD_fillrect); |
393 |
> |
status = COMPILE_CODE_OK; |
394 |
> |
break; |
395 |
> |
} |
396 |
> |
// Could we fully translate this NativeOp? |
397 |
> |
if (status == COMPILE_CODE_OK) { |
398 |
> |
if (!FN_field::test(opcode)) |
399 |
> |
cg_context.done_compile = false; |
400 |
> |
else { |
401 |
> |
dg.gen_load_T0_LR_aligned(); |
402 |
> |
dg.gen_set_PC_T0(); |
403 |
> |
cg_context.done_compile = true; |
404 |
|
} |
405 |
+ |
break; |
406 |
|
} |
407 |
+ |
#if PPC_REENTRANT_JIT |
408 |
+ |
// Try to execute NativeOp trampoline |
409 |
+ |
if (!FN_field::test(opcode)) |
410 |
+ |
dg.gen_set_PC_im(cg_context.pc + 4); |
411 |
+ |
else { |
412 |
+ |
dg.gen_load_T0_LR_aligned(); |
413 |
+ |
dg.gen_set_PC_T0(); |
414 |
+ |
} |
415 |
+ |
dg.gen_mov_32_T0_im(selector); |
416 |
+ |
dg.gen_jmp(native_op_trampoline); |
417 |
+ |
cg_context.done_compile = true; |
418 |
+ |
status = COMPILE_EPILOGUE_OK; |
419 |
+ |
break; |
420 |
+ |
#endif |
421 |
+ |
// Invoke NativeOp handler |
422 |
+ |
if (!FN_field::test(opcode)) { |
423 |
+ |
typedef void (*func_t)(dyngen_cpu_base, uint32); |
424 |
+ |
func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr(); |
425 |
+ |
dg.gen_invoke_CPU_im(func, selector); |
426 |
+ |
cg_context.done_compile = false; |
427 |
+ |
status = COMPILE_CODE_OK; |
428 |
+ |
} |
429 |
+ |
// Otherwise, let it generate a call to execute_sheep() which |
430 |
+ |
// will cause necessary updates to the program counter |
431 |
+ |
break; |
432 |
|
} |
253 |
– |
}; |
433 |
|
|
434 |
< |
// Execution loop |
435 |
< |
void sheepshaver_cpu::execute(uint32 entry) |
436 |
< |
{ |
437 |
< |
try { |
438 |
< |
pc() = entry; |
439 |
< |
powerpc_cpu::do_execute<execute_nothing, execute_spcflags_check>(); |
440 |
< |
} |
441 |
< |
catch (sheepshaver_exec_return const &) { |
442 |
< |
// Nothing, simply return |
434 |
> |
default: { // EMUL_OP |
435 |
> |
uint32 emul_op = EMUL_OP_field::extract(opcode) - 3; |
436 |
> |
#if PPC_REENTRANT_JIT |
437 |
> |
// Try to execute EmulOp trampoline |
438 |
> |
dg.gen_set_PC_im(cg_context.pc + 4); |
439 |
> |
dg.gen_mov_32_T0_im(emul_op); |
440 |
> |
dg.gen_jmp(emul_op_trampoline); |
441 |
> |
cg_context.done_compile = true; |
442 |
> |
status = COMPILE_EPILOGUE_OK; |
443 |
> |
break; |
444 |
> |
#endif |
445 |
> |
// Invoke EmulOp handler |
446 |
> |
typedef void (*func_t)(dyngen_cpu_base, uint32); |
447 |
> |
func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr(); |
448 |
> |
dg.gen_invoke_CPU_im(func, emul_op); |
449 |
> |
cg_context.done_compile = false; |
450 |
> |
status = COMPILE_CODE_OK; |
451 |
> |
break; |
452 |
|
} |
265 |
– |
catch (...) { |
266 |
– |
printf("ERROR: execute() received an unknown exception!\n"); |
267 |
– |
QuitEmulator(); |
453 |
|
} |
454 |
+ |
return status; |
455 |
|
} |
456 |
+ |
#endif |
457 |
|
|
458 |
|
// Handle MacOS interrupt |
459 |
< |
void sheepshaver_cpu::interrupt(uint32 entry, sheepshaver_cpu *cpu) |
459 |
> |
void sheepshaver_cpu::interrupt(uint32 entry) |
460 |
|
{ |
461 |
< |
#if MULTICORE_CPU |
462 |
< |
// Initialize stack pointer from previous CPU running |
463 |
< |
gpr(1) = cpu->gpr(1); |
464 |
< |
#else |
461 |
> |
#if EMUL_TIME_STATS |
462 |
> |
ppc_interrupt_count++; |
463 |
> |
const clock_t interrupt_start = clock(); |
464 |
> |
#endif |
465 |
> |
|
466 |
|
// Save program counters and branch registers |
467 |
|
uint32 saved_pc = pc(); |
468 |
|
uint32 saved_lr = lr(); |
469 |
|
uint32 saved_ctr= ctr(); |
470 |
< |
#endif |
470 |
> |
uint32 saved_sp = gpr(1); |
471 |
|
|
472 |
< |
// Create stack frame |
473 |
< |
gpr(1) -= 64; |
472 |
> |
// Initialize stack pointer to SheepShaver alternate stack base |
473 |
> |
gpr(1) = SignalStackBase() - 64; |
474 |
|
|
475 |
|
// Build trampoline to return from interrupt |
476 |
< |
uint32 trampoline[] = { POWERPC_EMUL_OP | 1 }; |
476 |
> |
SheepVar32 trampoline = POWERPC_EXEC_RETURN; |
477 |
|
|
478 |
|
// Prepare registers for nanokernel interrupt routine |
479 |
< |
kernel_data->v[0x004 >> 2] = gpr(1); |
480 |
< |
kernel_data->v[0x018 >> 2] = gpr(6); |
479 |
> |
kernel_data->v[0x004 >> 2] = htonl(gpr(1)); |
480 |
> |
kernel_data->v[0x018 >> 2] = htonl(gpr(6)); |
481 |
|
|
482 |
< |
gpr(6) = kernel_data->v[0x65c >> 2]; |
482 |
> |
gpr(6) = ntohl(kernel_data->v[0x65c >> 2]); |
483 |
|
assert(gpr(6) != 0); |
484 |
|
WriteMacInt32(gpr(6) + 0x13c, gpr(7)); |
485 |
|
WriteMacInt32(gpr(6) + 0x144, gpr(8)); |
490 |
|
WriteMacInt32(gpr(6) + 0x16c, gpr(13)); |
491 |
|
|
492 |
|
gpr(1) = KernelDataAddr; |
493 |
< |
gpr(7) = kernel_data->v[0x660 >> 2]; |
493 |
> |
gpr(7) = ntohl(kernel_data->v[0x660 >> 2]); |
494 |
|
gpr(8) = 0; |
495 |
< |
gpr(10) = (uint32)trampoline; |
496 |
< |
gpr(12) = (uint32)trampoline; |
497 |
< |
gpr(13) = cr().get(); |
495 |
> |
gpr(10) = trampoline.addr(); |
496 |
> |
gpr(12) = trampoline.addr(); |
497 |
> |
gpr(13) = get_cr(); |
498 |
|
|
499 |
|
// rlwimi. r7,r7,8,0,0 |
500 |
|
uint32 result = op_ppc_rlwimi::apply(gpr(7), 8, 0x80000000, gpr(7)); |
502 |
|
gpr(7) = result; |
503 |
|
|
504 |
|
gpr(11) = 0xf072; // MSR (SRR1) |
505 |
< |
cr().set((gpr(11) & 0x0fff0000) | (cr().get() & ~0x0fff0000)); |
505 |
> |
cr().set((gpr(11) & 0x0fff0000) | (get_cr() & ~0x0fff0000)); |
506 |
|
|
507 |
|
// Enter nanokernel |
508 |
|
execute(entry); |
509 |
|
|
322 |
– |
// Cleanup stack |
323 |
– |
gpr(1) += 64; |
324 |
– |
|
325 |
– |
#if !MULTICORE_CPU |
510 |
|
// Restore program counters and branch registers |
511 |
|
pc() = saved_pc; |
512 |
|
lr() = saved_lr; |
513 |
|
ctr()= saved_ctr; |
514 |
+ |
gpr(1) = saved_sp; |
515 |
+ |
|
516 |
+ |
#if EMUL_TIME_STATS |
517 |
+ |
interrupt_time += (clock() - interrupt_start); |
518 |
|
#endif |
519 |
|
} |
520 |
|
|
521 |
|
// Execute 68k routine |
522 |
|
void sheepshaver_cpu::execute_68k(uint32 entry, M68kRegisters *r) |
523 |
|
{ |
524 |
+ |
#if EMUL_TIME_STATS |
525 |
+ |
exec68k_count++; |
526 |
+ |
const clock_t exec68k_start = clock(); |
527 |
+ |
#endif |
528 |
+ |
|
529 |
|
#if SAFE_EXEC_68K |
530 |
|
if (ReadMacInt32(XLM_RUN_MODE) != MODE_EMUL_OP) |
531 |
|
printf("FATAL: Execute68k() not called from EMUL_OP mode\n"); |
535 |
|
uint32 saved_pc = pc(); |
536 |
|
uint32 saved_lr = lr(); |
537 |
|
uint32 saved_ctr= ctr(); |
538 |
+ |
uint32 saved_cr = get_cr(); |
539 |
|
|
540 |
|
// Create MacOS stack frame |
541 |
+ |
// FIXME: make sure MacOS doesn't expect PPC registers to live on top |
542 |
|
uint32 sp = gpr(1); |
543 |
< |
gpr(1) -= 56 + 19*4 + 18*8; |
543 |
> |
gpr(1) -= 56; |
544 |
|
WriteMacInt32(gpr(1), sp); |
545 |
|
|
546 |
|
// Save PowerPC registers |
547 |
< |
memcpy(Mac2HostAddr(gpr(1)+56), &gpr(13), sizeof(uint32)*(32-13)); |
547 |
> |
uint32 saved_GPRs[19]; |
548 |
> |
memcpy(&saved_GPRs[0], &gpr(13), sizeof(uint32)*(32-13)); |
549 |
|
#if SAVE_FP_EXEC_68K |
550 |
< |
memcpy(Mac2HostAddr(gpr(1)+56+19*4), &fpr(14), sizeof(double)*(32-14)); |
550 |
> |
double saved_FPRs[18]; |
551 |
> |
memcpy(&saved_FPRs[0], &fpr(14), sizeof(double)*(32-14)); |
552 |
|
#endif |
553 |
|
|
554 |
|
// Setup registers for 68k emulator |
562 |
|
gpr(25) = ReadMacInt32(XLM_68K_R25); // MSB of SR |
563 |
|
gpr(26) = 0; |
564 |
|
gpr(28) = 0; // VBR |
565 |
< |
gpr(29) = kernel_data->ed.v[0x74 >> 2]; // Pointer to opcode table |
566 |
< |
gpr(30) = kernel_data->ed.v[0x78 >> 2]; // Address of emulator |
565 |
> |
gpr(29) = ntohl(kernel_data->ed.v[0x74 >> 2]); // Pointer to opcode table |
566 |
> |
gpr(30) = ntohl(kernel_data->ed.v[0x78 >> 2]); // Address of emulator |
567 |
|
gpr(31) = KernelDataAddr + 0x1000; |
568 |
|
|
569 |
|
// Push return address (points to EXEC_RETURN opcode) on stack |
595 |
|
r->a[i] = gpr(16 + i); |
596 |
|
|
597 |
|
// Restore PowerPC registers |
598 |
< |
memcpy(&gpr(13), Mac2HostAddr(gpr(1)+56), sizeof(uint32)*(32-13)); |
598 |
> |
memcpy(&gpr(13), &saved_GPRs[0], sizeof(uint32)*(32-13)); |
599 |
|
#if SAVE_FP_EXEC_68K |
600 |
< |
memcpy(&fpr(14), Mac2HostAddr(gpr(1)+56+19*4), sizeof(double)*(32-14)); |
600 |
> |
memcpy(&fpr(14), &saved_FPRs[0], sizeof(double)*(32-14)); |
601 |
|
#endif |
602 |
|
|
603 |
|
// Cleanup stack |
604 |
< |
gpr(1) += 56 + 19*4 + 18*8; |
604 |
> |
gpr(1) += 56; |
605 |
|
|
606 |
|
// Restore program counters and branch registers |
607 |
|
pc() = saved_pc; |
608 |
|
lr() = saved_lr; |
609 |
|
ctr()= saved_ctr; |
610 |
+ |
set_cr(saved_cr); |
611 |
+ |
|
612 |
+ |
#if EMUL_TIME_STATS |
613 |
+ |
exec68k_time += (clock() - exec68k_start); |
614 |
+ |
#endif |
615 |
|
} |
616 |
|
|
617 |
|
// Call MacOS PPC code |
618 |
|
uint32 sheepshaver_cpu::execute_macos_code(uint32 tvect, int nargs, uint32 const *args) |
619 |
|
{ |
620 |
+ |
#if EMUL_TIME_STATS |
621 |
+ |
macos_exec_count++; |
622 |
+ |
const clock_t macos_exec_start = clock(); |
623 |
+ |
#endif |
624 |
+ |
|
625 |
|
// Save program counters and branch registers |
626 |
|
uint32 saved_pc = pc(); |
627 |
|
uint32 saved_lr = lr(); |
628 |
|
uint32 saved_ctr= ctr(); |
629 |
|
|
630 |
|
// Build trampoline with EXEC_RETURN |
631 |
< |
uint32 trampoline[] = { POWERPC_EMUL_OP | 1 }; |
632 |
< |
lr() = (uint32)trampoline; |
631 |
> |
SheepVar32 trampoline = POWERPC_EXEC_RETURN; |
632 |
> |
lr() = trampoline.addr(); |
633 |
|
|
634 |
|
gpr(1) -= 64; // Create stack frame |
635 |
|
uint32 proc = ReadMacInt32(tvect); // Get routine address |
660 |
|
lr() = saved_lr; |
661 |
|
ctr()= saved_ctr; |
662 |
|
|
663 |
+ |
#if EMUL_TIME_STATS |
664 |
+ |
macos_exec_time += (clock() - macos_exec_start); |
665 |
+ |
#endif |
666 |
+ |
|
667 |
|
return retval; |
668 |
|
} |
669 |
|
|
672 |
|
{ |
673 |
|
// Save branch registers |
674 |
|
uint32 saved_lr = lr(); |
464 |
– |
uint32 saved_ctr= ctr(); |
675 |
|
|
676 |
< |
const uint32 trampoline[] = { POWERPC_EMUL_OP | 1 }; |
676 |
> |
SheepVar32 trampoline = POWERPC_EXEC_RETURN; |
677 |
> |
WriteMacInt32(trampoline.addr(), POWERPC_EXEC_RETURN); |
678 |
> |
lr() = trampoline.addr(); |
679 |
|
|
468 |
– |
lr() = (uint32)trampoline; |
469 |
– |
ctr()= entry; |
680 |
|
execute(entry); |
681 |
|
|
682 |
|
// Restore branch registers |
683 |
|
lr() = saved_lr; |
474 |
– |
ctr()= saved_ctr; |
684 |
|
} |
685 |
|
|
686 |
|
// Resource Manager thunk |
478 |
– |
extern "C" void check_load_invoc(uint32 type, int16 id, uint16 **h); |
479 |
– |
|
687 |
|
inline void sheepshaver_cpu::get_resource(uint32 old_get_resource) |
688 |
|
{ |
689 |
|
uint32 type = gpr(3); |
694 |
|
|
695 |
|
// Call old routine |
696 |
|
execute_ppc(old_get_resource); |
490 |
– |
uint16 **handle = (uint16 **)gpr(3); |
697 |
|
|
698 |
|
// Call CheckLoad() |
699 |
+ |
uint32 handle = gpr(3); |
700 |
|
check_load_invoc(type, id, handle); |
701 |
< |
gpr(3) = (uint32)handle; |
701 |
> |
gpr(3) = handle; |
702 |
|
|
703 |
|
// Cleanup stack |
704 |
|
gpr(1) += 56; |
709 |
|
* SheepShaver CPU engine interface |
710 |
|
**/ |
711 |
|
|
712 |
< |
static sheepshaver_cpu *main_cpu = NULL; // CPU emulator to handle usual control flow |
713 |
< |
static sheepshaver_cpu *interrupt_cpu = NULL; // CPU emulator to handle interrupts |
507 |
< |
static sheepshaver_cpu *current_cpu = NULL; // Current CPU emulator context |
712 |
> |
// PowerPC CPU emulator |
713 |
> |
static sheepshaver_cpu *ppc_cpu = NULL; |
714 |
|
|
715 |
< |
static inline void cpu_push(sheepshaver_cpu *new_cpu) |
715 |
> |
void FlushCodeCache(uintptr start, uintptr end) |
716 |
|
{ |
717 |
< |
#if MULTICORE_CPU |
718 |
< |
current_cpu = new_cpu; |
513 |
< |
#endif |
514 |
< |
} |
515 |
< |
|
516 |
< |
static inline void cpu_pop() |
517 |
< |
{ |
518 |
< |
#if MULTICORE_CPU |
519 |
< |
current_cpu = main_cpu; |
520 |
< |
#endif |
717 |
> |
D(bug("FlushCodeCache(%08x, %08x)\n", start, end)); |
718 |
> |
ppc_cpu->invalidate_cache_range(start, end); |
719 |
|
} |
720 |
|
|
721 |
|
// Dump PPC registers |
722 |
|
static void dump_registers(void) |
723 |
|
{ |
724 |
< |
current_cpu->dump_registers(); |
724 |
> |
ppc_cpu->dump_registers(); |
725 |
|
} |
726 |
|
|
727 |
|
// Dump log |
728 |
|
static void dump_log(void) |
729 |
|
{ |
730 |
< |
current_cpu->dump_log(); |
730 |
> |
ppc_cpu->dump_log(); |
731 |
|
} |
732 |
|
|
733 |
< |
/* |
734 |
< |
* Initialize CPU emulation |
735 |
< |
*/ |
733 |
> |
static int read_mem(bfd_vma memaddr, bfd_byte *myaddr, int length, struct disassemble_info *info) |
734 |
> |
{ |
735 |
> |
Mac2Host_memcpy(myaddr, memaddr, length); |
736 |
> |
return 0; |
737 |
> |
} |
738 |
|
|
739 |
< |
static struct sigaction sigsegv_action; |
739 |
> |
static void dump_disassembly(const uint32 pc, const int prefix_count, const int suffix_count) |
740 |
> |
{ |
741 |
> |
struct disassemble_info info; |
742 |
> |
INIT_DISASSEMBLE_INFO(info, stderr, fprintf); |
743 |
> |
info.read_memory_func = read_mem; |
744 |
|
|
745 |
< |
#if defined(__powerpc__) |
746 |
< |
#include <sys/ucontext.h> |
747 |
< |
#endif |
745 |
> |
const int count = prefix_count + suffix_count + 1; |
746 |
> |
const uint32 base_addr = pc - prefix_count * 4; |
747 |
> |
for (int i = 0; i < count; i++) { |
748 |
> |
const bfd_vma addr = base_addr + i * 4; |
749 |
> |
fprintf(stderr, "%s0x%8llx: ", addr == pc ? " >" : " ", addr); |
750 |
> |
print_insn_ppc(addr, &info); |
751 |
> |
fprintf(stderr, "\n"); |
752 |
> |
} |
753 |
> |
} |
754 |
|
|
755 |
< |
static void sigsegv_handler(int sig, siginfo_t *sip, void *scp) |
755 |
> |
sigsegv_return_t sigsegv_handler(sigsegv_info_t *sip) |
756 |
|
{ |
547 |
– |
const uintptr addr = (uintptr)sip->si_addr; |
757 |
|
#if ENABLE_VOSF |
758 |
< |
// Handle screen fault. |
759 |
< |
extern bool Screen_fault_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction); |
760 |
< |
if (Screen_fault_handler((sigsegv_address_t)addr, SIGSEGV_INVALID_PC)) |
761 |
< |
return; |
758 |
> |
// Handle screen fault |
759 |
> |
extern bool Screen_fault_handler(sigsegv_info_t *sip); |
760 |
> |
if (Screen_fault_handler(sip)) |
761 |
> |
return SIGSEGV_RETURN_SUCCESS; |
762 |
|
#endif |
763 |
< |
#if defined(__powerpc__) |
764 |
< |
if (addr >= ROM_BASE && addr < ROM_BASE + ROM_SIZE) { |
765 |
< |
printf("IGNORE write access to ROM at %08x\n", addr); |
766 |
< |
(((ucontext_t *)scp)->uc_mcontext.regs)->nip += 4; |
767 |
< |
return; |
768 |
< |
} |
769 |
< |
if (addr >= 0xf3012000 && addr < 0xf3014000 && 0) { |
770 |
< |
printf("IGNORE write access to ROM at %08x\n", addr); |
771 |
< |
(((ucontext_t *)scp)->uc_mcontext.regs)->nip += 4; |
772 |
< |
return; |
763 |
> |
|
764 |
> |
const uintptr addr = (uintptr)sigsegv_get_fault_address(sip); |
765 |
> |
#if HAVE_SIGSEGV_SKIP_INSTRUCTION |
766 |
> |
// Ignore writes to ROM |
767 |
> |
if ((addr - (uintptr)ROMBaseHost) < ROM_SIZE) |
768 |
> |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
769 |
> |
|
770 |
> |
// Get program counter of target CPU |
771 |
> |
sheepshaver_cpu * const cpu = ppc_cpu; |
772 |
> |
const uint32 pc = cpu->pc(); |
773 |
> |
|
774 |
> |
// Fault in Mac ROM or RAM? |
775 |
> |
bool mac_fault = (pc >= ROMBase) && (pc < (ROMBase + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize)) || (pc >= DR_CACHE_BASE && pc < (DR_CACHE_BASE + DR_CACHE_SIZE)); |
776 |
> |
if (mac_fault) { |
777 |
> |
|
778 |
> |
// "VM settings" during MacOS 8 installation |
779 |
> |
if (pc == ROMBase + 0x488160 && cpu->gpr(20) == 0xf8000000) |
780 |
> |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
781 |
> |
|
782 |
> |
// MacOS 8.5 installation |
783 |
> |
else if (pc == ROMBase + 0x488140 && cpu->gpr(16) == 0xf8000000) |
784 |
> |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
785 |
> |
|
786 |
> |
// MacOS 8 serial drivers on startup |
787 |
> |
else if (pc == ROMBase + 0x48e080 && (cpu->gpr(8) == 0xf3012002 || cpu->gpr(8) == 0xf3012000)) |
788 |
> |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
789 |
> |
|
790 |
> |
// MacOS 8.1 serial drivers on startup |
791 |
> |
else if (pc == ROMBase + 0x48c5e0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000)) |
792 |
> |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
793 |
> |
else if (pc == ROMBase + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000)) |
794 |
> |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
795 |
> |
|
796 |
> |
// MacOS 8.6 serial drivers on startup (with DR Cache and OldWorld ROM) |
797 |
> |
else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(16) == 0xf3012002 || cpu->gpr(16) == 0xf3012000)) |
798 |
> |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
799 |
> |
else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000)) |
800 |
> |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
801 |
> |
|
802 |
> |
// Ignore writes to the zero page |
803 |
> |
else if ((uint32)(addr - SheepMem::ZeroPage()) < (uint32)SheepMem::PageSize()) |
804 |
> |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
805 |
> |
|
806 |
> |
// Ignore all other faults, if requested |
807 |
> |
if (PrefsFindBool("ignoresegv")) |
808 |
> |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
809 |
|
} |
565 |
– |
#endif |
566 |
– |
printf("Caught SIGSEGV at address %p\n", sip->si_addr); |
567 |
– |
printf("Native PC: %08x\n", (((ucontext_t *)scp)->uc_mcontext.regs)->nip); |
568 |
– |
printf("Current CPU: %s\n", current_cpu == main_cpu ? "main" : "interrupts"); |
569 |
– |
#if 1 |
570 |
– |
dump_registers(); |
810 |
|
#else |
811 |
< |
printf("Main CPU context\n"); |
573 |
< |
main_cpu->dump_registers(); |
574 |
< |
printf("Interrupts CPU context\n"); |
575 |
< |
interrupt_cpu->dump_registers(); |
811 |
> |
#error "FIXME: You don't have the capability to skip instruction within signal handlers" |
812 |
|
#endif |
813 |
< |
current_cpu->dump_log(); |
813 |
> |
|
814 |
> |
fprintf(stderr, "SIGSEGV\n"); |
815 |
> |
fprintf(stderr, " pc %p\n", sigsegv_get_fault_instruction_address(sip)); |
816 |
> |
fprintf(stderr, " ea %p\n", sigsegv_get_fault_address(sip)); |
817 |
> |
dump_registers(); |
818 |
> |
ppc_cpu->dump_log(); |
819 |
> |
dump_disassembly(pc, 8, 8); |
820 |
> |
|
821 |
|
enter_mon(); |
822 |
|
QuitEmulator(); |
823 |
+ |
|
824 |
+ |
return SIGSEGV_RETURN_FAILURE; |
825 |
|
} |
826 |
|
|
827 |
+ |
/* |
828 |
+ |
* Initialize CPU emulation |
829 |
+ |
*/ |
830 |
+ |
|
831 |
|
void init_emul_ppc(void) |
832 |
|
{ |
833 |
+ |
// Get pointer to KernelData in host address space |
834 |
+ |
kernel_data = (KernelData *)Mac2HostAddr(KERNEL_DATA_BASE); |
835 |
+ |
|
836 |
|
// Initialize main CPU emulator |
837 |
< |
main_cpu = new sheepshaver_cpu(); |
838 |
< |
main_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000)); |
837 |
> |
ppc_cpu = new sheepshaver_cpu(); |
838 |
> |
ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROMBase + 0x30d000)); |
839 |
> |
ppc_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000)); |
840 |
|
WriteMacInt32(XLM_RUN_MODE, MODE_68K); |
841 |
|
|
589 |
– |
#if MULTICORE_CPU |
590 |
– |
// Initialize alternate CPU emulator to handle interrupts |
591 |
– |
interrupt_cpu = new sheepshaver_cpu(); |
592 |
– |
#endif |
593 |
– |
|
594 |
– |
// Install SIGSEGV handler |
595 |
– |
sigemptyset(&sigsegv_action.sa_mask); |
596 |
– |
sigsegv_action.sa_sigaction = sigsegv_handler; |
597 |
– |
sigsegv_action.sa_flags = SA_SIGINFO; |
598 |
– |
sigsegv_action.sa_restorer = NULL; |
599 |
– |
sigaction(SIGSEGV, &sigsegv_action, NULL); |
600 |
– |
|
842 |
|
#if ENABLE_MON |
843 |
|
// Install "regs" command in cxmon |
844 |
|
mon_add_command("regs", dump_registers, "regs Dump PowerPC registers\n"); |
845 |
|
mon_add_command("log", dump_log, "log Dump PowerPC emulation log\n"); |
846 |
|
#endif |
847 |
+ |
|
848 |
+ |
#if EMUL_TIME_STATS |
849 |
+ |
emul_start_time = clock(); |
850 |
+ |
#endif |
851 |
|
} |
852 |
|
|
853 |
|
/* |
854 |
+ |
* Deinitialize emulation |
855 |
+ |
*/ |
856 |
+ |
|
857 |
+ |
void exit_emul_ppc(void) |
858 |
+ |
{ |
859 |
+ |
#if EMUL_TIME_STATS |
860 |
+ |
clock_t emul_end_time = clock(); |
861 |
+ |
|
862 |
+ |
printf("### Statistics for SheepShaver emulation parts\n"); |
863 |
+ |
const clock_t emul_time = emul_end_time - emul_start_time; |
864 |
+ |
printf("Total emulation time : %.1f sec\n", double(emul_time) / double(CLOCKS_PER_SEC)); |
865 |
+ |
printf("Total interrupt count: %d (%2.1f Hz)\n", interrupt_count, |
866 |
+ |
(double(interrupt_count) * CLOCKS_PER_SEC) / double(emul_time)); |
867 |
+ |
printf("Total ppc interrupt count: %d (%2.1f %%)\n", ppc_interrupt_count, |
868 |
+ |
(double(ppc_interrupt_count) * 100.0) / double(interrupt_count)); |
869 |
+ |
|
870 |
+ |
#define PRINT_STATS(LABEL, VAR_PREFIX) do { \ |
871 |
+ |
printf("Total " LABEL " count : %d\n", VAR_PREFIX##_count); \ |
872 |
+ |
printf("Total " LABEL " time : %.1f sec (%.1f%%)\n", \ |
873 |
+ |
double(VAR_PREFIX##_time) / double(CLOCKS_PER_SEC), \ |
874 |
+ |
100.0 * double(VAR_PREFIX##_time) / double(emul_time)); \ |
875 |
+ |
} while (0) |
876 |
+ |
|
877 |
+ |
PRINT_STATS("Execute68k[Trap] execution", exec68k); |
878 |
+ |
PRINT_STATS("NativeOp execution", native_exec); |
879 |
+ |
PRINT_STATS("MacOS routine execution", macos_exec); |
880 |
+ |
|
881 |
+ |
#undef PRINT_STATS |
882 |
+ |
printf("\n"); |
883 |
+ |
#endif |
884 |
+ |
|
885 |
+ |
delete ppc_cpu; |
886 |
+ |
ppc_cpu = NULL; |
887 |
+ |
} |
888 |
+ |
|
889 |
+ |
#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT |
890 |
+ |
// Initialize EmulOp trampolines |
891 |
+ |
void init_emul_op_trampolines(basic_dyngen & dg) |
892 |
+ |
{ |
893 |
+ |
typedef void (*func_t)(dyngen_cpu_base, uint32); |
894 |
+ |
func_t func; |
895 |
+ |
|
896 |
+ |
// EmulOp |
897 |
+ |
emul_op_trampoline = dg.gen_start(); |
898 |
+ |
func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr(); |
899 |
+ |
dg.gen_invoke_CPU_T0(func); |
900 |
+ |
dg.gen_exec_return(); |
901 |
+ |
dg.gen_end(); |
902 |
+ |
|
903 |
+ |
// NativeOp |
904 |
+ |
native_op_trampoline = dg.gen_start(); |
905 |
+ |
func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr(); |
906 |
+ |
dg.gen_invoke_CPU_T0(func); |
907 |
+ |
dg.gen_exec_return(); |
908 |
+ |
dg.gen_end(); |
909 |
+ |
|
910 |
+ |
D(bug("EmulOp trampoline: %p\n", emul_op_trampoline)); |
911 |
+ |
D(bug("NativeOp trampoline: %p\n", native_op_trampoline)); |
912 |
+ |
} |
913 |
+ |
#endif |
914 |
+ |
|
915 |
+ |
/* |
916 |
|
* Emulation loop |
917 |
|
*/ |
918 |
|
|
919 |
|
void emul_ppc(uint32 entry) |
920 |
|
{ |
921 |
< |
current_cpu = main_cpu; |
922 |
< |
current_cpu->start_log(); |
923 |
< |
current_cpu->execute(entry); |
921 |
> |
#if 0 |
922 |
> |
ppc_cpu->start_log(); |
923 |
> |
#endif |
924 |
> |
// start emulation loop and enable code translation or caching |
925 |
> |
ppc_cpu->execute(entry); |
926 |
|
} |
927 |
|
|
928 |
|
/* |
929 |
|
* Handle PowerPC interrupt |
930 |
|
*/ |
931 |
|
|
623 |
– |
// Atomic operations |
624 |
– |
extern int atomic_add(int *var, int v); |
625 |
– |
extern int atomic_and(int *var, int v); |
626 |
– |
extern int atomic_or(int *var, int v); |
627 |
– |
|
932 |
|
void TriggerInterrupt(void) |
933 |
|
{ |
934 |
+ |
idle_resume(); |
935 |
|
#if 0 |
936 |
|
WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1); |
937 |
|
#else |
938 |
< |
SPCFLAGS_SET( SPCFLAG_INT ); |
938 |
> |
// Trigger interrupt to main cpu only |
939 |
> |
if (ppc_cpu) |
940 |
> |
ppc_cpu->trigger_interrupt(); |
941 |
|
#endif |
942 |
|
} |
943 |
|
|
944 |
< |
static void HandleInterrupt(void) |
944 |
> |
void HandleInterrupt(powerpc_registers *r) |
945 |
|
{ |
946 |
+ |
#ifdef USE_SDL_VIDEO |
947 |
+ |
// We must fill in the events queue in the same thread that did call SDL_SetVideoMode() |
948 |
+ |
SDL_PumpEvents(); |
949 |
+ |
#endif |
950 |
+ |
|
951 |
|
// Do nothing if interrupts are disabled |
952 |
|
if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0) |
953 |
|
return; |
954 |
|
|
955 |
< |
// Do nothing if there is no interrupt pending |
956 |
< |
if (InterruptFlags == 0) |
957 |
< |
return; |
958 |
< |
|
647 |
< |
// Disable MacOS stack sniffer |
648 |
< |
WriteMacInt32(0x110, 0); |
955 |
> |
// Update interrupt count |
956 |
> |
#if EMUL_TIME_STATS |
957 |
> |
interrupt_count++; |
958 |
> |
#endif |
959 |
|
|
960 |
|
// Interrupt action depends on current run mode |
961 |
|
switch (ReadMacInt32(XLM_RUN_MODE)) { |
962 |
|
case MODE_68K: |
963 |
|
// 68k emulator active, trigger 68k interrupt level 1 |
654 |
– |
assert(current_cpu == main_cpu); |
964 |
|
WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1); |
965 |
< |
main_cpu->set_cr(main_cpu->get_cr() | tswap32(kernel_data->v[0x674 >> 2])); |
965 |
> |
r->cr.set(r->cr.get() | tswap32(kernel_data->v[0x674 >> 2])); |
966 |
|
break; |
967 |
|
|
968 |
|
#if INTERRUPTS_IN_NATIVE_MODE |
969 |
|
case MODE_NATIVE: |
970 |
|
// 68k emulator inactive, in nanokernel? |
971 |
< |
assert(current_cpu == main_cpu); |
972 |
< |
if (main_cpu->gpr(1) != KernelDataAddr) { |
971 |
> |
if (r->gpr[1] != KernelDataAddr) { |
972 |
> |
|
973 |
|
// Prepare for 68k interrupt level 1 |
974 |
|
WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1); |
975 |
|
WriteMacInt32(tswap32(kernel_data->v[0x658 >> 2]) + 0xdc, |
978 |
|
|
979 |
|
// Execute nanokernel interrupt routine (this will activate the 68k emulator) |
980 |
|
DisableInterrupt(); |
672 |
– |
cpu_push(interrupt_cpu); |
981 |
|
if (ROMType == ROMTYPE_NEWWORLD) |
982 |
< |
current_cpu->interrupt(ROM_BASE + 0x312b1c, main_cpu); |
982 |
> |
ppc_cpu->interrupt(ROMBase + 0x312b1c); |
983 |
|
else |
984 |
< |
current_cpu->interrupt(ROM_BASE + 0x312a3c, main_cpu); |
677 |
< |
cpu_pop(); |
984 |
> |
ppc_cpu->interrupt(ROMBase + 0x312a3c); |
985 |
|
} |
986 |
|
break; |
987 |
|
#endif |
990 |
|
case MODE_EMUL_OP: |
991 |
|
// 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0 |
992 |
|
if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) { |
993 |
+ |
#if EMUL_TIME_STATS |
994 |
+ |
const clock_t interrupt_start = clock(); |
995 |
+ |
#endif |
996 |
|
#if 1 |
997 |
|
// Execute full 68k interrupt routine |
998 |
|
M68kRegisters r; |
999 |
|
uint32 old_r25 = ReadMacInt32(XLM_68K_R25); // Save interrupt level |
1000 |
|
WriteMacInt32(XLM_68K_R25, 0x21); // Execute with interrupt level 1 |
1001 |
< |
static const uint8 proc[] = { |
1001 |
> |
static const uint8 proc_template[] = { |
1002 |
|
0x3f, 0x3c, 0x00, 0x00, // move.w #$0000,-(sp) (fake format word) |
1003 |
|
0x48, 0x7a, 0x00, 0x0a, // pea @1(pc) (return address) |
1004 |
|
0x40, 0xe7, // move sr,-(sp) (saved SR) |
1006 |
|
0x4e, 0xd0, // jmp (a0) |
1007 |
|
M68K_RTS >> 8, M68K_RTS & 0xff // @1 |
1008 |
|
}; |
1009 |
< |
Execute68k((uint32)proc, &r); |
1009 |
> |
BUILD_SHEEPSHAVER_PROCEDURE(proc); |
1010 |
> |
Execute68k(proc, &r); |
1011 |
|
WriteMacInt32(XLM_68K_R25, old_r25); // Restore interrupt level |
1012 |
|
#else |
1013 |
|
// Only update cursor |
1015 |
|
if (InterruptFlags & INTFLAG_VIA) { |
1016 |
|
ClearInterruptFlag(INTFLAG_VIA); |
1017 |
|
ADBInterrupt(); |
1018 |
< |
ExecutePPC(VideoVBL); |
1018 |
> |
ExecuteNative(NATIVE_VIDEO_VBL); |
1019 |
|
} |
1020 |
|
} |
1021 |
|
#endif |
1022 |
+ |
#if EMUL_TIME_STATS |
1023 |
+ |
interrupt_time += (clock() - interrupt_start); |
1024 |
+ |
#endif |
1025 |
|
} |
1026 |
|
break; |
1027 |
|
#endif |
1028 |
|
} |
1029 |
|
} |
1030 |
|
|
1031 |
< |
/* |
1032 |
< |
* Execute NATIVE_OP opcode (called by PowerPC emulator) |
719 |
< |
*/ |
720 |
< |
|
721 |
< |
#define POWERPC_NATIVE_OP_INIT(LR, OP) \ |
722 |
< |
tswap32(POWERPC_EMUL_OP | ((LR) << 11) | (((uint32)OP) << 6) | 2) |
723 |
< |
|
724 |
< |
// FIXME: Make sure 32-bit relocations are used |
725 |
< |
const uint32 NativeOpTable[NATIVE_OP_MAX] = { |
726 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_PATCH_NAME_REGISTRY), |
727 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_INSTALL_ACCEL), |
728 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_VBL), |
729 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_DO_DRIVER_IO), |
730 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_IRQ), |
731 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_INIT), |
732 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_TERM), |
733 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_OPEN), |
734 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_CLOSE), |
735 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_WPUT), |
736 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_RSRV), |
737 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_NOTHING), |
738 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_OPEN), |
739 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_IN), |
740 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_OUT), |
741 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CONTROL), |
742 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_STATUS), |
743 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CLOSE), |
744 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_RESOURCE), |
745 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_RESOURCE), |
746 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_IND_RESOURCE), |
747 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_IND_RESOURCE), |
748 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_R_GET_RESOURCE), |
749 |
< |
POWERPC_NATIVE_OP_INIT(0, NATIVE_DISABLE_INTERRUPT), |
750 |
< |
POWERPC_NATIVE_OP_INIT(0, NATIVE_ENABLE_INTERRUPT), |
751 |
< |
}; |
752 |
< |
|
753 |
< |
static void get_resource(void); |
754 |
< |
static void get_1_resource(void); |
755 |
< |
static void get_ind_resource(void); |
756 |
< |
static void get_1_ind_resource(void); |
757 |
< |
static void r_get_resource(void); |
758 |
< |
|
759 |
< |
#define GPR(REG) current_cpu->gpr(REG) |
760 |
< |
|
761 |
< |
static void NativeOp(int selector) |
1031 |
> |
// Execute NATIVE_OP routine |
1032 |
> |
void sheepshaver_cpu::execute_native_op(uint32 selector) |
1033 |
|
{ |
1034 |
+ |
#if EMUL_TIME_STATS |
1035 |
+ |
native_exec_count++; |
1036 |
+ |
const clock_t native_exec_start = clock(); |
1037 |
+ |
#endif |
1038 |
+ |
|
1039 |
|
switch (selector) { |
1040 |
|
case NATIVE_PATCH_NAME_REGISTRY: |
1041 |
|
DoPatchNameRegistry(); |
1047 |
|
VideoVBL(); |
1048 |
|
break; |
1049 |
|
case NATIVE_VIDEO_DO_DRIVER_IO: |
1050 |
< |
GPR(3) = (int32)(int16)VideoDoDriverIO((void *)GPR(3), (void *)GPR(4), |
775 |
< |
(void *)GPR(5), GPR(6), GPR(7)); |
1050 |
> |
gpr(3) = (int32)(int16)VideoDoDriverIO(gpr(3), gpr(4), gpr(5), gpr(6), gpr(7)); |
1051 |
|
break; |
1052 |
< |
case NATIVE_GET_RESOURCE: |
1053 |
< |
get_resource(); |
1052 |
> |
case NATIVE_ETHER_AO_GET_HWADDR: |
1053 |
> |
AO_get_ethernet_address(gpr(3)); |
1054 |
|
break; |
1055 |
< |
case NATIVE_GET_1_RESOURCE: |
1056 |
< |
get_1_resource(); |
1055 |
> |
case NATIVE_ETHER_AO_ADD_MULTI: |
1056 |
> |
AO_enable_multicast(gpr(3)); |
1057 |
|
break; |
1058 |
< |
case NATIVE_GET_IND_RESOURCE: |
1059 |
< |
get_ind_resource(); |
1058 |
> |
case NATIVE_ETHER_AO_DEL_MULTI: |
1059 |
> |
AO_disable_multicast(gpr(3)); |
1060 |
|
break; |
1061 |
< |
case NATIVE_GET_1_IND_RESOURCE: |
1062 |
< |
get_1_ind_resource(); |
1061 |
> |
case NATIVE_ETHER_AO_SEND_PACKET: |
1062 |
> |
AO_transmit_packet(gpr(3)); |
1063 |
|
break; |
1064 |
< |
case NATIVE_R_GET_RESOURCE: |
1065 |
< |
r_get_resource(); |
1064 |
> |
case NATIVE_ETHER_IRQ: |
1065 |
> |
EtherIRQ(); |
1066 |
> |
break; |
1067 |
> |
case NATIVE_ETHER_INIT: |
1068 |
> |
gpr(3) = InitStreamModule((void *)gpr(3)); |
1069 |
> |
break; |
1070 |
> |
case NATIVE_ETHER_TERM: |
1071 |
> |
TerminateStreamModule(); |
1072 |
> |
break; |
1073 |
> |
case NATIVE_ETHER_OPEN: |
1074 |
> |
gpr(3) = ether_open((queue_t *)gpr(3), (void *)gpr(4), gpr(5), gpr(6), (void*)gpr(7)); |
1075 |
> |
break; |
1076 |
> |
case NATIVE_ETHER_CLOSE: |
1077 |
> |
gpr(3) = ether_close((queue_t *)gpr(3), gpr(4), (void *)gpr(5)); |
1078 |
> |
break; |
1079 |
> |
case NATIVE_ETHER_WPUT: |
1080 |
> |
gpr(3) = ether_wput((queue_t *)gpr(3), (mblk_t *)gpr(4)); |
1081 |
> |
break; |
1082 |
> |
case NATIVE_ETHER_RSRV: |
1083 |
> |
gpr(3) = ether_rsrv((queue_t *)gpr(3)); |
1084 |
> |
break; |
1085 |
> |
case NATIVE_NQD_SYNC_HOOK: |
1086 |
> |
gpr(3) = NQD_sync_hook(gpr(3)); |
1087 |
> |
break; |
1088 |
> |
case NATIVE_NQD_UNKNOWN_HOOK: |
1089 |
> |
gpr(3) = NQD_unknown_hook(gpr(3)); |
1090 |
> |
break; |
1091 |
> |
case NATIVE_NQD_BITBLT_HOOK: |
1092 |
> |
gpr(3) = NQD_bitblt_hook(gpr(3)); |
1093 |
> |
break; |
1094 |
> |
case NATIVE_NQD_BITBLT: |
1095 |
> |
NQD_bitblt(gpr(3)); |
1096 |
> |
break; |
1097 |
> |
case NATIVE_NQD_FILLRECT_HOOK: |
1098 |
> |
gpr(3) = NQD_fillrect_hook(gpr(3)); |
1099 |
> |
break; |
1100 |
> |
case NATIVE_NQD_INVRECT: |
1101 |
> |
NQD_invrect(gpr(3)); |
1102 |
> |
break; |
1103 |
> |
case NATIVE_NQD_FILLRECT: |
1104 |
> |
NQD_fillrect(gpr(3)); |
1105 |
|
break; |
1106 |
|
case NATIVE_SERIAL_NOTHING: |
1107 |
|
case NATIVE_SERIAL_OPEN: |
1120 |
|
SerialStatus, |
1121 |
|
SerialClose |
1122 |
|
}; |
1123 |
< |
GPR(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](GPR(3), GPR(4)); |
1123 |
> |
gpr(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](gpr(3), gpr(4)); |
1124 |
|
break; |
1125 |
|
} |
1126 |
< |
case NATIVE_DISABLE_INTERRUPT: |
1127 |
< |
DisableInterrupt(); |
1126 |
> |
case NATIVE_GET_RESOURCE: |
1127 |
> |
get_resource(ReadMacInt32(XLM_GET_RESOURCE)); |
1128 |
> |
break; |
1129 |
> |
case NATIVE_GET_1_RESOURCE: |
1130 |
> |
get_resource(ReadMacInt32(XLM_GET_1_RESOURCE)); |
1131 |
> |
break; |
1132 |
> |
case NATIVE_GET_IND_RESOURCE: |
1133 |
> |
get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE)); |
1134 |
|
break; |
1135 |
< |
case NATIVE_ENABLE_INTERRUPT: |
1136 |
< |
EnableInterrupt(); |
1135 |
> |
case NATIVE_GET_1_IND_RESOURCE: |
1136 |
> |
get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE)); |
1137 |
> |
break; |
1138 |
> |
case NATIVE_R_GET_RESOURCE: |
1139 |
> |
get_resource(ReadMacInt32(XLM_R_GET_RESOURCE)); |
1140 |
> |
break; |
1141 |
> |
case NATIVE_MAKE_EXECUTABLE: |
1142 |
> |
MakeExecutable(0, gpr(4), gpr(5)); |
1143 |
> |
break; |
1144 |
> |
case NATIVE_CHECK_LOAD_INVOC: |
1145 |
> |
check_load_invoc(gpr(3), gpr(4), gpr(5)); |
1146 |
> |
break; |
1147 |
> |
case NATIVE_NAMED_CHECK_LOAD_INVOC: |
1148 |
> |
named_check_load_invoc(gpr(3), gpr(4), gpr(5)); |
1149 |
|
break; |
1150 |
|
default: |
1151 |
|
printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector); |
1152 |
|
QuitEmulator(); |
1153 |
|
break; |
1154 |
|
} |
823 |
– |
} |
1155 |
|
|
1156 |
< |
/* |
1157 |
< |
* Execute native subroutine (LR must contain return address) |
1158 |
< |
*/ |
828 |
< |
|
829 |
< |
void ExecuteNative(int selector) |
830 |
< |
{ |
831 |
< |
uint32 tvect[2]; |
832 |
< |
tvect[0] = tswap32(POWERPC_NATIVE_OP_FUNC(selector)); |
833 |
< |
tvect[1] = 0; // Fake TVECT |
834 |
< |
RoutineDescriptor desc = BUILD_PPC_ROUTINE_DESCRIPTOR(0, tvect); |
835 |
< |
M68kRegisters r; |
836 |
< |
Execute68k((uint32)&desc, &r); |
1156 |
> |
#if EMUL_TIME_STATS |
1157 |
> |
native_exec_time += (clock() - native_exec_start); |
1158 |
> |
#endif |
1159 |
|
} |
1160 |
|
|
1161 |
|
/* |
1166 |
|
|
1167 |
|
void Execute68k(uint32 pc, M68kRegisters *r) |
1168 |
|
{ |
1169 |
< |
current_cpu->execute_68k(pc, r); |
1169 |
> |
ppc_cpu->execute_68k(pc, r); |
1170 |
|
} |
1171 |
|
|
1172 |
|
/* |
1176 |
|
|
1177 |
|
void Execute68kTrap(uint16 trap, M68kRegisters *r) |
1178 |
|
{ |
1179 |
< |
uint16 proc[2] = {trap, M68K_RTS}; |
1180 |
< |
Execute68k((uint32)proc, r); |
1179 |
> |
SheepVar proc_var(4); |
1180 |
> |
uint32 proc = proc_var.addr(); |
1181 |
> |
WriteMacInt16(proc, trap); |
1182 |
> |
WriteMacInt16(proc + 2, M68K_RTS); |
1183 |
> |
Execute68k(proc, r); |
1184 |
|
} |
1185 |
|
|
1186 |
|
/* |
1189 |
|
|
1190 |
|
uint32 call_macos(uint32 tvect) |
1191 |
|
{ |
1192 |
< |
return current_cpu->execute_macos_code(tvect, 0, NULL); |
1192 |
> |
return ppc_cpu->execute_macos_code(tvect, 0, NULL); |
1193 |
|
} |
1194 |
|
|
1195 |
|
uint32 call_macos1(uint32 tvect, uint32 arg1) |
1196 |
|
{ |
1197 |
|
const uint32 args[] = { arg1 }; |
1198 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1198 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1199 |
|
} |
1200 |
|
|
1201 |
|
uint32 call_macos2(uint32 tvect, uint32 arg1, uint32 arg2) |
1202 |
|
{ |
1203 |
|
const uint32 args[] = { arg1, arg2 }; |
1204 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1204 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1205 |
|
} |
1206 |
|
|
1207 |
|
uint32 call_macos3(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3) |
1208 |
|
{ |
1209 |
|
const uint32 args[] = { arg1, arg2, arg3 }; |
1210 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1210 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1211 |
|
} |
1212 |
|
|
1213 |
|
uint32 call_macos4(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4) |
1214 |
|
{ |
1215 |
|
const uint32 args[] = { arg1, arg2, arg3, arg4 }; |
1216 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1216 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1217 |
|
} |
1218 |
|
|
1219 |
|
uint32 call_macos5(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5) |
1220 |
|
{ |
1221 |
|
const uint32 args[] = { arg1, arg2, arg3, arg4, arg5 }; |
1222 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1222 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1223 |
|
} |
1224 |
|
|
1225 |
|
uint32 call_macos6(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6) |
1226 |
|
{ |
1227 |
|
const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6 }; |
1228 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1228 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1229 |
|
} |
1230 |
|
|
1231 |
|
uint32 call_macos7(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6, uint32 arg7) |
1232 |
|
{ |
1233 |
|
const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6, arg7 }; |
1234 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
910 |
< |
} |
911 |
< |
|
912 |
< |
/* |
913 |
< |
* Atomic operations |
914 |
< |
*/ |
915 |
< |
|
916 |
< |
int atomic_add(int *var, int v) |
917 |
< |
{ |
918 |
< |
int ret = *var; |
919 |
< |
*var += v; |
920 |
< |
return ret; |
921 |
< |
} |
922 |
< |
|
923 |
< |
int atomic_and(int *var, int v) |
924 |
< |
{ |
925 |
< |
int ret = *var; |
926 |
< |
*var &= v; |
927 |
< |
return ret; |
928 |
< |
} |
929 |
< |
|
930 |
< |
int atomic_or(int *var, int v) |
931 |
< |
{ |
932 |
< |
int ret = *var; |
933 |
< |
*var |= v; |
934 |
< |
return ret; |
935 |
< |
} |
936 |
< |
|
937 |
< |
/* |
938 |
< |
* Resource Manager thunks |
939 |
< |
*/ |
940 |
< |
|
941 |
< |
void get_resource(void) |
942 |
< |
{ |
943 |
< |
current_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE)); |
944 |
< |
} |
945 |
< |
|
946 |
< |
void get_1_resource(void) |
947 |
< |
{ |
948 |
< |
current_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE)); |
949 |
< |
} |
950 |
< |
|
951 |
< |
void get_ind_resource(void) |
952 |
< |
{ |
953 |
< |
current_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE)); |
954 |
< |
} |
955 |
< |
|
956 |
< |
void get_1_ind_resource(void) |
957 |
< |
{ |
958 |
< |
current_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE)); |
959 |
< |
} |
960 |
< |
|
961 |
< |
void r_get_resource(void) |
962 |
< |
{ |
963 |
< |
current_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE)); |
1234 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1235 |
|
} |