| 144 |
|
{ "sheep", |
| 145 |
|
(execute_fn)&sheepshaver_cpu::execute_sheep, |
| 146 |
|
NULL, |
| 147 |
< |
D_form, 6, 0, CFLOW_TRAP |
| 147 |
> |
D_form, 6, 0, CFLOW_JUMP | CFLOW_TRAP |
| 148 |
|
} |
| 149 |
|
}; |
| 150 |
|
|
| 330 |
|
uint32 saved_ctr= ctr(); |
| 331 |
|
|
| 332 |
|
// Create MacOS stack frame |
| 333 |
+ |
// FIXME: make sure MacOS doesn't expect PPC registers to live on top |
| 334 |
|
uint32 sp = gpr(1); |
| 335 |
< |
gpr(1) -= 56 + 19*4 + 18*8; |
| 335 |
> |
gpr(1) -= 56; |
| 336 |
|
WriteMacInt32(gpr(1), sp); |
| 337 |
|
|
| 338 |
|
// Save PowerPC registers |
| 339 |
< |
for (int i = 13; i < 32; i++) |
| 340 |
< |
WriteMacInt32(gpr(1) + 56 + i*4, gpr(i)); |
| 339 |
> |
uint32 saved_GPRs[19]; |
| 340 |
> |
memcpy(&saved_GPRs[0], &gpr(13), sizeof(uint32)*(32-13)); |
| 341 |
|
#if SAVE_FP_EXEC_68K |
| 342 |
< |
memcpy(Mac2HostAddr(gpr(1)+56+19*4), &fpr(14), sizeof(double)*(32-14)); |
| 342 |
> |
double saved_FPRs[18]; |
| 343 |
> |
memcpy(&saved_FPRs[0], &fpr(14), sizeof(double)*(32-14)); |
| 344 |
|
#endif |
| 345 |
|
|
| 346 |
|
// Setup registers for 68k emulator |
| 387 |
|
r->a[i] = gpr(16 + i); |
| 388 |
|
|
| 389 |
|
// Restore PowerPC registers |
| 390 |
< |
for (int i = 13; i < 32; i++) |
| 389 |
< |
gpr(i) = ReadMacInt32(gpr(1) + 56 + i*4); |
| 390 |
> |
memcpy(&gpr(13), &saved_GPRs[0], sizeof(uint32)*(32-13)); |
| 391 |
|
#if SAVE_FP_EXEC_68K |
| 392 |
< |
memcpy(&fpr(14), Mac2HostAddr(gpr(1)+56+19*4), sizeof(double)*(32-14)); |
| 392 |
> |
memcpy(&fpr(14), &saved_FPRs[0], sizeof(double)*(32-14)); |
| 393 |
|
#endif |
| 394 |
|
|
| 395 |
|
// Cleanup stack |
| 396 |
< |
gpr(1) += 56 + 19*4 + 18*8; |
| 396 |
> |
gpr(1) += 56; |
| 397 |
|
|
| 398 |
|
// Restore program counters and branch registers |
| 399 |
|
pc() = saved_pc; |
| 450 |
|
{ |
| 451 |
|
// Save branch registers |
| 452 |
|
uint32 saved_lr = lr(); |
| 452 |
– |
uint32 saved_ctr= ctr(); |
| 453 |
|
|
| 454 |
|
const uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) }; |
| 455 |
– |
|
| 455 |
|
lr() = (uint32)trampoline; |
| 456 |
< |
ctr()= entry; |
| 456 |
> |
|
| 457 |
|
execute(entry); |
| 458 |
|
|
| 459 |
|
// Restore branch registers |
| 460 |
|
lr() = saved_lr; |
| 462 |
– |
ctr()= saved_ctr; |
| 461 |
|
} |
| 462 |
|
|
| 463 |
|
// Resource Manager thunk |
| 492 |
|
static sheepshaver_cpu *interrupt_cpu = NULL; // CPU emulator to handle interrupts |
| 493 |
|
static sheepshaver_cpu *current_cpu = NULL; // Current CPU emulator context |
| 494 |
|
|
| 495 |
+ |
void FlushCodeCache(uintptr start, uintptr end) |
| 496 |
+ |
{ |
| 497 |
+ |
D(bug("FlushCodeCache(%08x, %08x)\n", start, end)); |
| 498 |
+ |
main_cpu->invalidate_cache_range(start, end); |
| 499 |
+ |
#if MULTICORE_CPU |
| 500 |
+ |
interrupt_cpu->invalidate_cache_range(start, end); |
| 501 |
+ |
#endif |
| 502 |
+ |
} |
| 503 |
+ |
|
| 504 |
|
static inline void cpu_push(sheepshaver_cpu *new_cpu) |
| 505 |
|
{ |
| 506 |
|
#if MULTICORE_CPU |
| 732 |
|
POWERPC_NATIVE_OP_INIT(1, NATIVE_R_GET_RESOURCE), |
| 733 |
|
POWERPC_NATIVE_OP_INIT(0, NATIVE_DISABLE_INTERRUPT), |
| 734 |
|
POWERPC_NATIVE_OP_INIT(0, NATIVE_ENABLE_INTERRUPT), |
| 735 |
+ |
POWERPC_NATIVE_OP_INIT(1, NATIVE_MAKE_EXECUTABLE), |
| 736 |
|
}; |
| 737 |
|
|
| 738 |
|
static void get_resource(void); |
| 800 |
|
case NATIVE_ENABLE_INTERRUPT: |
| 801 |
|
EnableInterrupt(); |
| 802 |
|
break; |
| 803 |
+ |
case NATIVE_MAKE_EXECUTABLE: |
| 804 |
+ |
MakeExecutable(0, (void *)GPR(4), GPR(5)); |
| 805 |
+ |
break; |
| 806 |
|
default: |
| 807 |
|
printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector); |
| 808 |
|
QuitEmulator(); |
