144 |
|
{ "sheep", |
145 |
|
(execute_fn)&sheepshaver_cpu::execute_sheep, |
146 |
|
NULL, |
147 |
< |
D_form, 6, 0, CFLOW_TRAP |
147 |
> |
D_form, 6, 0, CFLOW_JUMP | CFLOW_TRAP |
148 |
|
} |
149 |
|
}; |
150 |
|
|
273 |
|
gpr(1) = SheepStack1Base - 64; |
274 |
|
|
275 |
|
// Build trampoline to return from interrupt |
276 |
< |
uint32 trampoline[] = { POWERPC_EMUL_OP | 1 }; |
276 |
> |
uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) }; |
277 |
|
|
278 |
|
// Prepare registers for nanokernel interrupt routine |
279 |
< |
kernel_data->v[0x004 >> 2] = gpr(1); |
280 |
< |
kernel_data->v[0x018 >> 2] = gpr(6); |
279 |
> |
kernel_data->v[0x004 >> 2] = htonl(gpr(1)); |
280 |
> |
kernel_data->v[0x018 >> 2] = htonl(gpr(6)); |
281 |
|
|
282 |
< |
gpr(6) = kernel_data->v[0x65c >> 2]; |
282 |
> |
gpr(6) = ntohl(kernel_data->v[0x65c >> 2]); |
283 |
|
assert(gpr(6) != 0); |
284 |
|
WriteMacInt32(gpr(6) + 0x13c, gpr(7)); |
285 |
|
WriteMacInt32(gpr(6) + 0x144, gpr(8)); |
290 |
|
WriteMacInt32(gpr(6) + 0x16c, gpr(13)); |
291 |
|
|
292 |
|
gpr(1) = KernelDataAddr; |
293 |
< |
gpr(7) = kernel_data->v[0x660 >> 2]; |
293 |
> |
gpr(7) = ntohl(kernel_data->v[0x660 >> 2]); |
294 |
|
gpr(8) = 0; |
295 |
|
gpr(10) = (uint32)trampoline; |
296 |
|
gpr(12) = (uint32)trampoline; |
330 |
|
uint32 saved_ctr= ctr(); |
331 |
|
|
332 |
|
// Create MacOS stack frame |
333 |
+ |
// FIXME: make sure MacOS doesn't expect PPC registers to live on top |
334 |
|
uint32 sp = gpr(1); |
335 |
< |
gpr(1) -= 56 + 19*4 + 18*8; |
335 |
> |
gpr(1) -= 56; |
336 |
|
WriteMacInt32(gpr(1), sp); |
337 |
|
|
338 |
|
// Save PowerPC registers |
339 |
< |
memcpy(Mac2HostAddr(gpr(1)+56), &gpr(13), sizeof(uint32)*(32-13)); |
339 |
> |
uint32 saved_GPRs[19]; |
340 |
> |
memcpy(&saved_GPRs[0], &gpr(13), sizeof(uint32)*(32-13)); |
341 |
|
#if SAVE_FP_EXEC_68K |
342 |
< |
memcpy(Mac2HostAddr(gpr(1)+56+19*4), &fpr(14), sizeof(double)*(32-14)); |
342 |
> |
double saved_FPRs[18]; |
343 |
> |
memcpy(&saved_FPRs[0], &fpr(14), sizeof(double)*(32-14)); |
344 |
|
#endif |
345 |
|
|
346 |
|
// Setup registers for 68k emulator |
354 |
|
gpr(25) = ReadMacInt32(XLM_68K_R25); // MSB of SR |
355 |
|
gpr(26) = 0; |
356 |
|
gpr(28) = 0; // VBR |
357 |
< |
gpr(29) = kernel_data->ed.v[0x74 >> 2]; // Pointer to opcode table |
358 |
< |
gpr(30) = kernel_data->ed.v[0x78 >> 2]; // Address of emulator |
357 |
> |
gpr(29) = ntohl(kernel_data->ed.v[0x74 >> 2]); // Pointer to opcode table |
358 |
> |
gpr(30) = ntohl(kernel_data->ed.v[0x78 >> 2]); // Address of emulator |
359 |
|
gpr(31) = KernelDataAddr + 0x1000; |
360 |
|
|
361 |
|
// Push return address (points to EXEC_RETURN opcode) on stack |
387 |
|
r->a[i] = gpr(16 + i); |
388 |
|
|
389 |
|
// Restore PowerPC registers |
390 |
< |
memcpy(&gpr(13), Mac2HostAddr(gpr(1)+56), sizeof(uint32)*(32-13)); |
390 |
> |
memcpy(&gpr(13), &saved_GPRs[0], sizeof(uint32)*(32-13)); |
391 |
|
#if SAVE_FP_EXEC_68K |
392 |
< |
memcpy(&fpr(14), Mac2HostAddr(gpr(1)+56+19*4), sizeof(double)*(32-14)); |
392 |
> |
memcpy(&fpr(14), &saved_FPRs[0], sizeof(double)*(32-14)); |
393 |
|
#endif |
394 |
|
|
395 |
|
// Cleanup stack |
396 |
< |
gpr(1) += 56 + 19*4 + 18*8; |
396 |
> |
gpr(1) += 56; |
397 |
|
|
398 |
|
// Restore program counters and branch registers |
399 |
|
pc() = saved_pc; |
410 |
|
uint32 saved_ctr= ctr(); |
411 |
|
|
412 |
|
// Build trampoline with EXEC_RETURN |
413 |
< |
uint32 trampoline[] = { POWERPC_EMUL_OP | 1 }; |
413 |
> |
uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) }; |
414 |
|
lr() = (uint32)trampoline; |
415 |
|
|
416 |
|
gpr(1) -= 64; // Create stack frame |
450 |
|
{ |
451 |
|
// Save branch registers |
452 |
|
uint32 saved_lr = lr(); |
450 |
– |
uint32 saved_ctr= ctr(); |
451 |
– |
|
452 |
– |
const uint32 trampoline[] = { POWERPC_EMUL_OP | 1 }; |
453 |
|
|
454 |
+ |
const uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) }; |
455 |
|
lr() = (uint32)trampoline; |
456 |
< |
ctr()= entry; |
456 |
> |
|
457 |
|
execute(entry); |
458 |
|
|
459 |
|
// Restore branch registers |
460 |
|
lr() = saved_lr; |
460 |
– |
ctr()= saved_ctr; |
461 |
|
} |
462 |
|
|
463 |
|
// Resource Manager thunk |
464 |
< |
extern "C" void check_load_invoc(uint32 type, int16 id, uint16 **h); |
464 |
> |
extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h); |
465 |
|
|
466 |
|
inline void sheepshaver_cpu::get_resource(uint32 old_get_resource) |
467 |
|
{ |
473 |
|
|
474 |
|
// Call old routine |
475 |
|
execute_ppc(old_get_resource); |
476 |
– |
uint16 **handle = (uint16 **)gpr(3); |
476 |
|
|
477 |
|
// Call CheckLoad() |
478 |
+ |
uint32 handle = gpr(3); |
479 |
|
check_load_invoc(type, id, handle); |
480 |
< |
gpr(3) = (uint32)handle; |
480 |
> |
gpr(3) = handle; |
481 |
|
|
482 |
|
// Cleanup stack |
483 |
|
gpr(1) += 56; |
492 |
|
static sheepshaver_cpu *interrupt_cpu = NULL; // CPU emulator to handle interrupts |
493 |
|
static sheepshaver_cpu *current_cpu = NULL; // Current CPU emulator context |
494 |
|
|
495 |
+ |
void FlushCodeCache(uintptr start, uintptr end) |
496 |
+ |
{ |
497 |
+ |
D(bug("FlushCodeCache(%08x, %08x)\n", start, end)); |
498 |
+ |
main_cpu->invalidate_cache_range(start, end); |
499 |
+ |
#if MULTICORE_CPU |
500 |
+ |
interrupt_cpu->invalidate_cache_range(start, end); |
501 |
+ |
#endif |
502 |
+ |
} |
503 |
+ |
|
504 |
|
static inline void cpu_push(sheepshaver_cpu *new_cpu) |
505 |
|
{ |
506 |
|
#if MULTICORE_CPU |
732 |
|
POWERPC_NATIVE_OP_INIT(1, NATIVE_R_GET_RESOURCE), |
733 |
|
POWERPC_NATIVE_OP_INIT(0, NATIVE_DISABLE_INTERRUPT), |
734 |
|
POWERPC_NATIVE_OP_INIT(0, NATIVE_ENABLE_INTERRUPT), |
735 |
+ |
POWERPC_NATIVE_OP_INIT(1, NATIVE_MAKE_EXECUTABLE), |
736 |
|
}; |
737 |
|
|
738 |
|
static void get_resource(void); |
800 |
|
case NATIVE_ENABLE_INTERRUPT: |
801 |
|
EnableInterrupt(); |
802 |
|
break; |
803 |
+ |
case NATIVE_MAKE_EXECUTABLE: |
804 |
+ |
MakeExecutable(0, (void *)GPR(4), GPR(5)); |
805 |
+ |
break; |
806 |
|
default: |
807 |
|
printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector); |
808 |
|
QuitEmulator(); |
842 |
|
|
843 |
|
void Execute68kTrap(uint16 trap, M68kRegisters *r) |
844 |
|
{ |
845 |
< |
uint16 proc[2] = {trap, M68K_RTS}; |
845 |
> |
uint16 proc[2]; |
846 |
> |
proc[0] = htons(trap); |
847 |
> |
proc[1] = htons(M68K_RTS); |
848 |
|
Execute68k((uint32)proc, r); |
849 |
|
} |
850 |
|
|