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root/cebix/SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.35 by gbeauche, 2004-04-22T22:54:47Z vs.
Revision 1.68 by gbeauche, 2006-05-03T21:45:14Z

#	Line 1 | Line 1
1		/*
2		*  sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface
3		*
4	<	*  SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig
4	>	*  SheepShaver (C) 1997-2005 Christian Bauer and Marc Hellwig
5		*
6		*  This program is free software; you can redistribute it and/or modify
7		*  it under the terms of the GNU General Public License as published by
#	Line 38 | Line 38
38		#include "name_registry.h"
39		#include "serial.h"
40		#include "ether.h"
41	+	#include "timer.h"
42
43		#include <stdio.h>
44		#include <stdlib.h>
45	+	#ifdef HAVE_MALLOC_H
46	+	#include <malloc.h>
47	+	#endif
48	+
49	+	#ifdef USE_SDL_VIDEO
50	+	#include <SDL_events.h>
51	+	#endif
52
53		#if ENABLE_MON
54		#include "mon.h"
#	Line 51 | Line 59
59		#include "debug.h"
60
61		// Emulation time statistics
62	<	#define EMUL_TIME_STATS 1
62	>	#ifndef EMUL_TIME_STATS
63	>	#define EMUL_TIME_STATS 0
64	>	#endif
65
66		#if EMUL_TIME_STATS
67		static clock_t emul_start_time;
68	<	static uint32 interrupt_count = 0;
68	>	static uint32 interrupt_count = 0, ppc_interrupt_count = 0;
69		static clock_t interrupt_time = 0;
70		static uint32 exec68k_count = 0;
71		static clock_t exec68k_time = 0;
#	Line 79 | Line 89 | extern uintptr SignalStackBase();
89
90		// From rsrc_patches.cpp
91		extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
92	+	extern "C" void named_check_load_invoc(uint32 type, uint32 name, uint32 h);
93
94		// PowerPC EmulOp to exit from emulation looop
95		const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1;
96
86	–	// Enable multicore (main/interrupts) cpu emulation?
87	–	#define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0)
88	–
97		// Enable Execute68k() safety checks?
98		#define SAFE_EXEC_68K 1
99
#	Line 99 | Line 107 | const uint32 POWERPC_EXEC_RETURN = POWER
107		#define INTERRUPTS_IN_NATIVE_MODE 1
108
109		// Pointer to Kernel Data
110	<	static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE;
110	>	static KernelData * kernel_data;
111
112		// SIGSEGV handler
113	<	static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
113	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
114	>
115	>	#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
116	>	// Special trampolines for EmulOp and NativeOp
117	>	static uint8 *emul_op_trampoline;
118	>	static uint8 *native_op_trampoline;
119	>	#endif
120
121		// JIT Compiler enabled?
122		static inline bool enable_jit_p()
#	Line 137 | Line 151 | public:
151		uint32 get_xer() const          { return xer().get(); }
152		void set_xer(uint32 v)          { xer().set(v); }
153
154	+	// Execute NATIVE_OP routine
155	+	void execute_native_op(uint32 native_op);
156	+
157		// Execute EMUL_OP routine
158		void execute_emul_op(uint32 emul_op);
159
#	Line 149 | Line 166 | public:
166		// Execute MacOS/PPC code
167		uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args);
168
169	+	#if PPC_ENABLE_JIT
170		// Compile one instruction
171	<	virtual bool compile1(codegen_context_t & cg_context);
172	<
171	>	virtual int compile1(codegen_context_t & cg_context);
172	>	#endif
173		// Resource manager thunk
174		void get_resource(uint32 old_get_resource);
175
176		// Handle MacOS interrupt
177		void interrupt(uint32 entry);
160	–	void handle_interrupt();
178
179		// Make sure the SIGSEGV handler can access CPU registers
180		friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
181		};
182
166	–	// Memory allocator returning areas aligned on 16-byte boundaries
167	–	void *operator new(size_t size)
168	–	{
169	–	void *p;
170	–
171	–	#if defined(HAVE_POSIX_MEMALIGN)
172	–	if (posix_memalign(&p, 16, size) != 0)
173	–	throw std::bad_alloc();
174	–	#elif defined(HAVE_MEMALIGN)
175	–	p = memalign(16, size);
176	–	#elif defined(HAVE_VALLOC)
177	–	p = valloc(size); // page-aligned!
178	–	#else
179	–	/* XXX: handle padding ourselves */
180	–	p = malloc(size);
181	–	#endif
182	–
183	–	return p;
184	–	}
185	–
186	–	void operator delete(void *p)
187	–	{
188	–	#if defined(HAVE_MEMALIGN) || defined(HAVE_VALLOC)
189	–	#if defined(__GLIBC__)
190	–	// this is known to work only with GNU libc
191	–	free(p);
192	–	#endif
193	–	#else
194	–	free(p);
195	–	#endif
196	–	}
197	–
183		sheepshaver_cpu::sheepshaver_cpu()
184		: powerpc_cpu(enable_jit_p())
185		{
#	Line 221 | Line 206 | void sheepshaver_cpu::init_decoder()
206		}
207		}
208
224	–	// Forward declaration for native opcode handler
225	–	static void NativeOp(int selector);
226	–
209		/*              NativeOp instruction format:
210		+------------+-------------------------+--+-----------+------------+
211		|      6     |                         |FN|    OP     |      2     |
#	Line 246 | Line 228 | void sheepshaver_cpu::execute_emul_op(ui
228		for (int i = 0; i < 7; i++)
229		r68.a[i] = gpr(16 + i);
230		r68.a[7] = gpr(1);
231	<	uint32 saved_cr = get_cr() & CR_field<2>::mask();
231	>	uint32 saved_cr = get_cr() & 0xff9fffff; // mask_operand::compute(11, 8)
232		uint32 saved_xer = get_xer();
233		EmulOp(&r68, gpr(24), emul_op);
234		set_cr(saved_cr);
#	Line 275 | Line 257 | void sheepshaver_cpu::execute_sheep(uint
257		break;
258
259		case 2:         // EXEC_NATIVE
260	<	NativeOp(NATIVE_OP_field::extract(opcode));
260	>	execute_native_op(NATIVE_OP_field::extract(opcode));
261		if (FN_field::test(opcode))
262		pc() = lr();
263		else
#	Line 290 | Line 272 | void sheepshaver_cpu::execute_sheep(uint
272		}
273
274		// Compile one instruction
293	–	bool sheepshaver_cpu::compile1(codegen_context_t & cg_context)
294	–	{
275		#if PPC_ENABLE_JIT
276	+	int sheepshaver_cpu::compile1(codegen_context_t & cg_context)
277	+	{
278		const instr_info_t *ii = cg_context.instr_info;
279		if (ii->mnemo != PPC_I(SHEEP))
280	<	return false;
280	>	return COMPILE_FAILURE;
281
282	<	bool compiled = false;
282	>	int status = COMPILE_FAILURE;
283		powerpc_dyngen & dg = cg_context.codegen;
284		uint32 opcode = cg_context.opcode;
285
286		switch (opcode & 0x3f) {
287		case 0:         // EMUL_RETURN
288		dg.gen_invoke(QuitEmulator);
289	<	compiled = true;
289	>	status = COMPILE_CODE_OK;
290		break;
291
292		case 1:         // EXEC_RETURN
293		dg.gen_spcflags_set(SPCFLAG_CPU_EXEC_RETURN);
294	<	compiled = true;
294	>	// Don't check for pending interrupts, we do know we have to
295	>	// get out of this block ASAP
296	>	dg.gen_exec_return();
297	>	status = COMPILE_EPILOGUE_OK;
298		break;
299
300		case 2: {       // EXEC_NATIVE
301		uint32 selector = NATIVE_OP_field::extract(opcode);
302		switch (selector) {
303	+	#if !PPC_REENTRANT_JIT
304	+	// Filter out functions that may invoke Execute68k() or
305	+	// CallMacOS(), this would break reentrancy as they could
306	+	// invalidate the translation cache and even overwrite
307	+	// continuation code when we are done with them.
308		case NATIVE_PATCH_NAME_REGISTRY:
309		dg.gen_invoke(DoPatchNameRegistry);
310	<	compiled = true;
310	>	status = COMPILE_CODE_OK;
311		break;
312		case NATIVE_VIDEO_INSTALL_ACCEL:
313		dg.gen_invoke(VideoInstallAccel);
314	<	compiled = true;
314	>	status = COMPILE_CODE_OK;
315		break;
316		case NATIVE_VIDEO_VBL:
317		dg.gen_invoke(VideoVBL);
318	<	compiled = true;
318	>	status = COMPILE_CODE_OK;
319		break;
320		case NATIVE_GET_RESOURCE:
321		case NATIVE_GET_1_RESOURCE:
#	Line 343 | Line 333 | bool sheepshaver_cpu::compile1(codegen_c
333		typedef void (*func_t)(dyngen_cpu_base, uint32);
334		func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::get_resource).ptr();
335		dg.gen_invoke_CPU_im(func, old_get_resource);
336	<	compiled = true;
336	>	status = COMPILE_CODE_OK;
337		break;
338		}
349	–	case NATIVE_DISABLE_INTERRUPT:
350	–	dg.gen_invoke(DisableInterrupt);
351	–	compiled = true;
352	–	break;
353	–	case NATIVE_ENABLE_INTERRUPT:
354	–	dg.gen_invoke(EnableInterrupt);
355	–	compiled = true;
356	–	break;
339		case NATIVE_CHECK_LOAD_INVOC:
340		dg.gen_load_T0_GPR(3);
341		dg.gen_load_T1_GPR(4);
342		dg.gen_se_16_32_T1();
343		dg.gen_load_T2_GPR(5);
344		dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))check_load_invoc);
345	<	compiled = true;
345	>	status = COMPILE_CODE_OK;
346	>	break;
347	>	case NATIVE_NAMED_CHECK_LOAD_INVOC:
348	>	dg.gen_load_T0_GPR(3);
349	>	dg.gen_load_T1_GPR(4);
350	>	dg.gen_load_T2_GPR(5);
351	>	dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))named_check_load_invoc);
352	>	status = COMPILE_CODE_OK;
353		break;
354	+	#endif
355		case NATIVE_BITBLT:
356		dg.gen_load_T0_GPR(3);
357		dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt);
358	<	compiled = true;
358	>	status = COMPILE_CODE_OK;
359		break;
360		case NATIVE_INVRECT:
361		dg.gen_load_T0_GPR(3);
362		dg.gen_invoke_T0((void (*)(uint32))NQD_invrect);
363	<	compiled = true;
363	>	status = COMPILE_CODE_OK;
364		break;
365		case NATIVE_FILLRECT:
366		dg.gen_load_T0_GPR(3);
367		dg.gen_invoke_T0((void (*)(uint32))NQD_fillrect);
368	<	compiled = true;
368	>	status = COMPILE_CODE_OK;
369		break;
370		}
371	<	if (FN_field::test(opcode)) {
372	<	if (compiled) {
371	>	// Could we fully translate this NativeOp?
372	>	if (status == COMPILE_CODE_OK) {
373	>	if (!FN_field::test(opcode))
374	>	cg_context.done_compile = false;
375	>	else {
376		dg.gen_load_A0_LR();
377		dg.gen_set_PC_A0();
378	+	cg_context.done_compile = true;
379		}
380	<	cg_context.done_compile = true;
380	>	break;
381		}
382	<	else
382	>	#if PPC_REENTRANT_JIT
383	>	// Try to execute NativeOp trampoline
384	>	if (!FN_field::test(opcode))
385	>	dg.gen_set_PC_im(cg_context.pc + 4);
386	>	else {
387	>	dg.gen_load_A0_LR();
388	>	dg.gen_set_PC_A0();
389	>	}
390	>	dg.gen_mov_32_T0_im(selector);
391	>	dg.gen_jmp(native_op_trampoline);
392	>	cg_context.done_compile = true;
393	>	status = COMPILE_EPILOGUE_OK;
394	>	break;
395	>	#endif
396	>	// Invoke NativeOp handler
397	>	if (!FN_field::test(opcode)) {
398	>	typedef void (*func_t)(dyngen_cpu_base, uint32);
399	>	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
400	>	dg.gen_invoke_CPU_im(func, selector);
401		cg_context.done_compile = false;
402	+	status = COMPILE_CODE_OK;
403	+	}
404	+	// Otherwise, let it generate a call to execute_sheep() which
405	+	// will cause necessary updates to the program counter
406		break;
407		}
408
409		default: {      // EMUL_OP
410	+	uint32 emul_op = EMUL_OP_field::extract(opcode) - 3;
411	+	#if PPC_REENTRANT_JIT
412	+	// Try to execute EmulOp trampoline
413	+	dg.gen_set_PC_im(cg_context.pc + 4);
414	+	dg.gen_mov_32_T0_im(emul_op);
415	+	dg.gen_jmp(emul_op_trampoline);
416	+	cg_context.done_compile = true;
417	+	status = COMPILE_EPILOGUE_OK;
418	+	break;
419	+	#endif
420	+	// Invoke EmulOp handler
421		typedef void (*func_t)(dyngen_cpu_base, uint32);
422		func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr();
423	<	dg.gen_invoke_CPU_im(func, EMUL_OP_field::extract(opcode) - 3);
423	>	dg.gen_invoke_CPU_im(func, emul_op);
424		cg_context.done_compile = false;
425	<	compiled = true;
425	>	status = COMPILE_CODE_OK;
426		break;
427		}
428		}
429	<	return compiled;
403	<	#endif
404	<	return false;
429	>	return status;
430		}
431	+	#endif
432
433		// Handle MacOS interrupt
434		void sheepshaver_cpu::interrupt(uint32 entry)
435		{
436		#if EMUL_TIME_STATS
437	<	interrupt_count++;
437	>	ppc_interrupt_count++;
438		const clock_t interrupt_start = clock();
439		#endif
440
415	–	#if !MULTICORE_CPU
441		// Save program counters and branch registers
442		uint32 saved_pc = pc();
443		uint32 saved_lr = lr();
444		uint32 saved_ctr= ctr();
445		uint32 saved_sp = gpr(1);
421	–	#endif
446
447		// Initialize stack pointer to SheepShaver alternate stack base
448		gpr(1) = SignalStackBase() - 64;
#	Line 458 | Line 482 | void sheepshaver_cpu::interrupt(uint32 e
482		// Enter nanokernel
483		execute(entry);
484
461	–	#if !MULTICORE_CPU
485		// Restore program counters and branch registers
486		pc() = saved_pc;
487		lr() = saved_lr;
488		ctr()= saved_ctr;
489		gpr(1) = saved_sp;
467	–	#endif
490
491		#if EMUL_TIME_STATS
492		interrupt_time += (clock() - interrupt_start);
#	Line 662 | Line 684 | inline void sheepshaver_cpu::get_resourc
684		*              SheepShaver CPU engine interface
685		**/
686
687	<	static sheepshaver_cpu *main_cpu = NULL;                // CPU emulator to handle usual control flow
688	<	static sheepshaver_cpu *interrupt_cpu = NULL;   // CPU emulator to handle interrupts
667	<	static sheepshaver_cpu *current_cpu = NULL;             // Current CPU emulator context
687	>	// PowerPC CPU emulator
688	>	static sheepshaver_cpu *ppc_cpu = NULL;
689
690		void FlushCodeCache(uintptr start, uintptr end)
691		{
692		D(bug("FlushCodeCache(%08x, %08x)\n", start, end));
693	<	main_cpu->invalidate_cache_range(start, end);
673	<	#if MULTICORE_CPU
674	<	interrupt_cpu->invalidate_cache_range(start, end);
675	<	#endif
676	<	}
677	<
678	<	static inline void cpu_push(sheepshaver_cpu *new_cpu)
679	<	{
680	<	#if MULTICORE_CPU
681	<	current_cpu = new_cpu;
682	<	#endif
683	<	}
684	<
685	<	static inline void cpu_pop()
686	<	{
687	<	#if MULTICORE_CPU
688	<	current_cpu = main_cpu;
689	<	#endif
693	>	ppc_cpu->invalidate_cache_range(start, end);
694		}
695
696		// Dump PPC registers
697		static void dump_registers(void)
698		{
699	<	current_cpu->dump_registers();
699	>	ppc_cpu->dump_registers();
700		}
701
702		// Dump log
703		static void dump_log(void)
704		{
705	<	current_cpu->dump_log();
705	>	ppc_cpu->dump_log();
706		}
707
708		/*
709		*  Initialize CPU emulation
710		*/
711
712	<	static sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
712	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
713		{
714		#if ENABLE_VOSF
715		// Handle screen fault
#	Line 717 | Line 721 | static sigsegv_return_t sigsegv_handler(
721		const uintptr addr = (uintptr)fault_address;
722		#if HAVE_SIGSEGV_SKIP_INSTRUCTION
723		// Ignore writes to ROM
724	<	if ((addr - ROM_BASE) < ROM_SIZE)
724	>	if ((addr - (uintptr)ROMBaseHost) < ROM_SIZE)
725		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
726
727		// Get program counter of target CPU
728	<	sheepshaver_cpu * const cpu = current_cpu;
728	>	sheepshaver_cpu * const cpu = ppc_cpu;
729		const uint32 pc = cpu->pc();
730
731		// Fault in Mac ROM or RAM?
732	<	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize));
732	>	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize)) || (pc >= DR_CACHE_BASE && pc < (DR_CACHE_BASE + DR_CACHE_SIZE));
733		if (mac_fault) {
734
735		// "VM settings" during MacOS 8 installation
#	Line 745 | Line 749 | static sigsegv_return_t sigsegv_handler(
749		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
750		else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
751		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
752	+
753	+	// MacOS 8.6 serial drivers on startup (with DR Cache and OldWorld ROM)
754	+	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(16) == 0xf3012002 || cpu->gpr(16) == 0xf3012000))
755	+	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
756	+	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
757	+	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
758
759		// Ignore writes to the zero page
760		else if ((uint32)(addr - SheepMem::ZeroPage()) < (uint32)SheepMem::PageSize())
#	Line 758 | Line 768 | static sigsegv_return_t sigsegv_handler(
768		#error "FIXME: You don't have the capability to skip instruction within signal handlers"
769		#endif
770
771	<	printf("SIGSEGV\n");
772	<	printf("  pc %p\n", fault_instruction);
773	<	printf("  ea %p\n", fault_address);
764	<	printf(" cpu %s\n", current_cpu == main_cpu ? "main" : "interrupts");
771	>	fprintf(stderr, "SIGSEGV\n");
772	>	fprintf(stderr, "  pc %p\n", fault_instruction);
773	>	fprintf(stderr, "  ea %p\n", fault_address);
774		dump_registers();
775	<	current_cpu->dump_log();
775	>	ppc_cpu->dump_log();
776		enter_mon();
777		QuitEmulator();
778
#	Line 772 | Line 781 | static sigsegv_return_t sigsegv_handler(
781
782		void init_emul_ppc(void)
783		{
784	+	// Get pointer to KernelData in host address space
785	+	kernel_data = (KernelData *)Mac2HostAddr(KERNEL_DATA_BASE);
786	+
787		// Initialize main CPU emulator
788	<	main_cpu = new sheepshaver_cpu();
789	<	main_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
790	<	main_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
788	>	ppc_cpu = new sheepshaver_cpu();
789	>	ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
790	>	ppc_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
791		WriteMacInt32(XLM_RUN_MODE, MODE_68K);
792
781	–	#if MULTICORE_CPU
782	–	// Initialize alternate CPU emulator to handle interrupts
783	–	interrupt_cpu = new sheepshaver_cpu();
784	–	#endif
785	–
786	–	// Install the handler for SIGSEGV
787	–	sigsegv_install_handler(sigsegv_handler);
788	–
793		#if ENABLE_MON
794		// Install "regs" command in cxmon
795		mon_add_command("regs", dump_registers, "regs                     Dump PowerPC registers\n");
#	Line 811 | Line 815 | void exit_emul_ppc(void)
815		printf("Total emulation time : %.1f sec\n", double(emul_time) / double(CLOCKS_PER_SEC));
816		printf("Total interrupt count: %d (%2.1f Hz)\n", interrupt_count,
817		(double(interrupt_count) * CLOCKS_PER_SEC) / double(emul_time));
818	+	printf("Total ppc interrupt count: %d (%2.1f %%)\n", ppc_interrupt_count,
819	+	(double(ppc_interrupt_count) * 100.0) / double(interrupt_count));
820
821		#define PRINT_STATS(LABEL, VAR_PREFIX) do {                                                             \
822		printf("Total " LABEL " count : %d\n", VAR_PREFIX##_count);             \
#	Line 827 | Line 833 | void exit_emul_ppc(void)
833		printf("\n");
834		#endif
835
836	<	delete main_cpu;
837	<	#if MULTICORE_CPU
832	<	delete interrupt_cpu;
833	<	#endif
836	>	delete ppc_cpu;
837	>	ppc_cpu = NULL;
838		}
839
840	+	#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
841	+	// Initialize EmulOp trampolines
842	+	void init_emul_op_trampolines(basic_dyngen & dg)
843	+	{
844	+	typedef void (*func_t)(dyngen_cpu_base, uint32);
845	+	func_t func;
846	+
847	+	// EmulOp
848	+	emul_op_trampoline = dg.gen_start();
849	+	func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr();
850	+	dg.gen_invoke_CPU_T0(func);
851	+	dg.gen_exec_return();
852	+	dg.gen_end();
853	+
854	+	// NativeOp
855	+	native_op_trampoline = dg.gen_start();
856	+	func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
857	+	dg.gen_invoke_CPU_T0(func);
858	+	dg.gen_exec_return();
859	+	dg.gen_end();
860	+
861	+	D(bug("EmulOp trampoline:   %p\n", emul_op_trampoline));
862	+	D(bug("NativeOp trampoline: %p\n", native_op_trampoline));
863	+	}
864	+	#endif
865	+
866		/*
867		*  Emulation loop
868		*/
869
870		void emul_ppc(uint32 entry)
871		{
842	–	current_cpu = main_cpu;
872		#if 0
873	<	current_cpu->start_log();
873	>	ppc_cpu->start_log();
874		#endif
875		// start emulation loop and enable code translation or caching
876	<	current_cpu->execute(entry);
876	>	ppc_cpu->execute(entry);
877		}
878
879		/*
880		*  Handle PowerPC interrupt
881		*/
882
854	–	#if ASYNC_IRQ
855	–	void HandleInterrupt(void)
856	–	{
857	–	main_cpu->handle_interrupt();
858	–	}
859	–	#else
883		void TriggerInterrupt(void)
884		{
885	+	idle_resume();
886		#if 0
887		WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1);
888		#else
889		// Trigger interrupt to main cpu only
890	<	if (main_cpu)
891	<	main_cpu->trigger_interrupt();
890	>	if (ppc_cpu)
891	>	ppc_cpu->trigger_interrupt();
892		#endif
893		}
870	–	#endif
894
895	<	void sheepshaver_cpu::handle_interrupt(void)
895	>	void HandleInterrupt(powerpc_registers *r)
896		{
897	<	// Do nothing if interrupts are disabled
898	<	if (*(int32 *)XLM_IRQ_NEST > 0)
899	<	return;
897	>	#ifdef USE_SDL_VIDEO
898	>	// We must fill in the events queue in the same thread that did call SDL_SetVideoMode()
899	>	SDL_PumpEvents();
900	>	#endif
901
902	<	// Do nothing if there is no interrupt pending
903	<	if (InterruptFlags == 0)
902	>	// Do nothing if interrupts are disabled
903	>	if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0)
904		return;
905
906	<	// Disable MacOS stack sniffer
907	<	WriteMacInt32(0x110, 0);
906	>	// Update interrupt count
907	>	#if EMUL_TIME_STATS
908	>	interrupt_count++;
909	>	#endif
910
911		// Interrupt action depends on current run mode
912		switch (ReadMacInt32(XLM_RUN_MODE)) {
913		case MODE_68K:
914		// 68k emulator active, trigger 68k interrupt level 1
889	–	assert(current_cpu == main_cpu);
915		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
916	<	set_cr(get_cr() | tswap32(kernel_data->v[0x674 >> 2]));
916	>	r->cr.set(r->cr.get() | tswap32(kernel_data->v[0x674 >> 2]));
917		break;
918
919		#if INTERRUPTS_IN_NATIVE_MODE
920		case MODE_NATIVE:
921		// 68k emulator inactive, in nanokernel?
922	<	assert(current_cpu == main_cpu);
923	<	if (gpr(1) != KernelDataAddr) {
922	>	if (r->gpr[1] != KernelDataAddr) {
923	>
924		// Prepare for 68k interrupt level 1
925		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
926		WriteMacInt32(tswap32(kernel_data->v[0x658 >> 2]) + 0xdc,
#	Line 904 | Line 929 | void sheepshaver_cpu::handle_interrupt(v
929
930		// Execute nanokernel interrupt routine (this will activate the 68k emulator)
931		DisableInterrupt();
907	–	cpu_push(interrupt_cpu);
932		if (ROMType == ROMTYPE_NEWWORLD)
933	<	current_cpu->interrupt(ROM_BASE + 0x312b1c);
933	>	ppc_cpu->interrupt(ROM_BASE + 0x312b1c);
934		else
935	<	current_cpu->interrupt(ROM_BASE + 0x312a3c);
912	<	cpu_pop();
935	>	ppc_cpu->interrupt(ROM_BASE + 0x312a3c);
936		}
937		break;
938		#endif
#	Line 918 | Line 941 | void sheepshaver_cpu::handle_interrupt(v
941		case MODE_EMUL_OP:
942		// 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0
943		if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) {
944	+	#if EMUL_TIME_STATS
945	+	const clock_t interrupt_start = clock();
946	+	#endif
947		#if 1
948		// Execute full 68k interrupt routine
949		M68kRegisters r;
950		uint32 old_r25 = ReadMacInt32(XLM_68K_R25);     // Save interrupt level
951		WriteMacInt32(XLM_68K_R25, 0x21);                       // Execute with interrupt level 1
952	<	static const uint8 proc[] = {
952	>	static const uint8 proc_template[] = {
953		0x3f, 0x3c, 0x00, 0x00,                 // move.w       #$0000,-(sp)    (fake format word)
954		0x48, 0x7a, 0x00, 0x0a,                 // pea          @1(pc)                  (return address)
955		0x40, 0xe7,                                             // move         sr,-(sp)                (saved SR)
#	Line 931 | Line 957 | void sheepshaver_cpu::handle_interrupt(v
957		0x4e, 0xd0,                                             // jmp          (a0)
958		M68K_RTS >> 8, M68K_RTS & 0xff  // @1
959		};
960	<	Execute68k((uint32)proc, &r);
960	>	BUILD_SHEEPSHAVER_PROCEDURE(proc);
961	>	Execute68k(proc, &r);
962		WriteMacInt32(XLM_68K_R25, old_r25);            // Restore interrupt level
963		#else
964		// Only update cursor
#	Line 943 | Line 970 | void sheepshaver_cpu::handle_interrupt(v
970		}
971		}
972		#endif
973	+	#if EMUL_TIME_STATS
974	+	interrupt_time += (clock() - interrupt_start);
975	+	#endif
976		}
977		break;
978		#endif
979		}
980		}
981
982	<	static void get_resource(void);
983	<	static void get_1_resource(void);
954	<	static void get_ind_resource(void);
955	<	static void get_1_ind_resource(void);
956	<	static void r_get_resource(void);
957	<
958	<	#define GPR(REG) current_cpu->gpr(REG)
959	<
960	<	static void NativeOp(int selector)
982	>	// Execute NATIVE_OP routine
983	>	void sheepshaver_cpu::execute_native_op(uint32 selector)
984		{
985		#if EMUL_TIME_STATS
986		native_exec_count++;
#	Line 975 | Line 998 | static void NativeOp(int selector)
998		VideoVBL();
999		break;
1000		case NATIVE_VIDEO_DO_DRIVER_IO:
1001	<	GPR(3) = (int32)(int16)VideoDoDriverIO((void *)GPR(3), (void *)GPR(4),
1002	<	(void *)GPR(5), GPR(6), GPR(7));
1001	>	gpr(3) = (int32)(int16)VideoDoDriverIO(gpr(3), gpr(4), gpr(5), gpr(6), gpr(7));
1002	>	break;
1003	>	case NATIVE_ETHER_AO_GET_HWADDR:
1004	>	AO_get_ethernet_address(gpr(3));
1005	>	break;
1006	>	case NATIVE_ETHER_AO_ADD_MULTI:
1007	>	AO_enable_multicast(gpr(3));
1008	>	break;
1009	>	case NATIVE_ETHER_AO_DEL_MULTI:
1010	>	AO_disable_multicast(gpr(3));
1011	>	break;
1012	>	case NATIVE_ETHER_AO_SEND_PACKET:
1013	>	AO_transmit_packet(gpr(3));
1014		break;
981	–	#ifdef WORDS_BIGENDIAN
1015		case NATIVE_ETHER_IRQ:
1016		EtherIRQ();
1017		break;
1018		case NATIVE_ETHER_INIT:
1019	<	GPR(3) = InitStreamModule((void *)GPR(3));
1019	>	gpr(3) = InitStreamModule((void *)gpr(3));
1020		break;
1021		case NATIVE_ETHER_TERM:
1022		TerminateStreamModule();
1023		break;
1024		case NATIVE_ETHER_OPEN:
1025	<	GPR(3) = ether_open((queue_t *)GPR(3), (void *)GPR(4), GPR(5), GPR(6), (void*)GPR(7));
1025	>	gpr(3) = ether_open((queue_t *)gpr(3), (void *)gpr(4), gpr(5), gpr(6), (void*)gpr(7));
1026		break;
1027		case NATIVE_ETHER_CLOSE:
1028	<	GPR(3) = ether_close((queue_t *)GPR(3), GPR(4), (void *)GPR(5));
1028	>	gpr(3) = ether_close((queue_t *)gpr(3), gpr(4), (void *)gpr(5));
1029		break;
1030		case NATIVE_ETHER_WPUT:
1031	<	GPR(3) = ether_wput((queue_t *)GPR(3), (mblk_t *)GPR(4));
1031	>	gpr(3) = ether_wput((queue_t *)gpr(3), (mblk_t *)gpr(4));
1032		break;
1033		case NATIVE_ETHER_RSRV:
1034	<	GPR(3) = ether_rsrv((queue_t *)GPR(3));
1002	<	break;
1003	<	#else
1004	<	case NATIVE_ETHER_INIT:
1005	<	// FIXME: needs more complicated thunks
1006	<	GPR(3) = false;
1034	>	gpr(3) = ether_rsrv((queue_t *)gpr(3));
1035		break;
1008	–	#endif
1036		case NATIVE_SYNC_HOOK:
1037	<	GPR(3) = NQD_sync_hook(GPR(3));
1037	>	gpr(3) = NQD_sync_hook(gpr(3));
1038		break;
1039		case NATIVE_BITBLT_HOOK:
1040	<	GPR(3) = NQD_bitblt_hook(GPR(3));
1040	>	gpr(3) = NQD_bitblt_hook(gpr(3));
1041		break;
1042		case NATIVE_BITBLT:
1043	<	NQD_bitblt(GPR(3));
1043	>	NQD_bitblt(gpr(3));
1044		break;
1045		case NATIVE_FILLRECT_HOOK:
1046	<	GPR(3) = NQD_fillrect_hook(GPR(3));
1046	>	gpr(3) = NQD_fillrect_hook(gpr(3));
1047		break;
1048		case NATIVE_INVRECT:
1049	<	NQD_invrect(GPR(3));
1049	>	NQD_invrect(gpr(3));
1050		break;
1051		case NATIVE_FILLRECT:
1052	<	NQD_fillrect(GPR(3));
1052	>	NQD_fillrect(gpr(3));
1053		break;
1054		case NATIVE_SERIAL_NOTHING:
1055		case NATIVE_SERIAL_OPEN:
#	Line 1041 | Line 1068 | static void NativeOp(int selector)
1068		SerialStatus,
1069		SerialClose
1070		};
1071	<	GPR(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](GPR(3), GPR(4));
1071	>	gpr(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](gpr(3), gpr(4));
1072		break;
1073		}
1074		case NATIVE_GET_RESOURCE:
1075	+	get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1076	+	break;
1077		case NATIVE_GET_1_RESOURCE:
1078	+	get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1079	+	break;
1080		case NATIVE_GET_IND_RESOURCE:
1081	<	case NATIVE_GET_1_IND_RESOURCE:
1051	<	case NATIVE_R_GET_RESOURCE: {
1052	<	typedef void (*GetResourceCallback)(void);
1053	<	static const GetResourceCallback get_resource_callbacks[] = {
1054	<	get_resource,
1055	<	get_1_resource,
1056	<	get_ind_resource,
1057	<	get_1_ind_resource,
1058	<	r_get_resource
1059	<	};
1060	<	get_resource_callbacks[selector - NATIVE_GET_RESOURCE]();
1081	>	get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1082		break;
1083	<	}
1084	<	case NATIVE_DISABLE_INTERRUPT:
1064	<	DisableInterrupt();
1083	>	case NATIVE_GET_1_IND_RESOURCE:
1084	>	get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1085		break;
1086	<	case NATIVE_ENABLE_INTERRUPT:
1087	<	EnableInterrupt();
1086	>	case NATIVE_R_GET_RESOURCE:
1087	>	get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1088		break;
1089		case NATIVE_MAKE_EXECUTABLE:
1090	<	MakeExecutable(0, (void *)GPR(4), GPR(5));
1090	>	MakeExecutable(0, gpr(4), gpr(5));
1091		break;
1092		case NATIVE_CHECK_LOAD_INVOC:
1093	<	check_load_invoc(GPR(3), GPR(4), GPR(5));
1093	>	check_load_invoc(gpr(3), gpr(4), gpr(5));
1094	>	break;
1095	>	case NATIVE_NAMED_CHECK_LOAD_INVOC:
1096	>	named_check_load_invoc(gpr(3), gpr(4), gpr(5));
1097		break;
1098		default:
1099		printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector);
#	Line 1091 | Line 1114 | static void NativeOp(int selector)
1114
1115		void Execute68k(uint32 pc, M68kRegisters *r)
1116		{
1117	<	current_cpu->execute_68k(pc, r);
1117	>	ppc_cpu->execute_68k(pc, r);
1118		}
1119
1120		/*
#	Line 1114 | Line 1137 | void Execute68kTrap(uint16 trap, M68kReg
1137
1138		uint32 call_macos(uint32 tvect)
1139		{
1140	<	return current_cpu->execute_macos_code(tvect, 0, NULL);
1140	>	return ppc_cpu->execute_macos_code(tvect, 0, NULL);
1141		}
1142
1143		uint32 call_macos1(uint32 tvect, uint32 arg1)
1144		{
1145		const uint32 args[] = { arg1 };
1146	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1146	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1147		}
1148
1149		uint32 call_macos2(uint32 tvect, uint32 arg1, uint32 arg2)
1150		{
1151		const uint32 args[] = { arg1, arg2 };
1152	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1152	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1153		}
1154
1155		uint32 call_macos3(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3)
1156		{
1157		const uint32 args[] = { arg1, arg2, arg3 };
1158	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1158	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1159		}
1160
1161		uint32 call_macos4(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4)
1162		{
1163		const uint32 args[] = { arg1, arg2, arg3, arg4 };
1164	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1164	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1165		}
1166
1167		uint32 call_macos5(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5)
1168		{
1169		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5 };
1170	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1170	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1171		}
1172
1173		uint32 call_macos6(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6)
1174		{
1175		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6 };
1176	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1176	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1177		}
1178
1179		uint32 call_macos7(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6, uint32 arg7)
1180		{
1181		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6, arg7 };
1182	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1160	<	}
1161	<
1162	<	/*
1163	<	*  Resource Manager thunks
1164	<	*/
1165	<
1166	<	void get_resource(void)
1167	<	{
1168	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1169	<	}
1170	<
1171	<	void get_1_resource(void)
1172	<	{
1173	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1174	<	}
1175	<
1176	<	void get_ind_resource(void)
1177	<	{
1178	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1179	<	}
1180	<
1181	<	void get_1_ind_resource(void)
1182	<	{
1183	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1184	<	}
1185	<
1186	<	void r_get_resource(void)
1187	<	{
1188	<	current_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1182	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1183		}

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