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root/cebix/SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp
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Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.62 by gbeauche, 2005-06-30T07:34:17Z vs.
Revision 1.67 by gbeauche, 2006-01-21T17:18:53Z

# Line 177 | Line 177 | public:
177  
178          // Make sure the SIGSEGV handler can access CPU registers
179          friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
180
181        // Memory allocator returning areas aligned on 16-byte boundaries
182        void *operator new(size_t size);
183        void operator delete(void *p);
180   };
181  
186 // Memory allocator returning sheepshaver_cpu objects aligned on 16-byte boundaries
187 // FORMAT: [ alignment ] magic identifier, offset to malloc'ed data, sheepshaver_cpu data
188 void *sheepshaver_cpu::operator new(size_t size)
189 {
190        const int ALIGN = 16;
191
192        // Allocate enough space for sheepshaver_cpu data + signature + align pad
193        uint8 *ptr = (uint8 *)malloc(size + ALIGN * 2);
194        if (ptr == NULL)
195                throw std::bad_alloc();
196
197        // Align memory
198        int ofs = 0;
199        while ((((uintptr)ptr) % ALIGN) != 0)
200                ofs++, ptr++;
201
202        // Insert signature and offset
203        struct aligned_block_t {
204                uint32 pad[(ALIGN - 8) / 4];
205                uint32 signature;
206                uint32 offset;
207                uint8  data[sizeof(sheepshaver_cpu)];
208        };
209        aligned_block_t *blk = (aligned_block_t *)ptr;
210        blk->signature = FOURCC('S','C','P','U');
211        blk->offset = ofs + (&blk->data[0] - (uint8 *)blk);
212        assert((((uintptr)&blk->data) % ALIGN) == 0);
213        return &blk->data[0];
214 }
215
216 void sheepshaver_cpu::operator delete(void *p)
217 {
218        uint32 *blk = (uint32 *)p;
219        assert(blk[-2] == FOURCC('S','C','P','U'));
220        void *ptr = (void *)(((uintptr)p) - blk[-1]);
221        free(ptr);
222 }
223
182   sheepshaver_cpu::sheepshaver_cpu()
183          : powerpc_cpu(enable_jit_p())
184   {
# Line 868 | Line 826 | void exit_emul_ppc(void)
826   #endif
827  
828          delete ppc_cpu;
829 +        ppc_cpu = NULL;
830   }
831  
832   #if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
# Line 915 | Line 874 | void emul_ppc(uint32 entry)
874  
875   void TriggerInterrupt(void)
876   {
877 +        idle_resume();
878   #if 0
879    WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1);
880   #else
# Line 935 | Line 895 | void HandleInterrupt(powerpc_registers *
895          if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0)
896                  return;
897  
898 <        // Do nothing if there is no pending interrupt
939 <        if (InterruptFlags == 0)
940 <                return;
941 <
942 <        // Current interrupt nest level
943 <        static int interrupt_depth = 0;
944 <        ++interrupt_depth;
898 >        // Update interrupt count
899   #if EMUL_TIME_STATS
900          interrupt_count++;
901   #endif
# Line 957 | Line 911 | void HandleInterrupt(powerpc_registers *
911   #if INTERRUPTS_IN_NATIVE_MODE
912          case MODE_NATIVE:
913                  // 68k emulator inactive, in nanokernel?
914 <                if (r->gpr[1] != KernelDataAddr && interrupt_depth == 1) {
914 >                if (r->gpr[1] != KernelDataAddr) {
915  
916                          // Prepare for 68k interrupt level 1
917                          WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
# Line 1015 | Line 969 | void HandleInterrupt(powerpc_registers *
969                  break;
970   #endif
971          }
1018
1019        // We are done with this interrupt
1020        --interrupt_depth;
972   }
973  
974   static void get_resource(void);
# Line 1047 | Line 998 | void sheepshaver_cpu::execute_native_op(
998          case NATIVE_VIDEO_DO_DRIVER_IO:
999                  gpr(3) = (int32)(int16)VideoDoDriverIO(gpr(3), gpr(4), gpr(5), gpr(6), gpr(7));
1000                  break;
1001 +        case NATIVE_ETHER_AO_GET_HWADDR:
1002 +                AO_get_ethernet_address(gpr(3));
1003 +                break;
1004 +        case NATIVE_ETHER_AO_ADD_MULTI:
1005 +                AO_enable_multicast(gpr(3));
1006 +                break;
1007 +        case NATIVE_ETHER_AO_DEL_MULTI:
1008 +                AO_disable_multicast(gpr(3));
1009 +                break;
1010 +        case NATIVE_ETHER_AO_SEND_PACKET:
1011 +                AO_transmit_packet(gpr(3));
1012 +                break;
1013          case NATIVE_ETHER_IRQ:
1014                  EtherIRQ();
1015                  break;

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