93 |
|
// PowerPC EmulOp to exit from emulation looop |
94 |
|
const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1; |
95 |
|
|
96 |
– |
// Enable interrupt routine safety checks? |
97 |
– |
#define SAFE_INTERRUPT_PPC 1 |
98 |
– |
|
96 |
|
// Enable Execute68k() safety checks? |
97 |
|
#define SAFE_EXEC_68K 1 |
98 |
|
|
139 |
|
void init_decoder(); |
140 |
|
void execute_sheep(uint32 opcode); |
141 |
|
|
145 |
– |
// CPU context to preserve on interrupt |
146 |
– |
class interrupt_context { |
147 |
– |
uint32 gpr[32]; |
148 |
– |
double fpr[32]; |
149 |
– |
uint32 pc; |
150 |
– |
uint32 lr; |
151 |
– |
uint32 ctr; |
152 |
– |
uint32 cr; |
153 |
– |
uint32 xer; |
154 |
– |
uint32 fpscr; |
155 |
– |
sheepshaver_cpu *cpu; |
156 |
– |
const char *where; |
157 |
– |
public: |
158 |
– |
interrupt_context(sheepshaver_cpu *_cpu, const char *_where); |
159 |
– |
~interrupt_context(); |
160 |
– |
}; |
161 |
– |
|
142 |
|
public: |
143 |
|
|
144 |
|
// Constructor |
174 |
|
|
175 |
|
// Handle MacOS interrupt |
176 |
|
void interrupt(uint32 entry); |
197 |
– |
void handle_interrupt(); |
177 |
|
|
178 |
|
// Make sure the SIGSEGV handler can access CPU registers |
179 |
|
friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t); |
201 |
– |
|
202 |
– |
// Memory allocator returning areas aligned on 16-byte boundaries |
203 |
– |
void *operator new(size_t size); |
204 |
– |
void operator delete(void *p); |
180 |
|
}; |
181 |
|
|
207 |
– |
// Memory allocator returning areas aligned on 16-byte boundaries |
208 |
– |
void *sheepshaver_cpu::operator new(size_t size) |
209 |
– |
{ |
210 |
– |
void *p; |
211 |
– |
|
212 |
– |
#if defined(HAVE_POSIX_MEMALIGN) |
213 |
– |
if (posix_memalign(&p, 16, size) != 0) |
214 |
– |
throw std::bad_alloc(); |
215 |
– |
#elif defined(HAVE_MEMALIGN) |
216 |
– |
p = memalign(16, size); |
217 |
– |
#elif defined(HAVE_VALLOC) |
218 |
– |
p = valloc(size); // page-aligned! |
219 |
– |
#else |
220 |
– |
/* XXX: handle padding ourselves */ |
221 |
– |
p = malloc(size); |
222 |
– |
#endif |
223 |
– |
|
224 |
– |
return p; |
225 |
– |
} |
226 |
– |
|
227 |
– |
void sheepshaver_cpu::operator delete(void *p) |
228 |
– |
{ |
229 |
– |
#if defined(HAVE_MEMALIGN) || defined(HAVE_VALLOC) |
230 |
– |
#if defined(__GLIBC__) |
231 |
– |
// this is known to work only with GNU libc |
232 |
– |
free(p); |
233 |
– |
#endif |
234 |
– |
#else |
235 |
– |
free(p); |
236 |
– |
#endif |
237 |
– |
} |
238 |
– |
|
182 |
|
sheepshaver_cpu::sheepshaver_cpu() |
183 |
|
: powerpc_cpu(enable_jit_p()) |
184 |
|
{ |
227 |
|
for (int i = 0; i < 7; i++) |
228 |
|
r68.a[i] = gpr(16 + i); |
229 |
|
r68.a[7] = gpr(1); |
230 |
< |
uint32 saved_cr = get_cr() & CR_field<2>::mask(); |
230 |
> |
uint32 saved_cr = get_cr() & 0xff9fffff; // mask_operand::compute(11, 8) |
231 |
|
uint32 saved_xer = get_xer(); |
232 |
|
EmulOp(&r68, gpr(24), emul_op); |
233 |
|
set_cr(saved_cr); |
422 |
|
} |
423 |
|
#endif |
424 |
|
|
482 |
– |
// CPU context to preserve on interrupt |
483 |
– |
sheepshaver_cpu::interrupt_context::interrupt_context(sheepshaver_cpu *_cpu, const char *_where) |
484 |
– |
{ |
485 |
– |
#if SAFE_INTERRUPT_PPC >= 2 |
486 |
– |
cpu = _cpu; |
487 |
– |
where = _where; |
488 |
– |
|
489 |
– |
// Save interrupt context |
490 |
– |
memcpy(&gpr[0], &cpu->gpr(0), sizeof(gpr)); |
491 |
– |
memcpy(&fpr[0], &cpu->fpr(0), sizeof(fpr)); |
492 |
– |
pc = cpu->pc(); |
493 |
– |
lr = cpu->lr(); |
494 |
– |
ctr = cpu->ctr(); |
495 |
– |
cr = cpu->get_cr(); |
496 |
– |
xer = cpu->get_xer(); |
497 |
– |
fpscr = cpu->fpscr(); |
498 |
– |
#endif |
499 |
– |
} |
500 |
– |
|
501 |
– |
sheepshaver_cpu::interrupt_context::~interrupt_context() |
502 |
– |
{ |
503 |
– |
#if SAFE_INTERRUPT_PPC >= 2 |
504 |
– |
// Check whether CPU context was preserved by interrupt |
505 |
– |
if (memcmp(&gpr[0], &cpu->gpr(0), sizeof(gpr)) != 0) { |
506 |
– |
printf("FATAL: %s: interrupt clobbers registers\n", where); |
507 |
– |
for (int i = 0; i < 32; i++) |
508 |
– |
if (gpr[i] != cpu->gpr(i)) |
509 |
– |
printf(" r%d: %08x -> %08x\n", i, gpr[i], cpu->gpr(i)); |
510 |
– |
} |
511 |
– |
if (memcmp(&fpr[0], &cpu->fpr(0), sizeof(fpr)) != 0) { |
512 |
– |
printf("FATAL: %s: interrupt clobbers registers\n", where); |
513 |
– |
for (int i = 0; i < 32; i++) |
514 |
– |
if (fpr[i] != cpu->fpr(i)) |
515 |
– |
printf(" r%d: %f -> %f\n", i, fpr[i], cpu->fpr(i)); |
516 |
– |
} |
517 |
– |
if (pc != cpu->pc()) |
518 |
– |
printf("FATAL: %s: interrupt clobbers PC\n", where); |
519 |
– |
if (lr != cpu->lr()) |
520 |
– |
printf("FATAL: %s: interrupt clobbers LR\n", where); |
521 |
– |
if (ctr != cpu->ctr()) |
522 |
– |
printf("FATAL: %s: interrupt clobbers CTR\n", where); |
523 |
– |
if (cr != cpu->get_cr()) |
524 |
– |
printf("FATAL: %s: interrupt clobbers CR\n", where); |
525 |
– |
if (xer != cpu->get_xer()) |
526 |
– |
printf("FATAL: %s: interrupt clobbers XER\n", where); |
527 |
– |
if (fpscr != cpu->fpscr()) |
528 |
– |
printf("FATAL: %s: interrupt clobbers FPSCR\n", where); |
529 |
– |
#endif |
530 |
– |
} |
531 |
– |
|
425 |
|
// Handle MacOS interrupt |
426 |
|
void sheepshaver_cpu::interrupt(uint32 entry) |
427 |
|
{ |
430 |
|
const clock_t interrupt_start = clock(); |
431 |
|
#endif |
432 |
|
|
540 |
– |
#if SAFE_INTERRUPT_PPC |
541 |
– |
static int depth = 0; |
542 |
– |
if (depth != 0) |
543 |
– |
printf("FATAL: sheepshaver_cpu::interrupt() called more than once: %d\n", depth); |
544 |
– |
depth++; |
545 |
– |
#endif |
546 |
– |
|
433 |
|
// Save program counters and branch registers |
434 |
|
uint32 saved_pc = pc(); |
435 |
|
uint32 saved_lr = lr(); |
483 |
|
#if EMUL_TIME_STATS |
484 |
|
interrupt_time += (clock() - interrupt_start); |
485 |
|
#endif |
600 |
– |
|
601 |
– |
#if SAFE_INTERRUPT_PPC |
602 |
– |
depth--; |
603 |
– |
#endif |
486 |
|
} |
487 |
|
|
488 |
|
// Execute 68k routine |
760 |
|
#error "FIXME: You don't have the capability to skip instruction within signal handlers" |
761 |
|
#endif |
762 |
|
|
763 |
< |
printf("SIGSEGV\n"); |
764 |
< |
printf(" pc %p\n", fault_instruction); |
765 |
< |
printf(" ea %p\n", fault_address); |
763 |
> |
fprintf(stderr, "SIGSEGV\n"); |
764 |
> |
fprintf(stderr, " pc %p\n", fault_instruction); |
765 |
> |
fprintf(stderr, " ea %p\n", fault_address); |
766 |
|
dump_registers(); |
767 |
|
ppc_cpu->dump_log(); |
768 |
|
enter_mon(); |
826 |
|
#endif |
827 |
|
|
828 |
|
delete ppc_cpu; |
829 |
+ |
ppc_cpu = NULL; |
830 |
|
} |
831 |
|
|
832 |
|
#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT |
874 |
|
|
875 |
|
void TriggerInterrupt(void) |
876 |
|
{ |
877 |
+ |
idle_resume(); |
878 |
|
#if 0 |
879 |
|
WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1); |
880 |
|
#else |
884 |
|
#endif |
885 |
|
} |
886 |
|
|
887 |
< |
void sheepshaver_cpu::handle_interrupt(void) |
887 |
> |
void HandleInterrupt(powerpc_registers *r) |
888 |
|
{ |
889 |
|
#ifdef USE_SDL_VIDEO |
890 |
|
// We must fill in the events queue in the same thread that did call SDL_SetVideoMode() |
895 |
|
if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0) |
896 |
|
return; |
897 |
|
|
898 |
< |
// Current interrupt nest level |
1015 |
< |
static int interrupt_depth = 0; |
1016 |
< |
++interrupt_depth; |
898 |
> |
// Update interrupt count |
899 |
|
#if EMUL_TIME_STATS |
900 |
|
interrupt_count++; |
901 |
|
#endif |
902 |
|
|
1021 |
– |
// Disable MacOS stack sniffer |
1022 |
– |
WriteMacInt32(0x110, 0); |
1023 |
– |
|
903 |
|
// Interrupt action depends on current run mode |
904 |
|
switch (ReadMacInt32(XLM_RUN_MODE)) { |
905 |
|
case MODE_68K: |
906 |
|
// 68k emulator active, trigger 68k interrupt level 1 |
907 |
|
WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1); |
908 |
< |
set_cr(get_cr() | tswap32(kernel_data->v[0x674 >> 2])); |
908 |
> |
r->cr.set(r->cr.get() | tswap32(kernel_data->v[0x674 >> 2])); |
909 |
|
break; |
910 |
|
|
911 |
|
#if INTERRUPTS_IN_NATIVE_MODE |
912 |
|
case MODE_NATIVE: |
913 |
|
// 68k emulator inactive, in nanokernel? |
914 |
< |
if (gpr(1) != KernelDataAddr && interrupt_depth == 1) { |
1036 |
< |
interrupt_context ctx(this, "PowerPC mode"); |
914 |
> |
if (r->gpr[1] != KernelDataAddr) { |
915 |
|
|
916 |
|
// Prepare for 68k interrupt level 1 |
917 |
|
WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1); |
933 |
|
case MODE_EMUL_OP: |
934 |
|
// 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0 |
935 |
|
if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) { |
1058 |
– |
interrupt_context ctx(this, "68k mode"); |
936 |
|
#if EMUL_TIME_STATS |
937 |
|
const clock_t interrupt_start = clock(); |
938 |
|
#endif |
969 |
|
break; |
970 |
|
#endif |
971 |
|
} |
1095 |
– |
|
1096 |
– |
// We are done with this interrupt |
1097 |
– |
--interrupt_depth; |
972 |
|
} |
973 |
|
|
974 |
|
static void get_resource(void); |
998 |
|
case NATIVE_VIDEO_DO_DRIVER_IO: |
999 |
|
gpr(3) = (int32)(int16)VideoDoDriverIO(gpr(3), gpr(4), gpr(5), gpr(6), gpr(7)); |
1000 |
|
break; |
1001 |
+ |
case NATIVE_ETHER_AO_GET_HWADDR: |
1002 |
+ |
AO_get_ethernet_address(gpr(3)); |
1003 |
+ |
break; |
1004 |
+ |
case NATIVE_ETHER_AO_ADD_MULTI: |
1005 |
+ |
AO_enable_multicast(gpr(3)); |
1006 |
+ |
break; |
1007 |
+ |
case NATIVE_ETHER_AO_DEL_MULTI: |
1008 |
+ |
AO_disable_multicast(gpr(3)); |
1009 |
+ |
break; |
1010 |
+ |
case NATIVE_ETHER_AO_SEND_PACKET: |
1011 |
+ |
AO_transmit_packet(gpr(3)); |
1012 |
+ |
break; |
1013 |
|
case NATIVE_ETHER_IRQ: |
1014 |
|
EtherIRQ(); |
1015 |
|
break; |