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Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.55 by gbeauche, 2004-12-18T18:40:04Z vs.
Revision 1.67 by gbeauche, 2006-01-21T17:18:53Z

# Line 1 | Line 1
1   /*
2   *  sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface
3   *
4 < *  SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig
4 > *  SheepShaver (C) 1997-2005 Christian Bauer and Marc Hellwig
5   *
6   *  This program is free software; you can redistribute it and/or modify
7   *  it under the terms of the GNU General Public License as published by
# Line 93 | Line 93 | extern "C" void check_load_invoc(uint32
93   // PowerPC EmulOp to exit from emulation looop
94   const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1;
95  
96 // Enable interrupt routine safety checks?
97 #define SAFE_INTERRUPT_PPC 1
98
96   // Enable Execute68k() safety checks?
97   #define SAFE_EXEC_68K 1
98  
# Line 142 | Line 139 | class sheepshaver_cpu
139          void init_decoder();
140          void execute_sheep(uint32 opcode);
141  
145        // CPU context to preserve on interrupt
146        class interrupt_context {
147                uint32 gpr[32];
148                uint32 pc;
149                uint32 lr;
150                uint32 ctr;
151                uint32 cr;
152                uint32 xer;
153                sheepshaver_cpu *cpu;
154                const char *where;
155        public:
156                interrupt_context(sheepshaver_cpu *_cpu, const char *_where);
157                ~interrupt_context();
158        };
159
142   public:
143  
144          // Constructor
# Line 192 | Line 174 | public:
174  
175          // Handle MacOS interrupt
176          void interrupt(uint32 entry);
195        void handle_interrupt();
177  
178          // Make sure the SIGSEGV handler can access CPU registers
179          friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
199
200        // Memory allocator returning areas aligned on 16-byte boundaries
201        void *operator new(size_t size);
202        void operator delete(void *p);
180   };
181  
205 // Memory allocator returning areas aligned on 16-byte boundaries
206 void *sheepshaver_cpu::operator new(size_t size)
207 {
208        void *p;
209
210 #if defined(HAVE_POSIX_MEMALIGN)
211        if (posix_memalign(&p, 16, size) != 0)
212                throw std::bad_alloc();
213 #elif defined(HAVE_MEMALIGN)
214        p = memalign(16, size);
215 #elif defined(HAVE_VALLOC)
216        p = valloc(size); // page-aligned!
217 #else
218        /* XXX: handle padding ourselves */
219        p = malloc(size);
220 #endif
221
222        return p;
223 }
224
225 void sheepshaver_cpu::operator delete(void *p)
226 {
227 #if defined(HAVE_MEMALIGN) || defined(HAVE_VALLOC)
228 #if defined(__GLIBC__)
229        // this is known to work only with GNU libc
230        free(p);
231 #endif
232 #else
233        free(p);
234 #endif
235 }
236
182   sheepshaver_cpu::sheepshaver_cpu()
183          : powerpc_cpu(enable_jit_p())
184   {
# Line 282 | Line 227 | void sheepshaver_cpu::execute_emul_op(ui
227          for (int i = 0; i < 7; i++)
228                  r68.a[i] = gpr(16 + i);
229          r68.a[7] = gpr(1);
230 <        uint32 saved_cr = get_cr() & CR_field<2>::mask();
230 >        uint32 saved_cr = get_cr() & 0xff9fffff; // mask_operand::compute(11, 8)
231          uint32 saved_xer = get_xer();
232          EmulOp(&r68, gpr(24), emul_op);
233          set_cr(saved_cr);
# Line 477 | Line 422 | int sheepshaver_cpu::compile1(codegen_co
422   }
423   #endif
424  
480 // CPU context to preserve on interrupt
481 sheepshaver_cpu::interrupt_context::interrupt_context(sheepshaver_cpu *_cpu, const char *_where)
482 {
483 #if SAFE_INTERRUPT_PPC >= 2
484        cpu = _cpu;
485        where = _where;
486
487        // Save interrupt context
488        memcpy(&gpr[0], &cpu->gpr(0), sizeof(gpr));
489        pc = cpu->pc();
490        lr = cpu->lr();
491        ctr = cpu->ctr();
492        cr = cpu->get_cr();
493        xer = cpu->get_xer();
494 #endif
495 }
496
497 sheepshaver_cpu::interrupt_context::~interrupt_context()
498 {
499 #if SAFE_INTERRUPT_PPC >= 2
500        // Check whether CPU context was preserved by interrupt
501        if (memcmp(&gpr[0], &cpu->gpr(0), sizeof(gpr)) != 0) {
502                printf("FATAL: %s: interrupt clobbers registers\n", where);
503                for (int i = 0; i < 32; i++)
504                        if (gpr[i] != cpu->gpr(i))
505                                printf(" r%d: %08x -> %08x\n", i, gpr[i], cpu->gpr(i));
506        }
507        if (pc != cpu->pc())
508                printf("FATAL: %s: interrupt clobbers PC\n", where);
509        if (lr != cpu->lr())
510                printf("FATAL: %s: interrupt clobbers LR\n", where);
511        if (ctr != cpu->ctr())
512                printf("FATAL: %s: interrupt clobbers CTR\n", where);
513        if (cr != cpu->get_cr())
514                printf("FATAL: %s: interrupt clobbers CR\n", where);
515        if (xer != cpu->get_xer())
516                printf("FATAL: %s: interrupt clobbers XER\n", where);
517 #endif
518 }
519
425   // Handle MacOS interrupt
426   void sheepshaver_cpu::interrupt(uint32 entry)
427   {
# Line 525 | Line 430 | void sheepshaver_cpu::interrupt(uint32 e
430          const clock_t interrupt_start = clock();
431   #endif
432  
528 #if SAFE_INTERRUPT_PPC
529        static int depth = 0;
530        if (depth != 0)
531                printf("FATAL: sheepshaver_cpu::interrupt() called more than once: %d\n", depth);
532        depth++;
533 #endif
534
433          // Save program counters and branch registers
434          uint32 saved_pc = pc();
435          uint32 saved_lr = lr();
# Line 585 | Line 483 | void sheepshaver_cpu::interrupt(uint32 e
483   #if EMUL_TIME_STATS
484          interrupt_time += (clock() - interrupt_start);
485   #endif
588
589 #if SAFE_INTERRUPT_PPC
590        depth--;
591 #endif
486   }
487  
488   // Execute 68k routine
# Line 866 | Line 760 | sigsegv_return_t sigsegv_handler(sigsegv
760   #error "FIXME: You don't have the capability to skip instruction within signal handlers"
761   #endif
762  
763 <        printf("SIGSEGV\n");
764 <        printf("  pc %p\n", fault_instruction);
765 <        printf("  ea %p\n", fault_address);
763 >        fprintf(stderr, "SIGSEGV\n");
764 >        fprintf(stderr, "  pc %p\n", fault_instruction);
765 >        fprintf(stderr, "  ea %p\n", fault_address);
766          dump_registers();
767          ppc_cpu->dump_log();
768          enter_mon();
# Line 932 | Line 826 | void exit_emul_ppc(void)
826   #endif
827  
828          delete ppc_cpu;
829 +        ppc_cpu = NULL;
830   }
831  
832   #if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
# Line 979 | Line 874 | void emul_ppc(uint32 entry)
874  
875   void TriggerInterrupt(void)
876   {
877 +        idle_resume();
878   #if 0
879    WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1);
880   #else
# Line 988 | Line 884 | void TriggerInterrupt(void)
884   #endif
885   }
886  
887 < void sheepshaver_cpu::handle_interrupt(void)
887 > void HandleInterrupt(powerpc_registers *r)
888   {
889   #ifdef USE_SDL_VIDEO
890          // We must fill in the events queue in the same thread that did call SDL_SetVideoMode()
# Line 999 | Line 895 | void sheepshaver_cpu::handle_interrupt(v
895          if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0)
896                  return;
897  
898 <        // Current interrupt nest level
1003 <        static int interrupt_depth = 0;
1004 <        ++interrupt_depth;
898 >        // Update interrupt count
899   #if EMUL_TIME_STATS
900          interrupt_count++;
901   #endif
902  
1009        // Disable MacOS stack sniffer
1010        WriteMacInt32(0x110, 0);
1011
903          // Interrupt action depends on current run mode
904          switch (ReadMacInt32(XLM_RUN_MODE)) {
905          case MODE_68K:
906                  // 68k emulator active, trigger 68k interrupt level 1
907                  WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
908 <                set_cr(get_cr() | tswap32(kernel_data->v[0x674 >> 2]));
908 >                r->cr.set(r->cr.get() | tswap32(kernel_data->v[0x674 >> 2]));
909                  break;
910      
911   #if INTERRUPTS_IN_NATIVE_MODE
912          case MODE_NATIVE:
913                  // 68k emulator inactive, in nanokernel?
914 <                if (gpr(1) != KernelDataAddr && interrupt_depth == 1) {
1024 <                        interrupt_context ctx(this, "PowerPC mode");
914 >                if (r->gpr[1] != KernelDataAddr) {
915  
916                          // Prepare for 68k interrupt level 1
917                          WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
# Line 1043 | Line 933 | void sheepshaver_cpu::handle_interrupt(v
933          case MODE_EMUL_OP:
934                  // 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0
935                  if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) {
1046                        interrupt_context ctx(this, "68k mode");
936   #if EMUL_TIME_STATS
937                          const clock_t interrupt_start = clock();
938   #endif
# Line 1080 | Line 969 | void sheepshaver_cpu::handle_interrupt(v
969                  break;
970   #endif
971          }
1083
1084        // We are done with this interrupt
1085        --interrupt_depth;
972   }
973  
974   static void get_resource(void);
# Line 1112 | Line 998 | void sheepshaver_cpu::execute_native_op(
998          case NATIVE_VIDEO_DO_DRIVER_IO:
999                  gpr(3) = (int32)(int16)VideoDoDriverIO(gpr(3), gpr(4), gpr(5), gpr(6), gpr(7));
1000                  break;
1001 +        case NATIVE_ETHER_AO_GET_HWADDR:
1002 +                AO_get_ethernet_address(gpr(3));
1003 +                break;
1004 +        case NATIVE_ETHER_AO_ADD_MULTI:
1005 +                AO_enable_multicast(gpr(3));
1006 +                break;
1007 +        case NATIVE_ETHER_AO_DEL_MULTI:
1008 +                AO_disable_multicast(gpr(3));
1009 +                break;
1010 +        case NATIVE_ETHER_AO_SEND_PACKET:
1011 +                AO_transmit_packet(gpr(3));
1012 +                break;
1013          case NATIVE_ETHER_IRQ:
1014                  EtherIRQ();
1015                  break;

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