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root/cebix/SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp
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Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.51 by gbeauche, 2004-07-11T08:12:21Z vs.
Revision 1.67 by gbeauche, 2006-01-21T17:18:53Z

# Line 1 | Line 1
1   /*
2   *  sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface
3   *
4 < *  SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig
4 > *  SheepShaver (C) 1997-2005 Christian Bauer and Marc Hellwig
5   *
6   *  This program is free software; you can redistribute it and/or modify
7   *  it under the terms of the GNU General Public License as published by
# Line 42 | Line 42
42  
43   #include <stdio.h>
44   #include <stdlib.h>
45 + #ifdef HAVE_MALLOC_H
46 + #include <malloc.h>
47 + #endif
48  
49   #ifdef USE_SDL_VIDEO
50   #include <SDL_events.h>
# Line 90 | Line 93 | extern "C" void check_load_invoc(uint32
93   // PowerPC EmulOp to exit from emulation looop
94   const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1;
95  
93 – // Enable interrupt routine safety checks?
94 – #define SAFE_INTERRUPT_PPC 1
95 –
96   // Enable Execute68k() safety checks?
97   #define SAFE_EXEC_68K 1
98  
# Line 106 | Line 106 | const uint32 POWERPC_EXEC_RETURN = POWER
106   #define INTERRUPTS_IN_NATIVE_MODE 1
107  
108   // Pointer to Kernel Data
109 < static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE;
109 > static KernelData * kernel_data;
110  
111   // SIGSEGV handler
112   sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
# Line 139 | Line 139 | class sheepshaver_cpu
139          void init_decoder();
140          void execute_sheep(uint32 opcode);
141  
142 –        // CPU context to preserve on interrupt
143 –        class interrupt_context {
144 –                uint32 gpr[32];
145 –                uint32 pc;
146 –                uint32 lr;
147 –                uint32 ctr;
148 –                uint32 cr;
149 –                uint32 xer;
150 –                sheepshaver_cpu *cpu;
151 –                const char *where;
152 –        public:
153 –                interrupt_context(sheepshaver_cpu *_cpu, const char *_where);
154 –                ~interrupt_context();
155 –        };
156 –
142   public:
143  
144          // Constructor
# Line 180 | Line 165 | public:
165          // Execute MacOS/PPC code
166          uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args);
167  
168 + #if PPC_ENABLE_JIT
169          // Compile one instruction
170          virtual int compile1(codegen_context_t & cg_context);
171 <
171 > #endif
172          // Resource manager thunk
173          void get_resource(uint32 old_get_resource);
174  
175          // Handle MacOS interrupt
176          void interrupt(uint32 entry);
191 –        void handle_interrupt();
177  
178          // Make sure the SIGSEGV handler can access CPU registers
179          friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
180   };
181  
197 – // Memory allocator returning areas aligned on 16-byte boundaries
198 – void *operator new(size_t size)
199 – {
200 –        void *p;
201 –
202 – #if defined(HAVE_POSIX_MEMALIGN)
203 –        if (posix_memalign(&p, 16, size) != 0)
204 –                throw std::bad_alloc();
205 – #elif defined(HAVE_MEMALIGN)
206 –        p = memalign(16, size);
207 – #elif defined(HAVE_VALLOC)
208 –        p = valloc(size); // page-aligned!
209 – #else
210 –        /* XXX: handle padding ourselves */
211 –        p = malloc(size);
212 – #endif
213 –
214 –        return p;
215 – }
216 –
217 – void operator delete(void *p)
218 – {
219 – #if defined(HAVE_MEMALIGN) || defined(HAVE_VALLOC)
220 – #if defined(__GLIBC__)
221 –        // this is known to work only with GNU libc
222 –        free(p);
223 – #endif
224 – #else
225 –        free(p);
226 – #endif
227 – }
228 –
182   sheepshaver_cpu::sheepshaver_cpu()
183          : powerpc_cpu(enable_jit_p())
184   {
# Line 274 | Line 227 | void sheepshaver_cpu::execute_emul_op(ui
227          for (int i = 0; i < 7; i++)
228                  r68.a[i] = gpr(16 + i);
229          r68.a[7] = gpr(1);
230 <        uint32 saved_cr = get_cr() & CR_field<2>::mask();
230 >        uint32 saved_cr = get_cr() & 0xff9fffff; // mask_operand::compute(11, 8)
231          uint32 saved_xer = get_xer();
232          EmulOp(&r68, gpr(24), emul_op);
233          set_cr(saved_cr);
# Line 318 | Line 271 | void sheepshaver_cpu::execute_sheep(uint
271   }
272  
273   // Compile one instruction
274 + #if PPC_ENABLE_JIT
275   int sheepshaver_cpu::compile1(codegen_context_t & cg_context)
276   {
323 – #if PPC_ENABLE_JIT
277          const instr_info_t *ii = cg_context.instr_info;
278          if (ii->mnemo != PPC_I(SHEEP))
279                  return COMPILE_FAILURE;
# Line 466 | Line 419 | int sheepshaver_cpu::compile1(codegen_co
419          }
420          }
421          return status;
469 – #endif
470 –        return COMPILE_FAILURE;
422   }
472 –
473 – // CPU context to preserve on interrupt
474 – sheepshaver_cpu::interrupt_context::interrupt_context(sheepshaver_cpu *_cpu, const char *_where)
475 – {
476 – #if SAFE_INTERRUPT_PPC >= 2
477 –        cpu = _cpu;
478 –        where = _where;
479 –
480 –        // Save interrupt context
481 –        memcpy(&gpr[0], &cpu->gpr(0), sizeof(gpr));
482 –        pc = cpu->pc();
483 –        lr = cpu->lr();
484 –        ctr = cpu->ctr();
485 –        cr = cpu->get_cr();
486 –        xer = cpu->get_xer();
487 – #endif
488 – }
489 –
490 – sheepshaver_cpu::interrupt_context::~interrupt_context()
491 – {
492 – #if SAFE_INTERRUPT_PPC >= 2
493 –        // Check whether CPU context was preserved by interrupt
494 –        if (memcmp(&gpr[0], &cpu->gpr(0), sizeof(gpr)) != 0) {
495 –                printf("FATAL: %s: interrupt clobbers registers\n", where);
496 –                for (int i = 0; i < 32; i++)
497 –                        if (gpr[i] != cpu->gpr(i))
498 –                                printf(" r%d: %08x -> %08x\n", i, gpr[i], cpu->gpr(i));
499 –        }
500 –        if (pc != cpu->pc())
501 –                printf("FATAL: %s: interrupt clobbers PC\n", where);
502 –        if (lr != cpu->lr())
503 –                printf("FATAL: %s: interrupt clobbers LR\n", where);
504 –        if (ctr != cpu->ctr())
505 –                printf("FATAL: %s: interrupt clobbers CTR\n", where);
506 –        if (cr != cpu->get_cr())
507 –                printf("FATAL: %s: interrupt clobbers CR\n", where);
508 –        if (xer != cpu->get_xer())
509 –                printf("FATAL: %s: interrupt clobbers XER\n", where);
423   #endif
511 – }
424  
425   // Handle MacOS interrupt
426   void sheepshaver_cpu::interrupt(uint32 entry)
# Line 518 | Line 430 | void sheepshaver_cpu::interrupt(uint32 e
430          const clock_t interrupt_start = clock();
431   #endif
432  
521 – #if SAFE_INTERRUPT_PPC
522 –        static int depth = 0;
523 –        if (depth != 0)
524 –                printf("FATAL: sheepshaver_cpu::interrupt() called more than once: %d\n", depth);
525 –        depth++;
526 – #endif
527 –
433          // Save program counters and branch registers
434          uint32 saved_pc = pc();
435          uint32 saved_lr = lr();
# Line 578 | Line 483 | void sheepshaver_cpu::interrupt(uint32 e
483   #if EMUL_TIME_STATS
484          interrupt_time += (clock() - interrupt_start);
485   #endif
581 –
582 – #if SAFE_INTERRUPT_PPC
583 –        depth--;
584 – #endif
486   }
487  
488   // Execute 68k routine
# Line 812 | Line 713 | sigsegv_return_t sigsegv_handler(sigsegv
713          const uintptr addr = (uintptr)fault_address;
714   #if HAVE_SIGSEGV_SKIP_INSTRUCTION
715          // Ignore writes to ROM
716 <        if ((addr - ROM_BASE) < ROM_SIZE)
716 >        if ((addr - (uintptr)ROMBaseHost) < ROM_SIZE)
717                  return SIGSEGV_RETURN_SKIP_INSTRUCTION;
718  
719          // Get program counter of target CPU
# Line 859 | Line 760 | sigsegv_return_t sigsegv_handler(sigsegv
760   #error "FIXME: You don't have the capability to skip instruction within signal handlers"
761   #endif
762  
763 <        printf("SIGSEGV\n");
764 <        printf("  pc %p\n", fault_instruction);
765 <        printf("  ea %p\n", fault_address);
763 >        fprintf(stderr, "SIGSEGV\n");
764 >        fprintf(stderr, "  pc %p\n", fault_instruction);
765 >        fprintf(stderr, "  ea %p\n", fault_address);
766          dump_registers();
767          ppc_cpu->dump_log();
768          enter_mon();
# Line 872 | Line 773 | sigsegv_return_t sigsegv_handler(sigsegv
773  
774   void init_emul_ppc(void)
775   {
776 +        // Get pointer to KernelData in host address space
777 +        kernel_data = (KernelData *)Mac2HostAddr(KERNEL_DATA_BASE);
778 +
779          // Initialize main CPU emulator
780          ppc_cpu = new sheepshaver_cpu();
781          ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
# Line 922 | Line 826 | void exit_emul_ppc(void)
826   #endif
827  
828          delete ppc_cpu;
829 +        ppc_cpu = NULL;
830   }
831  
832   #if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
# Line 969 | Line 874 | void emul_ppc(uint32 entry)
874  
875   void TriggerInterrupt(void)
876   {
877 +        idle_resume();
878   #if 0
879    WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1);
880   #else
# Line 978 | Line 884 | void TriggerInterrupt(void)
884   #endif
885   }
886  
887 < void sheepshaver_cpu::handle_interrupt(void)
887 > void HandleInterrupt(powerpc_registers *r)
888   {
889   #ifdef USE_SDL_VIDEO
890          // We must fill in the events queue in the same thread that did call SDL_SetVideoMode()
# Line 989 | Line 895 | void sheepshaver_cpu::handle_interrupt(v
895          if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0)
896                  return;
897  
898 <        // Current interrupt nest level
993 <        static int interrupt_depth = 0;
994 <        ++interrupt_depth;
898 >        // Update interrupt count
899   #if EMUL_TIME_STATS
900          interrupt_count++;
901   #endif
902  
999 –        // Disable MacOS stack sniffer
1000 –        WriteMacInt32(0x110, 0);
1001 –
903          // Interrupt action depends on current run mode
904          switch (ReadMacInt32(XLM_RUN_MODE)) {
905          case MODE_68K:
906                  // 68k emulator active, trigger 68k interrupt level 1
907                  WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
908 <                set_cr(get_cr() | tswap32(kernel_data->v[0x674 >> 2]));
908 >                r->cr.set(r->cr.get() | tswap32(kernel_data->v[0x674 >> 2]));
909                  break;
910      
911   #if INTERRUPTS_IN_NATIVE_MODE
912          case MODE_NATIVE:
913                  // 68k emulator inactive, in nanokernel?
914 <                if (gpr(1) != KernelDataAddr && interrupt_depth == 1) {
1014 <                        interrupt_context ctx(this, "PowerPC mode");
914 >                if (r->gpr[1] != KernelDataAddr) {
915  
916                          // Prepare for 68k interrupt level 1
917                          WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
# Line 1033 | Line 933 | void sheepshaver_cpu::handle_interrupt(v
933          case MODE_EMUL_OP:
934                  // 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0
935                  if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) {
1036 –                        interrupt_context ctx(this, "68k mode");
936   #if EMUL_TIME_STATS
937                          const clock_t interrupt_start = clock();
938   #endif
# Line 1042 | Line 941 | void sheepshaver_cpu::handle_interrupt(v
941                          M68kRegisters r;
942                          uint32 old_r25 = ReadMacInt32(XLM_68K_R25);     // Save interrupt level
943                          WriteMacInt32(XLM_68K_R25, 0x21);                       // Execute with interrupt level 1
944 <                        static const uint8 proc[] = {
944 >                        static const uint8 proc_template[] = {
945                                  0x3f, 0x3c, 0x00, 0x00,                 // move.w       #$0000,-(sp)    (fake format word)
946                                  0x48, 0x7a, 0x00, 0x0a,                 // pea          @1(pc)                  (return address)
947                                  0x40, 0xe7,                                             // move         sr,-(sp)                (saved SR)
# Line 1050 | Line 949 | void sheepshaver_cpu::handle_interrupt(v
949                                  0x4e, 0xd0,                                             // jmp          (a0)
950                                  M68K_RTS >> 8, M68K_RTS & 0xff  // @1
951                          };
952 <                        Execute68k((uint32)proc, &r);
952 >                        BUILD_SHEEPSHAVER_PROCEDURE(proc);
953 >                        Execute68k(proc, &r);
954                          WriteMacInt32(XLM_68K_R25, old_r25);            // Restore interrupt level
955   #else
956                          // Only update cursor
# Line 1069 | Line 969 | void sheepshaver_cpu::handle_interrupt(v
969                  break;
970   #endif
971          }
1072 –
1073 –        // We are done with this interrupt
1074 –        --interrupt_depth;
972   }
973  
974   static void get_resource(void);
# Line 1099 | Line 996 | void sheepshaver_cpu::execute_native_op(
996                  VideoVBL();
997                  break;
998          case NATIVE_VIDEO_DO_DRIVER_IO:
999 <                gpr(3) = (int32)(int16)VideoDoDriverIO((void *)gpr(3), (void *)gpr(4),
1000 <                                                                                           (void *)gpr(5), gpr(6), gpr(7));
999 >                gpr(3) = (int32)(int16)VideoDoDriverIO(gpr(3), gpr(4), gpr(5), gpr(6), gpr(7));
1000 >                break;
1001 >        case NATIVE_ETHER_AO_GET_HWADDR:
1002 >                AO_get_ethernet_address(gpr(3));
1003 >                break;
1004 >        case NATIVE_ETHER_AO_ADD_MULTI:
1005 >                AO_enable_multicast(gpr(3));
1006 >                break;
1007 >        case NATIVE_ETHER_AO_DEL_MULTI:
1008 >                AO_disable_multicast(gpr(3));
1009 >                break;
1010 >        case NATIVE_ETHER_AO_SEND_PACKET:
1011 >                AO_transmit_packet(gpr(3));
1012                  break;
1105 – #ifdef WORDS_BIGENDIAN
1013          case NATIVE_ETHER_IRQ:
1014                  EtherIRQ();
1015                  break;
# Line 1124 | Line 1031 | void sheepshaver_cpu::execute_native_op(
1031          case NATIVE_ETHER_RSRV:
1032                  gpr(3) = ether_rsrv((queue_t *)gpr(3));
1033                  break;
1127 – #else
1128 –        case NATIVE_ETHER_INIT:
1129 –                // FIXME: needs more complicated thunks
1130 –                gpr(3) = false;
1131 –                break;
1132 – #endif
1034          case NATIVE_SYNC_HOOK:
1035                  gpr(3) = NQD_sync_hook(gpr(3));
1036                  break;
# Line 1185 | Line 1086 | void sheepshaver_cpu::execute_native_op(
1086                  break;
1087          }
1088          case NATIVE_MAKE_EXECUTABLE:
1089 <                MakeExecutable(0, (void *)gpr(4), gpr(5));
1089 >                MakeExecutable(0, gpr(4), gpr(5));
1090                  break;
1091          case NATIVE_CHECK_LOAD_INVOC:
1092                  check_load_invoc(gpr(3), gpr(4), gpr(5));

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