1 |
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/* |
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* sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface |
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* |
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< |
* SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig |
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> |
* SheepShaver (C) 1997-2005 Christian Bauer and Marc Hellwig |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License as published by |
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#include <stdio.h> |
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#include <stdlib.h> |
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#ifdef HAVE_MALLOC_H |
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#include <malloc.h> |
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#endif |
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|
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#ifdef USE_SDL_VIDEO |
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#include <SDL_events.h> |
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#endif |
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|
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#if ENABLE_MON |
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#include "mon.h" |
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#include "debug.h" |
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|
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// Emulation time statistics |
62 |
< |
#define EMUL_TIME_STATS 1 |
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> |
#ifndef EMUL_TIME_STATS |
63 |
> |
#define EMUL_TIME_STATS 0 |
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> |
#endif |
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|
66 |
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#if EMUL_TIME_STATS |
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static clock_t emul_start_time; |
68 |
< |
static uint32 interrupt_count = 0; |
68 |
> |
static uint32 interrupt_count = 0, ppc_interrupt_count = 0; |
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static clock_t interrupt_time = 0; |
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static uint32 exec68k_count = 0; |
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static clock_t exec68k_time = 0; |
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// PowerPC EmulOp to exit from emulation looop |
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const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1; |
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|
87 |
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// Enable interrupt routine safety checks? |
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#define SAFE_INTERRUPT_PPC 1 |
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|
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// Enable Execute68k() safety checks? |
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#define SAFE_EXEC_68K 1 |
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|
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// Interrupts in native mode? |
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#define INTERRUPTS_IN_NATIVE_MODE 1 |
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|
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// Enable native EMUL_OPs to be run without a mode switch |
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#define ENABLE_NATIVE_EMUL_OP 1 |
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|
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// Pointer to Kernel Data |
109 |
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static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE; |
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> |
static KernelData * kernel_data; |
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|
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// SIGSEGV handler |
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static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t); |
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> |
sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t); |
113 |
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|
114 |
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#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT |
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// Special trampolines for EmulOp and NativeOp |
139 |
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void init_decoder(); |
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void execute_sheep(uint32 opcode); |
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|
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// Filter out EMUL_OP routines that only call native code |
140 |
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bool filter_execute_emul_op(uint32 emul_op); |
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|
142 |
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// "Native" EMUL_OP routines |
143 |
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void execute_emul_op_microseconds(); |
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void execute_emul_op_idle_time_1(); |
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void execute_emul_op_idle_time_2(); |
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|
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// CPU context to preserve on interrupt |
148 |
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class interrupt_context { |
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uint32 gpr[32]; |
150 |
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uint32 pc; |
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uint32 lr; |
152 |
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uint32 ctr; |
153 |
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uint32 cr; |
154 |
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uint32 xer; |
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sheepshaver_cpu *cpu; |
156 |
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const char *where; |
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public: |
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interrupt_context(sheepshaver_cpu *_cpu, const char *_where); |
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~interrupt_context(); |
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}; |
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|
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public: |
143 |
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|
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// Constructor |
165 |
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// Execute MacOS/PPC code |
166 |
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uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args); |
167 |
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|
168 |
+ |
#if PPC_ENABLE_JIT |
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// Compile one instruction |
170 |
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virtual int compile1(codegen_context_t & cg_context); |
171 |
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|
171 |
> |
#endif |
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// Resource manager thunk |
173 |
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void get_resource(uint32 old_get_resource); |
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|
175 |
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// Handle MacOS interrupt |
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void interrupt(uint32 entry); |
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void handle_interrupt(); |
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|
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// Make sure the SIGSEGV handler can access CPU registers |
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friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t); |
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}; |
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|
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// Memory allocator returning areas aligned on 16-byte boundaries |
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void *operator new(size_t size) |
204 |
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{ |
205 |
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void *p; |
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|
207 |
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#if defined(HAVE_POSIX_MEMALIGN) |
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if (posix_memalign(&p, 16, size) != 0) |
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throw std::bad_alloc(); |
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#elif defined(HAVE_MEMALIGN) |
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p = memalign(16, size); |
212 |
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#elif defined(HAVE_VALLOC) |
213 |
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p = valloc(size); // page-aligned! |
214 |
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#else |
215 |
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/* XXX: handle padding ourselves */ |
216 |
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p = malloc(size); |
217 |
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#endif |
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|
219 |
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return p; |
220 |
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} |
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|
222 |
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void operator delete(void *p) |
223 |
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{ |
224 |
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#if defined(HAVE_MEMALIGN) || defined(HAVE_VALLOC) |
225 |
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#if defined(__GLIBC__) |
226 |
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// this is known to work only with GNU libc |
227 |
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free(p); |
228 |
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#endif |
229 |
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#else |
230 |
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free(p); |
231 |
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#endif |
232 |
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} |
233 |
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|
182 |
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sheepshaver_cpu::sheepshaver_cpu() |
183 |
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: powerpc_cpu(enable_jit_p()) |
184 |
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{ |
216 |
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typedef bit_field< 20, 25 > NATIVE_OP_field; |
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typedef bit_field< 26, 31 > EMUL_OP_field; |
218 |
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|
271 |
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// "Native" EMUL_OP routines |
272 |
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#define GPR_A(REG) gpr(16 + (REG)) |
273 |
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#define GPR_D(REG) gpr( 8 + (REG)) |
274 |
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|
275 |
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void sheepshaver_cpu::execute_emul_op_microseconds() |
276 |
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{ |
277 |
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Microseconds(GPR_A(0), GPR_D(0)); |
278 |
– |
} |
279 |
– |
|
280 |
– |
void sheepshaver_cpu::execute_emul_op_idle_time_1() |
281 |
– |
{ |
282 |
– |
// Sleep if no events pending |
283 |
– |
if (ReadMacInt32(0x14c) == 0) |
284 |
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Delay_usec(16667); |
285 |
– |
GPR_A(0) = ReadMacInt32(0x2b6); |
286 |
– |
} |
287 |
– |
|
288 |
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void sheepshaver_cpu::execute_emul_op_idle_time_2() |
289 |
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{ |
290 |
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// Sleep if no events pending |
291 |
– |
if (ReadMacInt32(0x14c) == 0) |
292 |
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Delay_usec(16667); |
293 |
– |
GPR_D(0) = (uint32)-2; |
294 |
– |
} |
295 |
– |
|
296 |
– |
// Filter out EMUL_OP routines that only call native code |
297 |
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bool sheepshaver_cpu::filter_execute_emul_op(uint32 emul_op) |
298 |
– |
{ |
299 |
– |
switch (emul_op) { |
300 |
– |
case OP_MICROSECONDS: |
301 |
– |
execute_emul_op_microseconds(); |
302 |
– |
return true; |
303 |
– |
case OP_IDLE_TIME: |
304 |
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execute_emul_op_idle_time_1(); |
305 |
– |
return true; |
306 |
– |
case OP_IDLE_TIME_2: |
307 |
– |
execute_emul_op_idle_time_2(); |
308 |
– |
return true; |
309 |
– |
} |
310 |
– |
return false; |
311 |
– |
} |
312 |
– |
|
219 |
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// Execute EMUL_OP routine |
220 |
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void sheepshaver_cpu::execute_emul_op(uint32 emul_op) |
221 |
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{ |
316 |
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#if ENABLE_NATIVE_EMUL_OP |
317 |
– |
// First, filter out EMUL_OPs that can be executed without a mode switch |
318 |
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if (filter_execute_emul_op(emul_op)) |
319 |
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return; |
320 |
– |
#endif |
321 |
– |
|
222 |
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M68kRegisters r68; |
223 |
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WriteMacInt32(XLM_68K_R25, gpr(25)); |
224 |
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WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP); |
227 |
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for (int i = 0; i < 7; i++) |
228 |
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r68.a[i] = gpr(16 + i); |
229 |
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r68.a[7] = gpr(1); |
230 |
< |
uint32 saved_cr = get_cr() & CR_field<2>::mask(); |
230 |
> |
uint32 saved_cr = get_cr() & 0xff9fffff; // mask_operand::compute(11, 8) |
231 |
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uint32 saved_xer = get_xer(); |
232 |
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EmulOp(&r68, gpr(24), emul_op); |
233 |
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set_cr(saved_cr); |
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} |
272 |
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|
273 |
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// Compile one instruction |
274 |
+ |
#if PPC_ENABLE_JIT |
275 |
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int sheepshaver_cpu::compile1(codegen_context_t & cg_context) |
276 |
|
{ |
376 |
– |
#if PPC_ENABLE_JIT |
277 |
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const instr_info_t *ii = cg_context.instr_info; |
278 |
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if (ii->mnemo != PPC_I(SHEEP)) |
279 |
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return COMPILE_FAILURE; |
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status = COMPILE_CODE_OK; |
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break; |
346 |
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#endif |
447 |
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case NATIVE_DISABLE_INTERRUPT: |
448 |
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dg.gen_invoke(DisableInterrupt); |
449 |
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status = COMPILE_CODE_OK; |
450 |
– |
break; |
451 |
– |
case NATIVE_ENABLE_INTERRUPT: |
452 |
– |
dg.gen_invoke(EnableInterrupt); |
453 |
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status = COMPILE_CODE_OK; |
454 |
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break; |
347 |
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case NATIVE_BITBLT: |
348 |
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dg.gen_load_T0_GPR(3); |
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dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt); |
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|
401 |
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default: { // EMUL_OP |
402 |
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uint32 emul_op = EMUL_OP_field::extract(opcode) - 3; |
511 |
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#if ENABLE_NATIVE_EMUL_OP |
512 |
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typedef void (*emul_op_func_t)(dyngen_cpu_base); |
513 |
– |
emul_op_func_t emul_op_func = 0; |
514 |
– |
switch (emul_op) { |
515 |
– |
case OP_MICROSECONDS: |
516 |
– |
emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_microseconds).ptr(); |
517 |
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break; |
518 |
– |
case OP_IDLE_TIME: |
519 |
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emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_1).ptr(); |
520 |
– |
break; |
521 |
– |
case OP_IDLE_TIME_2: |
522 |
– |
emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_2).ptr(); |
523 |
– |
break; |
524 |
– |
} |
525 |
– |
if (emul_op_func) { |
526 |
– |
dg.gen_invoke_CPU(emul_op_func); |
527 |
– |
cg_context.done_compile = false; |
528 |
– |
status = COMPILE_CODE_OK; |
529 |
– |
break; |
530 |
– |
} |
531 |
– |
#endif |
403 |
|
#if PPC_REENTRANT_JIT |
404 |
|
// Try to execute EmulOp trampoline |
405 |
|
dg.gen_set_PC_im(cg_context.pc + 4); |
419 |
|
} |
420 |
|
} |
421 |
|
return status; |
551 |
– |
#endif |
552 |
– |
return COMPILE_FAILURE; |
422 |
|
} |
554 |
– |
|
555 |
– |
// CPU context to preserve on interrupt |
556 |
– |
sheepshaver_cpu::interrupt_context::interrupt_context(sheepshaver_cpu *_cpu, const char *_where) |
557 |
– |
{ |
558 |
– |
#if SAFE_INTERRUPT_PPC >= 2 |
559 |
– |
cpu = _cpu; |
560 |
– |
where = _where; |
561 |
– |
|
562 |
– |
// Save interrupt context |
563 |
– |
memcpy(&gpr[0], &cpu->gpr(0), sizeof(gpr)); |
564 |
– |
pc = cpu->pc(); |
565 |
– |
lr = cpu->lr(); |
566 |
– |
ctr = cpu->ctr(); |
567 |
– |
cr = cpu->get_cr(); |
568 |
– |
xer = cpu->get_xer(); |
423 |
|
#endif |
570 |
– |
} |
571 |
– |
|
572 |
– |
sheepshaver_cpu::interrupt_context::~interrupt_context() |
573 |
– |
{ |
574 |
– |
#if SAFE_INTERRUPT_PPC >= 2 |
575 |
– |
// Check whether CPU context was preserved by interrupt |
576 |
– |
if (memcmp(&gpr[0], &cpu->gpr(0), sizeof(gpr)) != 0) { |
577 |
– |
printf("FATAL: %s: interrupt clobbers registers\n", where); |
578 |
– |
for (int i = 0; i < 32; i++) |
579 |
– |
if (gpr[i] != cpu->gpr(i)) |
580 |
– |
printf(" r%d: %08x -> %08x\n", i, gpr[i], cpu->gpr(i)); |
581 |
– |
} |
582 |
– |
if (pc != cpu->pc()) |
583 |
– |
printf("FATAL: %s: interrupt clobbers PC\n", where); |
584 |
– |
if (lr != cpu->lr()) |
585 |
– |
printf("FATAL: %s: interrupt clobbers LR\n", where); |
586 |
– |
if (ctr != cpu->ctr()) |
587 |
– |
printf("FATAL: %s: interrupt clobbers CTR\n", where); |
588 |
– |
if (cr != cpu->get_cr()) |
589 |
– |
printf("FATAL: %s: interrupt clobbers CR\n", where); |
590 |
– |
if (xer != cpu->get_xer()) |
591 |
– |
printf("FATAL: %s: interrupt clobbers XER\n", where); |
592 |
– |
#endif |
593 |
– |
} |
424 |
|
|
425 |
|
// Handle MacOS interrupt |
426 |
|
void sheepshaver_cpu::interrupt(uint32 entry) |
427 |
|
{ |
428 |
|
#if EMUL_TIME_STATS |
429 |
< |
interrupt_count++; |
429 |
> |
ppc_interrupt_count++; |
430 |
|
const clock_t interrupt_start = clock(); |
431 |
|
#endif |
432 |
|
|
603 |
– |
#if SAFE_INTERRUPT_PPC |
604 |
– |
static int depth = 0; |
605 |
– |
if (depth != 0) |
606 |
– |
printf("FATAL: sheepshaver_cpu::interrupt() called more than once: %d\n", depth); |
607 |
– |
depth++; |
608 |
– |
#endif |
609 |
– |
|
433 |
|
// Save program counters and branch registers |
434 |
|
uint32 saved_pc = pc(); |
435 |
|
uint32 saved_lr = lr(); |
483 |
|
#if EMUL_TIME_STATS |
484 |
|
interrupt_time += (clock() - interrupt_start); |
485 |
|
#endif |
663 |
– |
|
664 |
– |
#if SAFE_INTERRUPT_PPC |
665 |
– |
depth--; |
666 |
– |
#endif |
486 |
|
} |
487 |
|
|
488 |
|
// Execute 68k routine |
701 |
|
* Initialize CPU emulation |
702 |
|
*/ |
703 |
|
|
704 |
< |
static sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction) |
704 |
> |
sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction) |
705 |
|
{ |
706 |
|
#if ENABLE_VOSF |
707 |
|
// Handle screen fault |
713 |
|
const uintptr addr = (uintptr)fault_address; |
714 |
|
#if HAVE_SIGSEGV_SKIP_INSTRUCTION |
715 |
|
// Ignore writes to ROM |
716 |
< |
if ((addr - ROM_BASE) < ROM_SIZE) |
716 |
> |
if ((addr - (uintptr)ROMBaseHost) < ROM_SIZE) |
717 |
|
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
718 |
|
|
719 |
|
// Get program counter of target CPU |
721 |
|
const uint32 pc = cpu->pc(); |
722 |
|
|
723 |
|
// Fault in Mac ROM or RAM? |
724 |
< |
bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize)); |
724 |
> |
bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize)) || (pc >= DR_CACHE_BASE && pc < (DR_CACHE_BASE + DR_CACHE_SIZE)); |
725 |
|
if (mac_fault) { |
726 |
|
|
727 |
|
// "VM settings" during MacOS 8 installation |
741 |
|
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
742 |
|
else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000)) |
743 |
|
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
744 |
+ |
|
745 |
+ |
// MacOS 8.6 serial drivers on startup (with DR Cache and OldWorld ROM) |
746 |
+ |
else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(16) == 0xf3012002 || cpu->gpr(16) == 0xf3012000)) |
747 |
+ |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
748 |
+ |
else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000)) |
749 |
+ |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
750 |
|
|
751 |
|
// Ignore writes to the zero page |
752 |
|
else if ((uint32)(addr - SheepMem::ZeroPage()) < (uint32)SheepMem::PageSize()) |
760 |
|
#error "FIXME: You don't have the capability to skip instruction within signal handlers" |
761 |
|
#endif |
762 |
|
|
763 |
< |
printf("SIGSEGV\n"); |
764 |
< |
printf(" pc %p\n", fault_instruction); |
765 |
< |
printf(" ea %p\n", fault_address); |
763 |
> |
fprintf(stderr, "SIGSEGV\n"); |
764 |
> |
fprintf(stderr, " pc %p\n", fault_instruction); |
765 |
> |
fprintf(stderr, " ea %p\n", fault_address); |
766 |
|
dump_registers(); |
767 |
|
ppc_cpu->dump_log(); |
768 |
|
enter_mon(); |
773 |
|
|
774 |
|
void init_emul_ppc(void) |
775 |
|
{ |
776 |
+ |
// Get pointer to KernelData in host address space |
777 |
+ |
kernel_data = (KernelData *)Mac2HostAddr(KERNEL_DATA_BASE); |
778 |
+ |
|
779 |
|
// Initialize main CPU emulator |
780 |
|
ppc_cpu = new sheepshaver_cpu(); |
781 |
|
ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000)); |
782 |
|
ppc_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000)); |
783 |
|
WriteMacInt32(XLM_RUN_MODE, MODE_68K); |
784 |
|
|
957 |
– |
// Install the handler for SIGSEGV |
958 |
– |
sigsegv_install_handler(sigsegv_handler); |
959 |
– |
|
785 |
|
#if ENABLE_MON |
786 |
|
// Install "regs" command in cxmon |
787 |
|
mon_add_command("regs", dump_registers, "regs Dump PowerPC registers\n"); |
807 |
|
printf("Total emulation time : %.1f sec\n", double(emul_time) / double(CLOCKS_PER_SEC)); |
808 |
|
printf("Total interrupt count: %d (%2.1f Hz)\n", interrupt_count, |
809 |
|
(double(interrupt_count) * CLOCKS_PER_SEC) / double(emul_time)); |
810 |
+ |
printf("Total ppc interrupt count: %d (%2.1f %%)\n", ppc_interrupt_count, |
811 |
+ |
(double(ppc_interrupt_count) * 100.0) / double(interrupt_count)); |
812 |
|
|
813 |
|
#define PRINT_STATS(LABEL, VAR_PREFIX) do { \ |
814 |
|
printf("Total " LABEL " count : %d\n", VAR_PREFIX##_count); \ |
826 |
|
#endif |
827 |
|
|
828 |
|
delete ppc_cpu; |
829 |
+ |
ppc_cpu = NULL; |
830 |
|
} |
831 |
|
|
832 |
|
#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT |
874 |
|
|
875 |
|
void TriggerInterrupt(void) |
876 |
|
{ |
877 |
+ |
idle_resume(); |
878 |
|
#if 0 |
879 |
|
WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1); |
880 |
|
#else |
884 |
|
#endif |
885 |
|
} |
886 |
|
|
887 |
< |
void sheepshaver_cpu::handle_interrupt(void) |
887 |
> |
void HandleInterrupt(powerpc_registers *r) |
888 |
|
{ |
889 |
< |
// Do nothing if interrupts are disabled |
890 |
< |
if (*(int32 *)XLM_IRQ_NEST > 0) |
891 |
< |
return; |
889 |
> |
#ifdef USE_SDL_VIDEO |
890 |
> |
// We must fill in the events queue in the same thread that did call SDL_SetVideoMode() |
891 |
> |
SDL_PumpEvents(); |
892 |
> |
#endif |
893 |
|
|
894 |
< |
// Do nothing if there is no interrupt pending |
895 |
< |
if (InterruptFlags == 0) |
894 |
> |
// Do nothing if interrupts are disabled |
895 |
> |
if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0) |
896 |
|
return; |
897 |
|
|
898 |
< |
// Current interrupt nest level |
899 |
< |
static int interrupt_depth = 0; |
900 |
< |
++interrupt_depth; |
901 |
< |
|
1072 |
< |
// Disable MacOS stack sniffer |
1073 |
< |
WriteMacInt32(0x110, 0); |
898 |
> |
// Update interrupt count |
899 |
> |
#if EMUL_TIME_STATS |
900 |
> |
interrupt_count++; |
901 |
> |
#endif |
902 |
|
|
903 |
|
// Interrupt action depends on current run mode |
904 |
|
switch (ReadMacInt32(XLM_RUN_MODE)) { |
905 |
|
case MODE_68K: |
906 |
|
// 68k emulator active, trigger 68k interrupt level 1 |
907 |
|
WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1); |
908 |
< |
set_cr(get_cr() | tswap32(kernel_data->v[0x674 >> 2])); |
908 |
> |
r->cr.set(r->cr.get() | tswap32(kernel_data->v[0x674 >> 2])); |
909 |
|
break; |
910 |
|
|
911 |
|
#if INTERRUPTS_IN_NATIVE_MODE |
912 |
|
case MODE_NATIVE: |
913 |
|
// 68k emulator inactive, in nanokernel? |
914 |
< |
if (gpr(1) != KernelDataAddr && interrupt_depth == 1) { |
1087 |
< |
interrupt_context ctx(this, "PowerPC mode"); |
914 |
> |
if (r->gpr[1] != KernelDataAddr) { |
915 |
|
|
916 |
|
// Prepare for 68k interrupt level 1 |
917 |
|
WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1); |
933 |
|
case MODE_EMUL_OP: |
934 |
|
// 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0 |
935 |
|
if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) { |
936 |
< |
interrupt_context ctx(this, "68k mode"); |
936 |
> |
#if EMUL_TIME_STATS |
937 |
> |
const clock_t interrupt_start = clock(); |
938 |
> |
#endif |
939 |
|
#if 1 |
940 |
|
// Execute full 68k interrupt routine |
941 |
|
M68kRegisters r; |
942 |
|
uint32 old_r25 = ReadMacInt32(XLM_68K_R25); // Save interrupt level |
943 |
|
WriteMacInt32(XLM_68K_R25, 0x21); // Execute with interrupt level 1 |
944 |
< |
static const uint8 proc[] = { |
944 |
> |
static const uint8 proc_template[] = { |
945 |
|
0x3f, 0x3c, 0x00, 0x00, // move.w #$0000,-(sp) (fake format word) |
946 |
|
0x48, 0x7a, 0x00, 0x0a, // pea @1(pc) (return address) |
947 |
|
0x40, 0xe7, // move sr,-(sp) (saved SR) |
949 |
|
0x4e, 0xd0, // jmp (a0) |
950 |
|
M68K_RTS >> 8, M68K_RTS & 0xff // @1 |
951 |
|
}; |
952 |
< |
Execute68k((uint32)proc, &r); |
952 |
> |
BUILD_SHEEPSHAVER_PROCEDURE(proc); |
953 |
> |
Execute68k(proc, &r); |
954 |
|
WriteMacInt32(XLM_68K_R25, old_r25); // Restore interrupt level |
955 |
|
#else |
956 |
|
// Only update cursor |
962 |
|
} |
963 |
|
} |
964 |
|
#endif |
965 |
+ |
#if EMUL_TIME_STATS |
966 |
+ |
interrupt_time += (clock() - interrupt_start); |
967 |
+ |
#endif |
968 |
|
} |
969 |
|
break; |
970 |
|
#endif |
971 |
|
} |
1139 |
– |
|
1140 |
– |
// We are done with this interrupt |
1141 |
– |
--interrupt_depth; |
972 |
|
} |
973 |
|
|
974 |
|
static void get_resource(void); |
996 |
|
VideoVBL(); |
997 |
|
break; |
998 |
|
case NATIVE_VIDEO_DO_DRIVER_IO: |
999 |
< |
gpr(3) = (int32)(int16)VideoDoDriverIO((void *)gpr(3), (void *)gpr(4), |
1000 |
< |
(void *)gpr(5), gpr(6), gpr(7)); |
999 |
> |
gpr(3) = (int32)(int16)VideoDoDriverIO(gpr(3), gpr(4), gpr(5), gpr(6), gpr(7)); |
1000 |
> |
break; |
1001 |
> |
case NATIVE_ETHER_AO_GET_HWADDR: |
1002 |
> |
AO_get_ethernet_address(gpr(3)); |
1003 |
> |
break; |
1004 |
> |
case NATIVE_ETHER_AO_ADD_MULTI: |
1005 |
> |
AO_enable_multicast(gpr(3)); |
1006 |
> |
break; |
1007 |
> |
case NATIVE_ETHER_AO_DEL_MULTI: |
1008 |
> |
AO_disable_multicast(gpr(3)); |
1009 |
> |
break; |
1010 |
> |
case NATIVE_ETHER_AO_SEND_PACKET: |
1011 |
> |
AO_transmit_packet(gpr(3)); |
1012 |
|
break; |
1172 |
– |
#ifdef WORDS_BIGENDIAN |
1013 |
|
case NATIVE_ETHER_IRQ: |
1014 |
|
EtherIRQ(); |
1015 |
|
break; |
1031 |
|
case NATIVE_ETHER_RSRV: |
1032 |
|
gpr(3) = ether_rsrv((queue_t *)gpr(3)); |
1033 |
|
break; |
1194 |
– |
#else |
1195 |
– |
case NATIVE_ETHER_INIT: |
1196 |
– |
// FIXME: needs more complicated thunks |
1197 |
– |
gpr(3) = false; |
1198 |
– |
break; |
1199 |
– |
#endif |
1034 |
|
case NATIVE_SYNC_HOOK: |
1035 |
|
gpr(3) = NQD_sync_hook(gpr(3)); |
1036 |
|
break; |
1085 |
|
get_resource_callbacks[selector - NATIVE_GET_RESOURCE](); |
1086 |
|
break; |
1087 |
|
} |
1254 |
– |
case NATIVE_DISABLE_INTERRUPT: |
1255 |
– |
DisableInterrupt(); |
1256 |
– |
break; |
1257 |
– |
case NATIVE_ENABLE_INTERRUPT: |
1258 |
– |
EnableInterrupt(); |
1259 |
– |
break; |
1088 |
|
case NATIVE_MAKE_EXECUTABLE: |
1089 |
< |
MakeExecutable(0, (void *)gpr(4), gpr(5)); |
1089 |
> |
MakeExecutable(0, gpr(4), gpr(5)); |
1090 |
|
break; |
1091 |
|
case NATIVE_CHECK_LOAD_INVOC: |
1092 |
|
check_load_invoc(gpr(3), gpr(4), gpr(5)); |