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root/cebix/SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.39 by gbeauche, 2004-05-20T11:05:30Z vs.
Revision 1.67 by gbeauche, 2006-01-21T17:18:53Z

#	Line 1 | Line 1
1		/*
2		*  sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface
3		*
4	<	*  SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig
4	>	*  SheepShaver (C) 1997-2005 Christian Bauer and Marc Hellwig
5		*
6		*  This program is free software; you can redistribute it and/or modify
7		*  it under the terms of the GNU General Public License as published by
#	Line 42 | Line 42
42
43		#include <stdio.h>
44		#include <stdlib.h>
45	+	#ifdef HAVE_MALLOC_H
46	+	#include <malloc.h>
47	+	#endif
48	+
49	+	#ifdef USE_SDL_VIDEO
50	+	#include <SDL_events.h>
51	+	#endif
52
53		#if ENABLE_MON
54		#include "mon.h"
#	Line 52 | Line 59
59		#include "debug.h"
60
61		// Emulation time statistics
62	<	#define EMUL_TIME_STATS 1
62	>	#ifndef EMUL_TIME_STATS
63	>	#define EMUL_TIME_STATS 0
64	>	#endif
65
66		#if EMUL_TIME_STATS
67		static clock_t emul_start_time;
68	<	static uint32 interrupt_count = 0;
68	>	static uint32 interrupt_count = 0, ppc_interrupt_count = 0;
69		static clock_t interrupt_time = 0;
70		static uint32 exec68k_count = 0;
71		static clock_t exec68k_time = 0;
#	Line 84 | Line 93 | extern "C" void check_load_invoc(uint32
93		// PowerPC EmulOp to exit from emulation looop
94		const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1;
95
87	–	// Enable multicore (main/interrupts) cpu emulation?
88	–	#define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0)
89	–
90	–	// Enable interrupt routine safety checks?
91	–	#define SAFE_INTERRUPT_PPC 1
92	–
96		// Enable Execute68k() safety checks?
97		#define SAFE_EXEC_68K 1
98
#	Line 102 | Line 105 | const uint32 POWERPC_EXEC_RETURN = POWER
105		// Interrupts in native mode?
106		#define INTERRUPTS_IN_NATIVE_MODE 1
107
105	–	// Enable native EMUL_OPs to be run without a mode switch
106	–	#define ENABLE_NATIVE_EMUL_OP 1
107	–
108		// Pointer to Kernel Data
109	<	static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE;
109	>	static KernelData * kernel_data;
110
111		// SIGSEGV handler
112	<	static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
112	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
113
114		#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
115		// Special trampolines for EmulOp and NativeOp
#	Line 139 | Line 139 | class sheepshaver_cpu
139		void init_decoder();
140		void execute_sheep(uint32 opcode);
141
142	–	// Filter out EMUL_OP routines that only call native code
143	–	bool filter_execute_emul_op(uint32 emul_op);
144	–
145	–	// "Native" EMUL_OP routines
146	–	void execute_emul_op_microseconds();
147	–	void execute_emul_op_idle_time_1();
148	–	void execute_emul_op_idle_time_2();
149	–
150	–	// CPU context to preserve on interrupt
151	–	class interrupt_context {
152	–	uint32 gpr[32];
153	–	uint32 pc;
154	–	uint32 lr;
155	–	uint32 ctr;
156	–	uint32 cr;
157	–	uint32 xer;
158	–	sheepshaver_cpu *cpu;
159	–	const char *where;
160	–	public:
161	–	interrupt_context(sheepshaver_cpu *_cpu, const char *_where);
162	–	~interrupt_context();
163	–	};
164	–
142		public:
143
144		// Constructor
#	Line 188 | Line 165 | public:
165		// Execute MacOS/PPC code
166		uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args);
167
168	+	#if PPC_ENABLE_JIT
169		// Compile one instruction
170		virtual int compile1(codegen_context_t & cg_context);
171	<
171	>	#endif
172		// Resource manager thunk
173		void get_resource(uint32 old_get_resource);
174
175		// Handle MacOS interrupt
176		void interrupt(uint32 entry);
199	–	void handle_interrupt();
177
178		// Make sure the SIGSEGV handler can access CPU registers
179		friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
180		};
181
205	–	// Memory allocator returning areas aligned on 16-byte boundaries
206	–	void *operator new(size_t size)
207	–	{
208	–	void *p;
209	–
210	–	#if defined(HAVE_POSIX_MEMALIGN)
211	–	if (posix_memalign(&p, 16, size) != 0)
212	–	throw std::bad_alloc();
213	–	#elif defined(HAVE_MEMALIGN)
214	–	p = memalign(16, size);
215	–	#elif defined(HAVE_VALLOC)
216	–	p = valloc(size); // page-aligned!
217	–	#else
218	–	/* XXX: handle padding ourselves */
219	–	p = malloc(size);
220	–	#endif
221	–
222	–	return p;
223	–	}
224	–
225	–	void operator delete(void *p)
226	–	{
227	–	#if defined(HAVE_MEMALIGN) || defined(HAVE_VALLOC)
228	–	#if defined(__GLIBC__)
229	–	// this is known to work only with GNU libc
230	–	free(p);
231	–	#endif
232	–	#else
233	–	free(p);
234	–	#endif
235	–	}
236	–
182		sheepshaver_cpu::sheepshaver_cpu()
183		: powerpc_cpu(enable_jit_p())
184		{
#	Line 271 | Line 216 | typedef bit_field< 19, 19 > FN_field;
216		typedef bit_field< 20, 25 > NATIVE_OP_field;
217		typedef bit_field< 26, 31 > EMUL_OP_field;
218
274	–	// "Native" EMUL_OP routines
275	–	#define GPR_A(REG) gpr(16 + (REG))
276	–	#define GPR_D(REG) gpr( 8 + (REG))
277	–
278	–	void sheepshaver_cpu::execute_emul_op_microseconds()
279	–	{
280	–	Microseconds(GPR_A(0), GPR_D(0));
281	–	}
282	–
283	–	void sheepshaver_cpu::execute_emul_op_idle_time_1()
284	–	{
285	–	// Sleep if no events pending
286	–	if (ReadMacInt32(0x14c) == 0)
287	–	Delay_usec(16667);
288	–	GPR_A(0) = ReadMacInt32(0x2b6);
289	–	}
290	–
291	–	void sheepshaver_cpu::execute_emul_op_idle_time_2()
292	–	{
293	–	// Sleep if no events pending
294	–	if (ReadMacInt32(0x14c) == 0)
295	–	Delay_usec(16667);
296	–	GPR_D(0) = (uint32)-2;
297	–	}
298	–
299	–	// Filter out EMUL_OP routines that only call native code
300	–	bool sheepshaver_cpu::filter_execute_emul_op(uint32 emul_op)
301	–	{
302	–	switch (emul_op) {
303	–	case OP_MICROSECONDS:
304	–	execute_emul_op_microseconds();
305	–	return true;
306	–	case OP_IDLE_TIME:
307	–	execute_emul_op_idle_time_1();
308	–	return true;
309	–	case OP_IDLE_TIME_2:
310	–	execute_emul_op_idle_time_2();
311	–	return true;
312	–	}
313	–	return false;
314	–	}
315	–
219		// Execute EMUL_OP routine
220		void sheepshaver_cpu::execute_emul_op(uint32 emul_op)
221		{
319	–	#if ENABLE_NATIVE_EMUL_OP
320	–	// First, filter out EMUL_OPs that can be executed without a mode switch
321	–	if (filter_execute_emul_op(emul_op))
322	–	return;
323	–	#endif
324	–
222		M68kRegisters r68;
223		WriteMacInt32(XLM_68K_R25, gpr(25));
224		WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
#	Line 330 | Line 227 | void sheepshaver_cpu::execute_emul_op(ui
227		for (int i = 0; i < 7; i++)
228		r68.a[i] = gpr(16 + i);
229		r68.a[7] = gpr(1);
230	<	uint32 saved_cr = get_cr() & CR_field<2>::mask();
230	>	uint32 saved_cr = get_cr() & 0xff9fffff; // mask_operand::compute(11, 8)
231		uint32 saved_xer = get_xer();
232		EmulOp(&r68, gpr(24), emul_op);
233		set_cr(saved_cr);
#	Line 374 | Line 271 | void sheepshaver_cpu::execute_sheep(uint
271		}
272
273		// Compile one instruction
274	+	#if PPC_ENABLE_JIT
275		int sheepshaver_cpu::compile1(codegen_context_t & cg_context)
276		{
379	–	#if PPC_ENABLE_JIT
277		const instr_info_t *ii = cg_context.instr_info;
278		if (ii->mnemo != PPC_I(SHEEP))
279		return COMPILE_FAILURE;
#	Line 447 | Line 344 | int sheepshaver_cpu::compile1(codegen_co
344		status = COMPILE_CODE_OK;
345		break;
346		#endif
450	–	case NATIVE_DISABLE_INTERRUPT:
451	–	dg.gen_invoke(DisableInterrupt);
452	–	status = COMPILE_CODE_OK;
453	–	break;
454	–	case NATIVE_ENABLE_INTERRUPT:
455	–	dg.gen_invoke(EnableInterrupt);
456	–	status = COMPILE_CODE_OK;
457	–	break;
347		case NATIVE_BITBLT:
348		dg.gen_load_T0_GPR(3);
349		dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt);
#	Line 472 | Line 361 | int sheepshaver_cpu::compile1(codegen_co
361		break;
362		}
363		// Could we fully translate this NativeOp?
364	<	if (FN_field::test(opcode)) {
365	<	if (status != COMPILE_FAILURE) {
364	>	if (status == COMPILE_CODE_OK) {
365	>	if (!FN_field::test(opcode))
366	>	cg_context.done_compile = false;
367	>	else {
368		dg.gen_load_A0_LR();
369		dg.gen_set_PC_A0();
370	+	cg_context.done_compile = true;
371		}
480	–	cg_context.done_compile = true;
481	–	break;
482	–	}
483	–	else if (status != COMPILE_FAILURE) {
484	–	cg_context.done_compile = false;
372		break;
373		}
374		#if PPC_REENTRANT_JIT
375		// Try to execute NativeOp trampoline
376	<	dg.gen_set_PC_im(cg_context.pc + 4);
376	>	if (!FN_field::test(opcode))
377	>	dg.gen_set_PC_im(cg_context.pc + 4);
378	>	else {
379	>	dg.gen_load_A0_LR();
380	>	dg.gen_set_PC_A0();
381	>	}
382		dg.gen_mov_32_T0_im(selector);
383		dg.gen_jmp(native_op_trampoline);
384		cg_context.done_compile = true;
#	Line 494 | Line 386 | int sheepshaver_cpu::compile1(codegen_co
386		break;
387		#endif
388		// Invoke NativeOp handler
389	<	typedef void (*func_t)(dyngen_cpu_base, uint32);
390	<	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
391	<	dg.gen_invoke_CPU_im(func, selector);
392	<	cg_context.done_compile = false;
393	<	status = COMPILE_CODE_OK;
389	>	if (!FN_field::test(opcode)) {
390	>	typedef void (*func_t)(dyngen_cpu_base, uint32);
391	>	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
392	>	dg.gen_invoke_CPU_im(func, selector);
393	>	cg_context.done_compile = false;
394	>	status = COMPILE_CODE_OK;
395	>	}
396	>	// Otherwise, let it generate a call to execute_sheep() which
397	>	// will cause necessary updates to the program counter
398		break;
399		}
400
401		default: {      // EMUL_OP
402		uint32 emul_op = EMUL_OP_field::extract(opcode) - 3;
507	–	#if ENABLE_NATIVE_EMUL_OP
508	–	typedef void (*emul_op_func_t)(dyngen_cpu_base);
509	–	emul_op_func_t emul_op_func = 0;
510	–	switch (emul_op) {
511	–	case OP_MICROSECONDS:
512	–	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_microseconds).ptr();
513	–	break;
514	–	case OP_IDLE_TIME:
515	–	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_1).ptr();
516	–	break;
517	–	case OP_IDLE_TIME_2:
518	–	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_2).ptr();
519	–	break;
520	–	}
521	–	if (emul_op_func) {
522	–	dg.gen_invoke_CPU(emul_op_func);
523	–	cg_context.done_compile = false;
524	–	status = COMPILE_CODE_OK;
525	–	break;
526	–	}
527	–	#endif
403		#if PPC_REENTRANT_JIT
404		// Try to execute EmulOp trampoline
405		dg.gen_set_PC_im(cg_context.pc + 4);
#	Line 544 | Line 419 | int sheepshaver_cpu::compile1(codegen_co
419		}
420		}
421		return status;
547	–	#endif
548	–	return COMPILE_FAILURE;
549	–	}
550	–
551	–	// CPU context to preserve on interrupt
552	–	sheepshaver_cpu::interrupt_context::interrupt_context(sheepshaver_cpu *_cpu, const char *_where)
553	–	{
554	–	#if SAFE_INTERRUPT_PPC >= 2
555	–	cpu = _cpu;
556	–	where = _where;
557	–
558	–	// Save interrupt context
559	–	memcpy(&gpr[0], &cpu->gpr(0), sizeof(gpr));
560	–	pc = cpu->pc();
561	–	lr = cpu->lr();
562	–	ctr = cpu->ctr();
563	–	cr = cpu->get_cr();
564	–	xer = cpu->get_xer();
565	–	#endif
422		}
567	–
568	–	sheepshaver_cpu::interrupt_context::~interrupt_context()
569	–	{
570	–	#if SAFE_INTERRUPT_PPC >= 2
571	–	// Check whether CPU context was preserved by interrupt
572	–	if (memcmp(&gpr[0], &cpu->gpr(0), sizeof(gpr)) != 0) {
573	–	printf("FATAL: %s: interrupt clobbers registers\n", where);
574	–	for (int i = 0; i < 32; i++)
575	–	if (gpr[i] != cpu->gpr(i))
576	–	printf(" r%d: %08x -> %08x\n", i, gpr[i], cpu->gpr(i));
577	–	}
578	–	if (pc != cpu->pc())
579	–	printf("FATAL: %s: interrupt clobbers PC\n", where);
580	–	if (lr != cpu->lr())
581	–	printf("FATAL: %s: interrupt clobbers LR\n", where);
582	–	if (ctr != cpu->ctr())
583	–	printf("FATAL: %s: interrupt clobbers CTR\n", where);
584	–	if (cr != cpu->get_cr())
585	–	printf("FATAL: %s: interrupt clobbers CR\n", where);
586	–	if (xer != cpu->get_xer())
587	–	printf("FATAL: %s: interrupt clobbers XER\n", where);
423		#endif
589	–	}
424
425		// Handle MacOS interrupt
426		void sheepshaver_cpu::interrupt(uint32 entry)
427		{
428		#if EMUL_TIME_STATS
429	<	interrupt_count++;
429	>	ppc_interrupt_count++;
430		const clock_t interrupt_start = clock();
431		#endif
432
599	–	#if SAFE_INTERRUPT_PPC
600	–	static int depth = 0;
601	–	if (depth != 0)
602	–	printf("FATAL: sheepshaver_cpu::interrupt() called more than once: %d\n", depth);
603	–	depth++;
604	–	#endif
605	–
606	–	#if !MULTICORE_CPU
433		// Save program counters and branch registers
434		uint32 saved_pc = pc();
435		uint32 saved_lr = lr();
436		uint32 saved_ctr= ctr();
437		uint32 saved_sp = gpr(1);
612	–	#endif
438
439		// Initialize stack pointer to SheepShaver alternate stack base
440		gpr(1) = SignalStackBase() - 64;
#	Line 649 | Line 474 | void sheepshaver_cpu::interrupt(uint32 e
474		// Enter nanokernel
475		execute(entry);
476
652	–	#if !MULTICORE_CPU
477		// Restore program counters and branch registers
478		pc() = saved_pc;
479		lr() = saved_lr;
480		ctr()= saved_ctr;
481		gpr(1) = saved_sp;
658	–	#endif
482
483		#if EMUL_TIME_STATS
484		interrupt_time += (clock() - interrupt_start);
485		#endif
663	–
664	–	#if SAFE_INTERRUPT_PPC
665	–	depth--;
666	–	#endif
486		}
487
488		// Execute 68k routine
#	Line 857 | Line 676 | inline void sheepshaver_cpu::get_resourc
676		*              SheepShaver CPU engine interface
677		**/
678
679	<	static sheepshaver_cpu *main_cpu = NULL;                // CPU emulator to handle usual control flow
680	<	static sheepshaver_cpu *interrupt_cpu = NULL;   // CPU emulator to handle interrupts
862	<	static sheepshaver_cpu *current_cpu = NULL;             // Current CPU emulator context
679	>	// PowerPC CPU emulator
680	>	static sheepshaver_cpu *ppc_cpu = NULL;
681
682		void FlushCodeCache(uintptr start, uintptr end)
683		{
684		D(bug("FlushCodeCache(%08x, %08x)\n", start, end));
685	<	main_cpu->invalidate_cache_range(start, end);
868	<	#if MULTICORE_CPU
869	<	interrupt_cpu->invalidate_cache_range(start, end);
870	<	#endif
871	<	}
872	<
873	<	static inline void cpu_push(sheepshaver_cpu *new_cpu)
874	<	{
875	<	#if MULTICORE_CPU
876	<	current_cpu = new_cpu;
877	<	#endif
878	<	}
879	<
880	<	static inline void cpu_pop()
881	<	{
882	<	#if MULTICORE_CPU
883	<	current_cpu = main_cpu;
884	<	#endif
685	>	ppc_cpu->invalidate_cache_range(start, end);
686		}
687
688		// Dump PPC registers
689		static void dump_registers(void)
690		{
691	<	current_cpu->dump_registers();
691	>	ppc_cpu->dump_registers();
692		}
693
694		// Dump log
695		static void dump_log(void)
696		{
697	<	current_cpu->dump_log();
697	>	ppc_cpu->dump_log();
698		}
699
700		/*
701		*  Initialize CPU emulation
702		*/
703
704	<	static sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
704	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
705		{
706		#if ENABLE_VOSF
707		// Handle screen fault
#	Line 912 | Line 713 | static sigsegv_return_t sigsegv_handler(
713		const uintptr addr = (uintptr)fault_address;
714		#if HAVE_SIGSEGV_SKIP_INSTRUCTION
715		// Ignore writes to ROM
716	<	if ((addr - ROM_BASE) < ROM_SIZE)
716	>	if ((addr - (uintptr)ROMBaseHost) < ROM_SIZE)
717		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
718
719		// Get program counter of target CPU
720	<	sheepshaver_cpu * const cpu = current_cpu;
720	>	sheepshaver_cpu * const cpu = ppc_cpu;
721		const uint32 pc = cpu->pc();
722
723		// Fault in Mac ROM or RAM?
724	<	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize));
724	>	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize)) || (pc >= DR_CACHE_BASE && pc < (DR_CACHE_BASE + DR_CACHE_SIZE));
725		if (mac_fault) {
726
727		// "VM settings" during MacOS 8 installation
#	Line 940 | Line 741 | static sigsegv_return_t sigsegv_handler(
741		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
742		else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
743		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
744	+
745	+	// MacOS 8.6 serial drivers on startup (with DR Cache and OldWorld ROM)
746	+	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(16) == 0xf3012002 || cpu->gpr(16) == 0xf3012000))
747	+	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
748	+	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
749	+	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
750
751		// Ignore writes to the zero page
752		else if ((uint32)(addr - SheepMem::ZeroPage()) < (uint32)SheepMem::PageSize())
#	Line 953 | Line 760 | static sigsegv_return_t sigsegv_handler(
760		#error "FIXME: You don't have the capability to skip instruction within signal handlers"
761		#endif
762
763	<	printf("SIGSEGV\n");
764	<	printf("  pc %p\n", fault_instruction);
765	<	printf("  ea %p\n", fault_address);
959	<	printf(" cpu %s\n", current_cpu == main_cpu ? "main" : "interrupts");
763	>	fprintf(stderr, "SIGSEGV\n");
764	>	fprintf(stderr, "  pc %p\n", fault_instruction);
765	>	fprintf(stderr, "  ea %p\n", fault_address);
766		dump_registers();
767	<	current_cpu->dump_log();
767	>	ppc_cpu->dump_log();
768		enter_mon();
769		QuitEmulator();
770
#	Line 967 | Line 773 | static sigsegv_return_t sigsegv_handler(
773
774		void init_emul_ppc(void)
775		{
776	+	// Get pointer to KernelData in host address space
777	+	kernel_data = (KernelData *)Mac2HostAddr(KERNEL_DATA_BASE);
778	+
779		// Initialize main CPU emulator
780	<	main_cpu = new sheepshaver_cpu();
781	<	main_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
782	<	main_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
780	>	ppc_cpu = new sheepshaver_cpu();
781	>	ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
782	>	ppc_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
783		WriteMacInt32(XLM_RUN_MODE, MODE_68K);
784
976	–	#if MULTICORE_CPU
977	–	// Initialize alternate CPU emulator to handle interrupts
978	–	interrupt_cpu = new sheepshaver_cpu();
979	–	#endif
980	–
981	–	// Install the handler for SIGSEGV
982	–	sigsegv_install_handler(sigsegv_handler);
983	–
785		#if ENABLE_MON
786		// Install "regs" command in cxmon
787		mon_add_command("regs", dump_registers, "regs                     Dump PowerPC registers\n");
#	Line 1006 | Line 807 | void exit_emul_ppc(void)
807		printf("Total emulation time : %.1f sec\n", double(emul_time) / double(CLOCKS_PER_SEC));
808		printf("Total interrupt count: %d (%2.1f Hz)\n", interrupt_count,
809		(double(interrupt_count) * CLOCKS_PER_SEC) / double(emul_time));
810	+	printf("Total ppc interrupt count: %d (%2.1f %%)\n", ppc_interrupt_count,
811	+	(double(ppc_interrupt_count) * 100.0) / double(interrupt_count));
812
813		#define PRINT_STATS(LABEL, VAR_PREFIX) do {                                                             \
814		printf("Total " LABEL " count : %d\n", VAR_PREFIX##_count);             \
#	Line 1022 | Line 825 | void exit_emul_ppc(void)
825		printf("\n");
826		#endif
827
828	<	delete main_cpu;
829	<	#if MULTICORE_CPU
1027	<	delete interrupt_cpu;
1028	<	#endif
828	>	delete ppc_cpu;
829	>	ppc_cpu = NULL;
830		}
831
832		#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
#	Line 1060 | Line 861 | void init_emul_op_trampolines(basic_dyng
861
862		void emul_ppc(uint32 entry)
863		{
1063	–	current_cpu = main_cpu;
864		#if 0
865	<	current_cpu->start_log();
865	>	ppc_cpu->start_log();
866		#endif
867		// start emulation loop and enable code translation or caching
868	<	current_cpu->execute(entry);
868	>	ppc_cpu->execute(entry);
869		}
870
871		/*
872		*  Handle PowerPC interrupt
873		*/
874
1075	–	#if ASYNC_IRQ
1076	–	void HandleInterrupt(void)
1077	–	{
1078	–	main_cpu->handle_interrupt();
1079	–	}
1080	–	#else
875		void TriggerInterrupt(void)
876		{
877	+	idle_resume();
878		#if 0
879		WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1);
880		#else
881		// Trigger interrupt to main cpu only
882	<	if (main_cpu)
883	<	main_cpu->trigger_interrupt();
882	>	if (ppc_cpu)
883	>	ppc_cpu->trigger_interrupt();
884		#endif
885		}
1091	–	#endif
886
887	<	void sheepshaver_cpu::handle_interrupt(void)
887	>	void HandleInterrupt(powerpc_registers *r)
888		{
889	<	// Do nothing if interrupts are disabled
890	<	if (*(int32 *)XLM_IRQ_NEST > 0)
891	<	return;
889	>	#ifdef USE_SDL_VIDEO
890	>	// We must fill in the events queue in the same thread that did call SDL_SetVideoMode()
891	>	SDL_PumpEvents();
892	>	#endif
893
894	<	// Do nothing if there is no interrupt pending
895	<	if (InterruptFlags == 0)
894	>	// Do nothing if interrupts are disabled
895	>	if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0)
896		return;
897
898	<	// Disable MacOS stack sniffer
899	<	WriteMacInt32(0x110, 0);
898	>	// Update interrupt count
899	>	#if EMUL_TIME_STATS
900	>	interrupt_count++;
901	>	#endif
902
903		// Interrupt action depends on current run mode
904		switch (ReadMacInt32(XLM_RUN_MODE)) {
905		case MODE_68K:
906		// 68k emulator active, trigger 68k interrupt level 1
1110	–	assert(current_cpu == main_cpu);
907		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
908	<	set_cr(get_cr() | tswap32(kernel_data->v[0x674 >> 2]));
908	>	r->cr.set(r->cr.get() | tswap32(kernel_data->v[0x674 >> 2]));
909		break;
910
911		#if INTERRUPTS_IN_NATIVE_MODE
912		case MODE_NATIVE:
913		// 68k emulator inactive, in nanokernel?
914	<	assert(current_cpu == main_cpu);
1119	<	if (gpr(1) != KernelDataAddr) {
1120	<	interrupt_context ctx(this, "PowerPC mode");
914	>	if (r->gpr[1] != KernelDataAddr) {
915
916		// Prepare for 68k interrupt level 1
917		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
#	Line 1127 | Line 921 | void sheepshaver_cpu::handle_interrupt(v
921
922		// Execute nanokernel interrupt routine (this will activate the 68k emulator)
923		DisableInterrupt();
1130	–	cpu_push(interrupt_cpu);
924		if (ROMType == ROMTYPE_NEWWORLD)
925	<	current_cpu->interrupt(ROM_BASE + 0x312b1c);
925	>	ppc_cpu->interrupt(ROM_BASE + 0x312b1c);
926		else
927	<	current_cpu->interrupt(ROM_BASE + 0x312a3c);
1135	<	cpu_pop();
927	>	ppc_cpu->interrupt(ROM_BASE + 0x312a3c);
928		}
929		break;
930		#endif
#	Line 1141 | Line 933 | void sheepshaver_cpu::handle_interrupt(v
933		case MODE_EMUL_OP:
934		// 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0
935		if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) {
936	<	interrupt_context ctx(this, "68k mode");
936	>	#if EMUL_TIME_STATS
937	>	const clock_t interrupt_start = clock();
938	>	#endif
939		#if 1
940		// Execute full 68k interrupt routine
941		M68kRegisters r;
942		uint32 old_r25 = ReadMacInt32(XLM_68K_R25);     // Save interrupt level
943		WriteMacInt32(XLM_68K_R25, 0x21);                       // Execute with interrupt level 1
944	<	static const uint8 proc[] = {
944	>	static const uint8 proc_template[] = {
945		0x3f, 0x3c, 0x00, 0x00,                 // move.w       #$0000,-(sp)    (fake format word)
946		0x48, 0x7a, 0x00, 0x0a,                 // pea          @1(pc)                  (return address)
947		0x40, 0xe7,                                             // move         sr,-(sp)                (saved SR)
#	Line 1155 | Line 949 | void sheepshaver_cpu::handle_interrupt(v
949		0x4e, 0xd0,                                             // jmp          (a0)
950		M68K_RTS >> 8, M68K_RTS & 0xff  // @1
951		};
952	<	Execute68k((uint32)proc, &r);
952	>	BUILD_SHEEPSHAVER_PROCEDURE(proc);
953	>	Execute68k(proc, &r);
954		WriteMacInt32(XLM_68K_R25, old_r25);            // Restore interrupt level
955		#else
956		// Only update cursor
#	Line 1167 | Line 962 | void sheepshaver_cpu::handle_interrupt(v
962		}
963		}
964		#endif
965	+	#if EMUL_TIME_STATS
966	+	interrupt_time += (clock() - interrupt_start);
967	+	#endif
968		}
969		break;
970		#endif
#	Line 1198 | Line 996 | void sheepshaver_cpu::execute_native_op(
996		VideoVBL();
997		break;
998		case NATIVE_VIDEO_DO_DRIVER_IO:
999	<	gpr(3) = (int32)(int16)VideoDoDriverIO((void *)gpr(3), (void *)gpr(4),
1000	<	(void *)gpr(5), gpr(6), gpr(7));
999	>	gpr(3) = (int32)(int16)VideoDoDriverIO(gpr(3), gpr(4), gpr(5), gpr(6), gpr(7));
1000	>	break;
1001	>	case NATIVE_ETHER_AO_GET_HWADDR:
1002	>	AO_get_ethernet_address(gpr(3));
1003	>	break;
1004	>	case NATIVE_ETHER_AO_ADD_MULTI:
1005	>	AO_enable_multicast(gpr(3));
1006	>	break;
1007	>	case NATIVE_ETHER_AO_DEL_MULTI:
1008	>	AO_disable_multicast(gpr(3));
1009	>	break;
1010	>	case NATIVE_ETHER_AO_SEND_PACKET:
1011	>	AO_transmit_packet(gpr(3));
1012		break;
1204	–	#ifdef WORDS_BIGENDIAN
1013		case NATIVE_ETHER_IRQ:
1014		EtherIRQ();
1015		break;
#	Line 1223 | Line 1031 | void sheepshaver_cpu::execute_native_op(
1031		case NATIVE_ETHER_RSRV:
1032		gpr(3) = ether_rsrv((queue_t *)gpr(3));
1033		break;
1226	–	#else
1227	–	case NATIVE_ETHER_INIT:
1228	–	// FIXME: needs more complicated thunks
1229	–	gpr(3) = false;
1230	–	break;
1231	–	#endif
1034		case NATIVE_SYNC_HOOK:
1035		gpr(3) = NQD_sync_hook(gpr(3));
1036		break;
#	Line 1283 | Line 1085 | void sheepshaver_cpu::execute_native_op(
1085		get_resource_callbacks[selector - NATIVE_GET_RESOURCE]();
1086		break;
1087		}
1286	–	case NATIVE_DISABLE_INTERRUPT:
1287	–	DisableInterrupt();
1288	–	break;
1289	–	case NATIVE_ENABLE_INTERRUPT:
1290	–	EnableInterrupt();
1291	–	break;
1088		case NATIVE_MAKE_EXECUTABLE:
1089	<	MakeExecutable(0, (void *)gpr(4), gpr(5));
1089	>	MakeExecutable(0, gpr(4), gpr(5));
1090		break;
1091		case NATIVE_CHECK_LOAD_INVOC:
1092		check_load_invoc(gpr(3), gpr(4), gpr(5));
#	Line 1314 | Line 1110 | void sheepshaver_cpu::execute_native_op(
1110
1111		void Execute68k(uint32 pc, M68kRegisters *r)
1112		{
1113	<	current_cpu->execute_68k(pc, r);
1113	>	ppc_cpu->execute_68k(pc, r);
1114		}
1115
1116		/*
#	Line 1337 | Line 1133 | void Execute68kTrap(uint16 trap, M68kReg
1133
1134		uint32 call_macos(uint32 tvect)
1135		{
1136	<	return current_cpu->execute_macos_code(tvect, 0, NULL);
1136	>	return ppc_cpu->execute_macos_code(tvect, 0, NULL);
1137		}
1138
1139		uint32 call_macos1(uint32 tvect, uint32 arg1)
1140		{
1141		const uint32 args[] = { arg1 };
1142	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1142	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1143		}
1144
1145		uint32 call_macos2(uint32 tvect, uint32 arg1, uint32 arg2)
1146		{
1147		const uint32 args[] = { arg1, arg2 };
1148	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1148	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1149		}
1150
1151		uint32 call_macos3(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3)
1152		{
1153		const uint32 args[] = { arg1, arg2, arg3 };
1154	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1154	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1155		}
1156
1157		uint32 call_macos4(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4)
1158		{
1159		const uint32 args[] = { arg1, arg2, arg3, arg4 };
1160	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1160	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1161		}
1162
1163		uint32 call_macos5(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5)
1164		{
1165		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5 };
1166	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1166	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1167		}
1168
1169		uint32 call_macos6(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6)
1170		{
1171		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6 };
1172	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1172	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1173		}
1174
1175		uint32 call_macos7(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6, uint32 arg7)
1176		{
1177		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6, arg7 };
1178	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1178	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1179		}
1180
1181		/*
#	Line 1388 | Line 1184 | uint32 call_macos7(uint32 tvect, uint32
1184
1185		void get_resource(void)
1186		{
1187	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1187	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1188		}
1189
1190		void get_1_resource(void)
1191		{
1192	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1192	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1193		}
1194
1195		void get_ind_resource(void)
1196		{
1197	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1197	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1198		}
1199
1200		void get_1_ind_resource(void)
1201		{
1202	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1202	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1203		}
1204
1205		void r_get_resource(void)
1206		{
1207	<	current_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1207	>	ppc_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1208		}

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