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root/cebix/SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.41 by gbeauche, 2004-05-20T12:33:58Z vs.
Revision 1.65 by gbeauche, 2005-07-03T22:02:01Z

#	Line 1 | Line 1
1		/*
2		*  sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface
3		*
4	<	*  SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig
4	>	*  SheepShaver (C) 1997-2005 Christian Bauer and Marc Hellwig
5		*
6		*  This program is free software; you can redistribute it and/or modify
7		*  it under the terms of the GNU General Public License as published by
#	Line 42 | Line 42
42
43		#include <stdio.h>
44		#include <stdlib.h>
45	+	#ifdef HAVE_MALLOC_H
46	+	#include <malloc.h>
47	+	#endif
48	+
49	+	#ifdef USE_SDL_VIDEO
50	+	#include <SDL_events.h>
51	+	#endif
52
53		#if ENABLE_MON
54		#include "mon.h"
#	Line 52 | Line 59
59		#include "debug.h"
60
61		// Emulation time statistics
62	<	#define EMUL_TIME_STATS 1
62	>	#ifndef EMUL_TIME_STATS
63	>	#define EMUL_TIME_STATS 0
64	>	#endif
65
66		#if EMUL_TIME_STATS
67		static clock_t emul_start_time;
68	<	static uint32 interrupt_count = 0;
68	>	static uint32 interrupt_count = 0, ppc_interrupt_count = 0;
69		static clock_t interrupt_time = 0;
70		static uint32 exec68k_count = 0;
71		static clock_t exec68k_time = 0;
#	Line 84 | Line 93 | extern "C" void check_load_invoc(uint32
93		// PowerPC EmulOp to exit from emulation looop
94		const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1;
95
87	–	// Enable interrupt routine safety checks?
88	–	#define SAFE_INTERRUPT_PPC 1
89	–
96		// Enable Execute68k() safety checks?
97		#define SAFE_EXEC_68K 1
98
#	Line 99 | Line 105 | const uint32 POWERPC_EXEC_RETURN = POWER
105		// Interrupts in native mode?
106		#define INTERRUPTS_IN_NATIVE_MODE 1
107
102	–	// Enable native EMUL_OPs to be run without a mode switch
103	–	#define ENABLE_NATIVE_EMUL_OP 1
104	–
108		// Pointer to Kernel Data
109	<	static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE;
109	>	static KernelData * kernel_data;
110
111		// SIGSEGV handler
112	<	static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
112	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
113
114		#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
115		// Special trampolines for EmulOp and NativeOp
#	Line 136 | Line 139 | class sheepshaver_cpu
139		void init_decoder();
140		void execute_sheep(uint32 opcode);
141
139	–	// Filter out EMUL_OP routines that only call native code
140	–	bool filter_execute_emul_op(uint32 emul_op);
141	–
142	–	// "Native" EMUL_OP routines
143	–	void execute_emul_op_microseconds();
144	–	void execute_emul_op_idle_time_1();
145	–	void execute_emul_op_idle_time_2();
146	–
147	–	// CPU context to preserve on interrupt
148	–	class interrupt_context {
149	–	uint32 gpr[32];
150	–	uint32 pc;
151	–	uint32 lr;
152	–	uint32 ctr;
153	–	uint32 cr;
154	–	uint32 xer;
155	–	sheepshaver_cpu *cpu;
156	–	const char *where;
157	–	public:
158	–	interrupt_context(sheepshaver_cpu *_cpu, const char *_where);
159	–	~interrupt_context();
160	–	};
161	–
142		public:
143
144		// Constructor
#	Line 185 | Line 165 | public:
165		// Execute MacOS/PPC code
166		uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args);
167
168	+	#if PPC_ENABLE_JIT
169		// Compile one instruction
170		virtual int compile1(codegen_context_t & cg_context);
171	<
171	>	#endif
172		// Resource manager thunk
173		void get_resource(uint32 old_get_resource);
174
175		// Handle MacOS interrupt
176		void interrupt(uint32 entry);
196	–	void handle_interrupt();
177
178		// Make sure the SIGSEGV handler can access CPU registers
179		friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
200	–	};
180
181	<	// Memory allocator returning areas aligned on 16-byte boundaries
182	<	void *operator new(size_t size)
183	<	{
184	<	void *p;
181	>	// Memory allocator returning areas aligned on 16-byte boundaries
182	>	void *operator new(size_t size);
183	>	void operator delete(void *p);
184	>	};
185
186	<	#if defined(HAVE_POSIX_MEMALIGN)
187	<	if (posix_memalign(&p, 16, size) != 0)
186	>	// Memory allocator returning sheepshaver_cpu objects aligned on 16-byte boundaries
187	>	// FORMAT: [ alignment ] magic identifier, offset to malloc'ed data, sheepshaver_cpu data
188	>	void *sheepshaver_cpu::operator new(size_t size)
189	>	{
190	>	const int ALIGN = 16;
191	>
192	>	// Allocate enough space for sheepshaver_cpu data + signature + align pad
193	>	uint8 *ptr = (uint8 *)malloc(size + ALIGN * 2);
194	>	if (ptr == NULL)
195		throw std::bad_alloc();
210	–	#elif defined(HAVE_MEMALIGN)
211	–	p = memalign(16, size);
212	–	#elif defined(HAVE_VALLOC)
213	–	p = valloc(size); // page-aligned!
214	–	#else
215	–	/* XXX: handle padding ourselves */
216	–	p = malloc(size);
217	–	#endif
196
197	<	return p;
197	>	// Align memory
198	>	int ofs = 0;
199	>	while ((((uintptr)ptr) % ALIGN) != 0)
200	>	ofs++, ptr++;
201	>
202	>	// Insert signature and offset
203	>	struct aligned_block_t {
204	>	uint32 pad[(ALIGN - 8) / 4];
205	>	uint32 signature;
206	>	uint32 offset;
207	>	uint8  data[sizeof(sheepshaver_cpu)];
208	>	};
209	>	aligned_block_t *blk = (aligned_block_t *)ptr;
210	>	blk->signature = FOURCC('S','C','P','U');
211	>	blk->offset = ofs + (&blk->data[0] - (uint8 *)blk);
212	>	assert((((uintptr)&blk->data) % ALIGN) == 0);
213	>	return &blk->data[0];
214		}
215
216	<	void operator delete(void *p)
217	<	{
218	<	#if defined(HAVE_MEMALIGN) || defined(HAVE_VALLOC)
219	<	#if defined(__GLIBC__)
220	<	// this is known to work only with GNU libc
221	<	free(p);
228	<	#endif
229	<	#else
230	<	free(p);
231	<	#endif
216	>	void sheepshaver_cpu::operator delete(void *p)
217	>	{
218	>	uint32 *blk = (uint32 *)p;
219	>	assert(blk[-2] == FOURCC('S','C','P','U'));
220	>	void *ptr = (void *)(((uintptr)p) - blk[-1]);
221	>	free(ptr);
222		}
223
224		sheepshaver_cpu::sheepshaver_cpu()
#	Line 268 | Line 258 | typedef bit_field< 19, 19 > FN_field;
258		typedef bit_field< 20, 25 > NATIVE_OP_field;
259		typedef bit_field< 26, 31 > EMUL_OP_field;
260
271	–	// "Native" EMUL_OP routines
272	–	#define GPR_A(REG) gpr(16 + (REG))
273	–	#define GPR_D(REG) gpr( 8 + (REG))
274	–
275	–	void sheepshaver_cpu::execute_emul_op_microseconds()
276	–	{
277	–	Microseconds(GPR_A(0), GPR_D(0));
278	–	}
279	–
280	–	void sheepshaver_cpu::execute_emul_op_idle_time_1()
281	–	{
282	–	// Sleep if no events pending
283	–	if (ReadMacInt32(0x14c) == 0)
284	–	Delay_usec(16667);
285	–	GPR_A(0) = ReadMacInt32(0x2b6);
286	–	}
287	–
288	–	void sheepshaver_cpu::execute_emul_op_idle_time_2()
289	–	{
290	–	// Sleep if no events pending
291	–	if (ReadMacInt32(0x14c) == 0)
292	–	Delay_usec(16667);
293	–	GPR_D(0) = (uint32)-2;
294	–	}
295	–
296	–	// Filter out EMUL_OP routines that only call native code
297	–	bool sheepshaver_cpu::filter_execute_emul_op(uint32 emul_op)
298	–	{
299	–	switch (emul_op) {
300	–	case OP_MICROSECONDS:
301	–	execute_emul_op_microseconds();
302	–	return true;
303	–	case OP_IDLE_TIME:
304	–	execute_emul_op_idle_time_1();
305	–	return true;
306	–	case OP_IDLE_TIME_2:
307	–	execute_emul_op_idle_time_2();
308	–	return true;
309	–	}
310	–	return false;
311	–	}
312	–
261		// Execute EMUL_OP routine
262		void sheepshaver_cpu::execute_emul_op(uint32 emul_op)
263		{
316	–	#if ENABLE_NATIVE_EMUL_OP
317	–	// First, filter out EMUL_OPs that can be executed without a mode switch
318	–	if (filter_execute_emul_op(emul_op))
319	–	return;
320	–	#endif
321	–
264		M68kRegisters r68;
265		WriteMacInt32(XLM_68K_R25, gpr(25));
266		WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
#	Line 327 | Line 269 | void sheepshaver_cpu::execute_emul_op(ui
269		for (int i = 0; i < 7; i++)
270		r68.a[i] = gpr(16 + i);
271		r68.a[7] = gpr(1);
272	<	uint32 saved_cr = get_cr() & CR_field<2>::mask();
272	>	uint32 saved_cr = get_cr() & 0xff9fffff; // mask_operand::compute(11, 8)
273		uint32 saved_xer = get_xer();
274		EmulOp(&r68, gpr(24), emul_op);
275		set_cr(saved_cr);
#	Line 371 | Line 313 | void sheepshaver_cpu::execute_sheep(uint
313		}
314
315		// Compile one instruction
316	+	#if PPC_ENABLE_JIT
317		int sheepshaver_cpu::compile1(codegen_context_t & cg_context)
318		{
376	–	#if PPC_ENABLE_JIT
319		const instr_info_t *ii = cg_context.instr_info;
320		if (ii->mnemo != PPC_I(SHEEP))
321		return COMPILE_FAILURE;
#	Line 444 | Line 386 | int sheepshaver_cpu::compile1(codegen_co
386		status = COMPILE_CODE_OK;
387		break;
388		#endif
447	–	case NATIVE_DISABLE_INTERRUPT:
448	–	dg.gen_invoke(DisableInterrupt);
449	–	status = COMPILE_CODE_OK;
450	–	break;
451	–	case NATIVE_ENABLE_INTERRUPT:
452	–	dg.gen_invoke(EnableInterrupt);
453	–	status = COMPILE_CODE_OK;
454	–	break;
389		case NATIVE_BITBLT:
390		dg.gen_load_T0_GPR(3);
391		dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt);
#	Line 469 | Line 403 | int sheepshaver_cpu::compile1(codegen_co
403		break;
404		}
405		// Could we fully translate this NativeOp?
406	<	if (FN_field::test(opcode)) {
407	<	if (status != COMPILE_FAILURE) {
406	>	if (status == COMPILE_CODE_OK) {
407	>	if (!FN_field::test(opcode))
408	>	cg_context.done_compile = false;
409	>	else {
410		dg.gen_load_A0_LR();
411		dg.gen_set_PC_A0();
412	+	cg_context.done_compile = true;
413		}
477	–	cg_context.done_compile = true;
478	–	break;
479	–	}
480	–	else if (status != COMPILE_FAILURE) {
481	–	cg_context.done_compile = false;
414		break;
415		}
416		#if PPC_REENTRANT_JIT
417		// Try to execute NativeOp trampoline
418	<	dg.gen_set_PC_im(cg_context.pc + 4);
418	>	if (!FN_field::test(opcode))
419	>	dg.gen_set_PC_im(cg_context.pc + 4);
420	>	else {
421	>	dg.gen_load_A0_LR();
422	>	dg.gen_set_PC_A0();
423	>	}
424		dg.gen_mov_32_T0_im(selector);
425		dg.gen_jmp(native_op_trampoline);
426		cg_context.done_compile = true;
#	Line 491 | Line 428 | int sheepshaver_cpu::compile1(codegen_co
428		break;
429		#endif
430		// Invoke NativeOp handler
431	<	typedef void (*func_t)(dyngen_cpu_base, uint32);
432	<	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
433	<	dg.gen_invoke_CPU_im(func, selector);
434	<	cg_context.done_compile = false;
435	<	status = COMPILE_CODE_OK;
431	>	if (!FN_field::test(opcode)) {
432	>	typedef void (*func_t)(dyngen_cpu_base, uint32);
433	>	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
434	>	dg.gen_invoke_CPU_im(func, selector);
435	>	cg_context.done_compile = false;
436	>	status = COMPILE_CODE_OK;
437	>	}
438	>	// Otherwise, let it generate a call to execute_sheep() which
439	>	// will cause necessary updates to the program counter
440		break;
441		}
442
443		default: {      // EMUL_OP
444		uint32 emul_op = EMUL_OP_field::extract(opcode) - 3;
504	–	#if ENABLE_NATIVE_EMUL_OP
505	–	typedef void (*emul_op_func_t)(dyngen_cpu_base);
506	–	emul_op_func_t emul_op_func = 0;
507	–	switch (emul_op) {
508	–	case OP_MICROSECONDS:
509	–	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_microseconds).ptr();
510	–	break;
511	–	case OP_IDLE_TIME:
512	–	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_1).ptr();
513	–	break;
514	–	case OP_IDLE_TIME_2:
515	–	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_2).ptr();
516	–	break;
517	–	}
518	–	if (emul_op_func) {
519	–	dg.gen_invoke_CPU(emul_op_func);
520	–	cg_context.done_compile = false;
521	–	status = COMPILE_CODE_OK;
522	–	break;
523	–	}
524	–	#endif
445		#if PPC_REENTRANT_JIT
446		// Try to execute EmulOp trampoline
447		dg.gen_set_PC_im(cg_context.pc + 4);
#	Line 541 | Line 461 | int sheepshaver_cpu::compile1(codegen_co
461		}
462		}
463		return status;
544	–	#endif
545	–	return COMPILE_FAILURE;
464		}
547	–
548	–	// CPU context to preserve on interrupt
549	–	sheepshaver_cpu::interrupt_context::interrupt_context(sheepshaver_cpu *_cpu, const char *_where)
550	–	{
551	–	#if SAFE_INTERRUPT_PPC >= 2
552	–	cpu = _cpu;
553	–	where = _where;
554	–
555	–	// Save interrupt context
556	–	memcpy(&gpr[0], &cpu->gpr(0), sizeof(gpr));
557	–	pc = cpu->pc();
558	–	lr = cpu->lr();
559	–	ctr = cpu->ctr();
560	–	cr = cpu->get_cr();
561	–	xer = cpu->get_xer();
465		#endif
563	–	}
564	–
565	–	sheepshaver_cpu::interrupt_context::~interrupt_context()
566	–	{
567	–	#if SAFE_INTERRUPT_PPC >= 2
568	–	// Check whether CPU context was preserved by interrupt
569	–	if (memcmp(&gpr[0], &cpu->gpr(0), sizeof(gpr)) != 0) {
570	–	printf("FATAL: %s: interrupt clobbers registers\n", where);
571	–	for (int i = 0; i < 32; i++)
572	–	if (gpr[i] != cpu->gpr(i))
573	–	printf(" r%d: %08x -> %08x\n", i, gpr[i], cpu->gpr(i));
574	–	}
575	–	if (pc != cpu->pc())
576	–	printf("FATAL: %s: interrupt clobbers PC\n", where);
577	–	if (lr != cpu->lr())
578	–	printf("FATAL: %s: interrupt clobbers LR\n", where);
579	–	if (ctr != cpu->ctr())
580	–	printf("FATAL: %s: interrupt clobbers CTR\n", where);
581	–	if (cr != cpu->get_cr())
582	–	printf("FATAL: %s: interrupt clobbers CR\n", where);
583	–	if (xer != cpu->get_xer())
584	–	printf("FATAL: %s: interrupt clobbers XER\n", where);
585	–	#endif
586	–	}
466
467		// Handle MacOS interrupt
468		void sheepshaver_cpu::interrupt(uint32 entry)
469		{
470		#if EMUL_TIME_STATS
471	<	interrupt_count++;
471	>	ppc_interrupt_count++;
472		const clock_t interrupt_start = clock();
473		#endif
474
596	–	#if SAFE_INTERRUPT_PPC
597	–	static int depth = 0;
598	–	if (depth != 0)
599	–	printf("FATAL: sheepshaver_cpu::interrupt() called more than once: %d\n", depth);
600	–	depth++;
601	–	#endif
602	–
475		// Save program counters and branch registers
476		uint32 saved_pc = pc();
477		uint32 saved_lr = lr();
#	Line 653 | Line 525 | void sheepshaver_cpu::interrupt(uint32 e
525		#if EMUL_TIME_STATS
526		interrupt_time += (clock() - interrupt_start);
527		#endif
656	–
657	–	#if SAFE_INTERRUPT_PPC
658	–	depth--;
659	–	#endif
528		}
529
530		// Execute 68k routine
#	Line 875 | Line 743 | static void dump_log(void)
743		*  Initialize CPU emulation
744		*/
745
746	<	static sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
746	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
747		{
748		#if ENABLE_VOSF
749		// Handle screen fault
#	Line 887 | Line 755 | static sigsegv_return_t sigsegv_handler(
755		const uintptr addr = (uintptr)fault_address;
756		#if HAVE_SIGSEGV_SKIP_INSTRUCTION
757		// Ignore writes to ROM
758	<	if ((addr - ROM_BASE) < ROM_SIZE)
758	>	if ((addr - (uintptr)ROMBaseHost) < ROM_SIZE)
759		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
760
761		// Get program counter of target CPU
#	Line 895 | Line 763 | static sigsegv_return_t sigsegv_handler(
763		const uint32 pc = cpu->pc();
764
765		// Fault in Mac ROM or RAM?
766	<	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize));
766	>	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize)) || (pc >= DR_CACHE_BASE && pc < (DR_CACHE_BASE + DR_CACHE_SIZE));
767		if (mac_fault) {
768
769		// "VM settings" during MacOS 8 installation
#	Line 915 | Line 783 | static sigsegv_return_t sigsegv_handler(
783		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
784		else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
785		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
786	+
787	+	// MacOS 8.6 serial drivers on startup (with DR Cache and OldWorld ROM)
788	+	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(16) == 0xf3012002 || cpu->gpr(16) == 0xf3012000))
789	+	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
790	+	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
791	+	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
792
793		// Ignore writes to the zero page
794		else if ((uint32)(addr - SheepMem::ZeroPage()) < (uint32)SheepMem::PageSize())
#	Line 928 | Line 802 | static sigsegv_return_t sigsegv_handler(
802		#error "FIXME: You don't have the capability to skip instruction within signal handlers"
803		#endif
804
805	<	printf("SIGSEGV\n");
806	<	printf("  pc %p\n", fault_instruction);
807	<	printf("  ea %p\n", fault_address);
805	>	fprintf(stderr, "SIGSEGV\n");
806	>	fprintf(stderr, "  pc %p\n", fault_instruction);
807	>	fprintf(stderr, "  ea %p\n", fault_address);
808		dump_registers();
809		ppc_cpu->dump_log();
810		enter_mon();
#	Line 941 | Line 815 | static sigsegv_return_t sigsegv_handler(
815
816		void init_emul_ppc(void)
817		{
818	+	// Get pointer to KernelData in host address space
819	+	kernel_data = (KernelData *)Mac2HostAddr(KERNEL_DATA_BASE);
820	+
821		// Initialize main CPU emulator
822		ppc_cpu = new sheepshaver_cpu();
823		ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
824		ppc_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
825		WriteMacInt32(XLM_RUN_MODE, MODE_68K);
826
950	–	// Install the handler for SIGSEGV
951	–	sigsegv_install_handler(sigsegv_handler);
952	–
827		#if ENABLE_MON
828		// Install "regs" command in cxmon
829		mon_add_command("regs", dump_registers, "regs                     Dump PowerPC registers\n");
#	Line 975 | Line 849 | void exit_emul_ppc(void)
849		printf("Total emulation time : %.1f sec\n", double(emul_time) / double(CLOCKS_PER_SEC));
850		printf("Total interrupt count: %d (%2.1f Hz)\n", interrupt_count,
851		(double(interrupt_count) * CLOCKS_PER_SEC) / double(emul_time));
852	+	printf("Total ppc interrupt count: %d (%2.1f %%)\n", ppc_interrupt_count,
853	+	(double(ppc_interrupt_count) * 100.0) / double(interrupt_count));
854
855		#define PRINT_STATS(LABEL, VAR_PREFIX) do {                                                             \
856		printf("Total " LABEL " count : %d\n", VAR_PREFIX##_count);             \
#	Line 1039 | Line 915 | void emul_ppc(uint32 entry)
915
916		void TriggerInterrupt(void)
917		{
918	+	idle_resume();
919		#if 0
920		WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1);
921		#else
#	Line 1048 | Line 925 | void TriggerInterrupt(void)
925		#endif
926		}
927
928	<	void sheepshaver_cpu::handle_interrupt(void)
928	>	void HandleInterrupt(powerpc_registers *r)
929		{
930	<	// Do nothing if interrupts are disabled
931	<	if (*(int32 *)XLM_IRQ_NEST > 0)
932	<	return;
930	>	#ifdef USE_SDL_VIDEO
931	>	// We must fill in the events queue in the same thread that did call SDL_SetVideoMode()
932	>	SDL_PumpEvents();
933	>	#endif
934
935	<	// Do nothing if there is no interrupt pending
936	<	if (InterruptFlags == 0)
935	>	// Do nothing if interrupts are disabled
936	>	if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0)
937		return;
938
939	<	// Current interrupt nest level
940	<	static int interrupt_depth = 0;
941	<	++interrupt_depth;
942	<
1065	<	// Disable MacOS stack sniffer
1066	<	WriteMacInt32(0x110, 0);
939	>	// Update interrupt count
940	>	#if EMUL_TIME_STATS
941	>	interrupt_count++;
942	>	#endif
943
944		// Interrupt action depends on current run mode
945		switch (ReadMacInt32(XLM_RUN_MODE)) {
946		case MODE_68K:
947		// 68k emulator active, trigger 68k interrupt level 1
948		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
949	<	set_cr(get_cr() | tswap32(kernel_data->v[0x674 >> 2]));
949	>	r->cr.set(r->cr.get() | tswap32(kernel_data->v[0x674 >> 2]));
950		break;
951
952		#if INTERRUPTS_IN_NATIVE_MODE
953		case MODE_NATIVE:
954		// 68k emulator inactive, in nanokernel?
955	<	if (gpr(1) != KernelDataAddr && interrupt_depth == 1) {
1080	<	interrupt_context ctx(this, "PowerPC mode");
955	>	if (r->gpr[1] != KernelDataAddr) {
956
957		// Prepare for 68k interrupt level 1
958		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
#	Line 1099 | Line 974 | void sheepshaver_cpu::handle_interrupt(v
974		case MODE_EMUL_OP:
975		// 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0
976		if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) {
977	<	interrupt_context ctx(this, "68k mode");
977	>	#if EMUL_TIME_STATS
978	>	const clock_t interrupt_start = clock();
979	>	#endif
980		#if 1
981		// Execute full 68k interrupt routine
982		M68kRegisters r;
983		uint32 old_r25 = ReadMacInt32(XLM_68K_R25);     // Save interrupt level
984		WriteMacInt32(XLM_68K_R25, 0x21);                       // Execute with interrupt level 1
985	<	static const uint8 proc[] = {
985	>	static const uint8 proc_template[] = {
986		0x3f, 0x3c, 0x00, 0x00,                 // move.w       #$0000,-(sp)    (fake format word)
987		0x48, 0x7a, 0x00, 0x0a,                 // pea          @1(pc)                  (return address)
988		0x40, 0xe7,                                             // move         sr,-(sp)                (saved SR)
#	Line 1113 | Line 990 | void sheepshaver_cpu::handle_interrupt(v
990		0x4e, 0xd0,                                             // jmp          (a0)
991		M68K_RTS >> 8, M68K_RTS & 0xff  // @1
992		};
993	<	Execute68k((uint32)proc, &r);
993	>	BUILD_SHEEPSHAVER_PROCEDURE(proc);
994	>	Execute68k(proc, &r);
995		WriteMacInt32(XLM_68K_R25, old_r25);            // Restore interrupt level
996		#else
997		// Only update cursor
#	Line 1125 | Line 1003 | void sheepshaver_cpu::handle_interrupt(v
1003		}
1004		}
1005		#endif
1006	+	#if EMUL_TIME_STATS
1007	+	interrupt_time += (clock() - interrupt_start);
1008	+	#endif
1009		}
1010		break;
1011		#endif
1012		}
1132	–
1133	–	// We are done with this interrupt
1134	–	--interrupt_depth;
1013		}
1014
1015		static void get_resource(void);
#	Line 1159 | Line 1037 | void sheepshaver_cpu::execute_native_op(
1037		VideoVBL();
1038		break;
1039		case NATIVE_VIDEO_DO_DRIVER_IO:
1040	<	gpr(3) = (int32)(int16)VideoDoDriverIO((void *)gpr(3), (void *)gpr(4),
1041	<	(void *)gpr(5), gpr(6), gpr(7));
1040	>	gpr(3) = (int32)(int16)VideoDoDriverIO(gpr(3), gpr(4), gpr(5), gpr(6), gpr(7));
1041	>	break;
1042	>	case NATIVE_ETHER_AO_GET_HWADDR:
1043	>	AO_get_ethernet_address(gpr(3));
1044	>	break;
1045	>	case NATIVE_ETHER_AO_ADD_MULTI:
1046	>	AO_enable_multicast(gpr(3));
1047	>	break;
1048	>	case NATIVE_ETHER_AO_DEL_MULTI:
1049	>	AO_disable_multicast(gpr(3));
1050	>	break;
1051	>	case NATIVE_ETHER_AO_SEND_PACKET:
1052	>	AO_transmit_packet(gpr(3));
1053		break;
1165	–	#ifdef WORDS_BIGENDIAN
1054		case NATIVE_ETHER_IRQ:
1055		EtherIRQ();
1056		break;
#	Line 1184 | Line 1072 | void sheepshaver_cpu::execute_native_op(
1072		case NATIVE_ETHER_RSRV:
1073		gpr(3) = ether_rsrv((queue_t *)gpr(3));
1074		break;
1187	–	#else
1188	–	case NATIVE_ETHER_INIT:
1189	–	// FIXME: needs more complicated thunks
1190	–	gpr(3) = false;
1191	–	break;
1192	–	#endif
1075		case NATIVE_SYNC_HOOK:
1076		gpr(3) = NQD_sync_hook(gpr(3));
1077		break;
#	Line 1244 | Line 1126 | void sheepshaver_cpu::execute_native_op(
1126		get_resource_callbacks[selector - NATIVE_GET_RESOURCE]();
1127		break;
1128		}
1247	–	case NATIVE_DISABLE_INTERRUPT:
1248	–	DisableInterrupt();
1249	–	break;
1250	–	case NATIVE_ENABLE_INTERRUPT:
1251	–	EnableInterrupt();
1252	–	break;
1129		case NATIVE_MAKE_EXECUTABLE:
1130	<	MakeExecutable(0, (void *)gpr(4), gpr(5));
1130	>	MakeExecutable(0, gpr(4), gpr(5));
1131		break;
1132		case NATIVE_CHECK_LOAD_INVOC:
1133		check_load_invoc(gpr(3), gpr(4), gpr(5));

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