| 93 |
|
// PowerPC EmulOp to exit from emulation looop |
| 94 |
|
const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1; |
| 95 |
|
|
| 96 |
– |
// Enable interrupt routine safety checks? |
| 97 |
– |
#define SAFE_INTERRUPT_PPC 1 |
| 98 |
– |
|
| 96 |
|
// Enable Execute68k() safety checks? |
| 97 |
|
#define SAFE_EXEC_68K 1 |
| 98 |
|
|
| 139 |
|
void init_decoder(); |
| 140 |
|
void execute_sheep(uint32 opcode); |
| 141 |
|
|
| 145 |
– |
// CPU context to preserve on interrupt |
| 146 |
– |
class interrupt_context { |
| 147 |
– |
uint32 gpr[32]; |
| 148 |
– |
double fpr[32]; |
| 149 |
– |
uint32 pc; |
| 150 |
– |
uint32 lr; |
| 151 |
– |
uint32 ctr; |
| 152 |
– |
uint32 cr; |
| 153 |
– |
uint32 xer; |
| 154 |
– |
uint32 fpscr; |
| 155 |
– |
sheepshaver_cpu *cpu; |
| 156 |
– |
const char *where; |
| 157 |
– |
public: |
| 158 |
– |
interrupt_context(sheepshaver_cpu *_cpu, const char *_where); |
| 159 |
– |
~interrupt_context(); |
| 160 |
– |
}; |
| 161 |
– |
|
| 142 |
|
public: |
| 143 |
|
|
| 144 |
|
// Constructor |
| 174 |
|
|
| 175 |
|
// Handle MacOS interrupt |
| 176 |
|
void interrupt(uint32 entry); |
| 197 |
– |
void handle_interrupt(); |
| 177 |
|
|
| 178 |
|
// Make sure the SIGSEGV handler can access CPU registers |
| 179 |
|
friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t); |
| 183 |
|
void operator delete(void *p); |
| 184 |
|
}; |
| 185 |
|
|
| 186 |
< |
// Memory allocator returning areas aligned on 16-byte boundaries |
| 186 |
> |
// Memory allocator returning sheepshaver_cpu objects aligned on 16-byte boundaries |
| 187 |
> |
// FORMAT: [ alignment ] magic identifier, offset to malloc'ed data, sheepshaver_cpu data |
| 188 |
|
void *sheepshaver_cpu::operator new(size_t size) |
| 189 |
|
{ |
| 190 |
< |
void *p; |
| 190 |
> |
const int ALIGN = 16; |
| 191 |
|
|
| 192 |
< |
#if defined(HAVE_POSIX_MEMALIGN) |
| 193 |
< |
if (posix_memalign(&p, 16, size) != 0) |
| 192 |
> |
// Allocate enough space for sheepshaver_cpu data + signature + align pad |
| 193 |
> |
uint8 *ptr = (uint8 *)malloc(size + ALIGN * 2); |
| 194 |
> |
if (ptr == NULL) |
| 195 |
|
throw std::bad_alloc(); |
| 215 |
– |
#elif defined(HAVE_MEMALIGN) |
| 216 |
– |
p = memalign(16, size); |
| 217 |
– |
#elif defined(HAVE_VALLOC) |
| 218 |
– |
p = valloc(size); // page-aligned! |
| 219 |
– |
#else |
| 220 |
– |
/* XXX: handle padding ourselves */ |
| 221 |
– |
p = malloc(size); |
| 222 |
– |
#endif |
| 196 |
|
|
| 197 |
< |
return p; |
| 197 |
> |
// Align memory |
| 198 |
> |
int ofs = 0; |
| 199 |
> |
while ((((uintptr)ptr) % ALIGN) != 0) |
| 200 |
> |
ofs++, ptr++; |
| 201 |
> |
|
| 202 |
> |
// Insert signature and offset |
| 203 |
> |
struct aligned_block_t { |
| 204 |
> |
uint32 pad[(ALIGN - 8) / 4]; |
| 205 |
> |
uint32 signature; |
| 206 |
> |
uint32 offset; |
| 207 |
> |
uint8 data[sizeof(sheepshaver_cpu)]; |
| 208 |
> |
}; |
| 209 |
> |
aligned_block_t *blk = (aligned_block_t *)ptr; |
| 210 |
> |
blk->signature = FOURCC('S','C','P','U'); |
| 211 |
> |
blk->offset = ofs + (&blk->data[0] - (uint8 *)blk); |
| 212 |
> |
assert((((uintptr)&blk->data) % ALIGN) == 0); |
| 213 |
> |
return &blk->data[0]; |
| 214 |
|
} |
| 215 |
|
|
| 216 |
|
void sheepshaver_cpu::operator delete(void *p) |
| 217 |
|
{ |
| 218 |
< |
#if defined(HAVE_MEMALIGN) || defined(HAVE_VALLOC) |
| 219 |
< |
#if defined(__GLIBC__) |
| 220 |
< |
// this is known to work only with GNU libc |
| 221 |
< |
free(p); |
| 233 |
< |
#endif |
| 234 |
< |
#else |
| 235 |
< |
free(p); |
| 236 |
< |
#endif |
| 218 |
> |
uint32 *blk = (uint32 *)p; |
| 219 |
> |
assert(blk[-2] == FOURCC('S','C','P','U')); |
| 220 |
> |
void *ptr = (void *)(((uintptr)p) - blk[-1]); |
| 221 |
> |
free(ptr); |
| 222 |
|
} |
| 223 |
|
|
| 224 |
|
sheepshaver_cpu::sheepshaver_cpu() |
| 269 |
|
for (int i = 0; i < 7; i++) |
| 270 |
|
r68.a[i] = gpr(16 + i); |
| 271 |
|
r68.a[7] = gpr(1); |
| 272 |
< |
uint32 saved_cr = get_cr() & CR_field<2>::mask(); |
| 272 |
> |
uint32 saved_cr = get_cr() & 0xff9fffff; // mask_operand::compute(11, 8) |
| 273 |
|
uint32 saved_xer = get_xer(); |
| 274 |
|
EmulOp(&r68, gpr(24), emul_op); |
| 275 |
|
set_cr(saved_cr); |
| 464 |
|
} |
| 465 |
|
#endif |
| 466 |
|
|
| 482 |
– |
// CPU context to preserve on interrupt |
| 483 |
– |
sheepshaver_cpu::interrupt_context::interrupt_context(sheepshaver_cpu *_cpu, const char *_where) |
| 484 |
– |
{ |
| 485 |
– |
#if SAFE_INTERRUPT_PPC >= 2 |
| 486 |
– |
cpu = _cpu; |
| 487 |
– |
where = _where; |
| 488 |
– |
|
| 489 |
– |
// Save interrupt context |
| 490 |
– |
memcpy(&gpr[0], &cpu->gpr(0), sizeof(gpr)); |
| 491 |
– |
memcpy(&fpr[0], &cpu->fpr(0), sizeof(fpr)); |
| 492 |
– |
pc = cpu->pc(); |
| 493 |
– |
lr = cpu->lr(); |
| 494 |
– |
ctr = cpu->ctr(); |
| 495 |
– |
cr = cpu->get_cr(); |
| 496 |
– |
xer = cpu->get_xer(); |
| 497 |
– |
fpscr = cpu->fpscr(); |
| 498 |
– |
#endif |
| 499 |
– |
} |
| 500 |
– |
|
| 501 |
– |
sheepshaver_cpu::interrupt_context::~interrupt_context() |
| 502 |
– |
{ |
| 503 |
– |
#if SAFE_INTERRUPT_PPC >= 2 |
| 504 |
– |
// Check whether CPU context was preserved by interrupt |
| 505 |
– |
if (memcmp(&gpr[0], &cpu->gpr(0), sizeof(gpr)) != 0) { |
| 506 |
– |
printf("FATAL: %s: interrupt clobbers registers\n", where); |
| 507 |
– |
for (int i = 0; i < 32; i++) |
| 508 |
– |
if (gpr[i] != cpu->gpr(i)) |
| 509 |
– |
printf(" r%d: %08x -> %08x\n", i, gpr[i], cpu->gpr(i)); |
| 510 |
– |
} |
| 511 |
– |
if (memcmp(&fpr[0], &cpu->fpr(0), sizeof(fpr)) != 0) { |
| 512 |
– |
printf("FATAL: %s: interrupt clobbers registers\n", where); |
| 513 |
– |
for (int i = 0; i < 32; i++) |
| 514 |
– |
if (fpr[i] != cpu->fpr(i)) |
| 515 |
– |
printf(" r%d: %f -> %f\n", i, fpr[i], cpu->fpr(i)); |
| 516 |
– |
} |
| 517 |
– |
if (pc != cpu->pc()) |
| 518 |
– |
printf("FATAL: %s: interrupt clobbers PC\n", where); |
| 519 |
– |
if (lr != cpu->lr()) |
| 520 |
– |
printf("FATAL: %s: interrupt clobbers LR\n", where); |
| 521 |
– |
if (ctr != cpu->ctr()) |
| 522 |
– |
printf("FATAL: %s: interrupt clobbers CTR\n", where); |
| 523 |
– |
if (cr != cpu->get_cr()) |
| 524 |
– |
printf("FATAL: %s: interrupt clobbers CR\n", where); |
| 525 |
– |
if (xer != cpu->get_xer()) |
| 526 |
– |
printf("FATAL: %s: interrupt clobbers XER\n", where); |
| 527 |
– |
if (fpscr != cpu->fpscr()) |
| 528 |
– |
printf("FATAL: %s: interrupt clobbers FPSCR\n", where); |
| 529 |
– |
#endif |
| 530 |
– |
} |
| 531 |
– |
|
| 467 |
|
// Handle MacOS interrupt |
| 468 |
|
void sheepshaver_cpu::interrupt(uint32 entry) |
| 469 |
|
{ |
| 472 |
|
const clock_t interrupt_start = clock(); |
| 473 |
|
#endif |
| 474 |
|
|
| 540 |
– |
#if SAFE_INTERRUPT_PPC |
| 541 |
– |
static int depth = 0; |
| 542 |
– |
if (depth != 0) |
| 543 |
– |
printf("FATAL: sheepshaver_cpu::interrupt() called more than once: %d\n", depth); |
| 544 |
– |
depth++; |
| 545 |
– |
#endif |
| 546 |
– |
|
| 475 |
|
// Save program counters and branch registers |
| 476 |
|
uint32 saved_pc = pc(); |
| 477 |
|
uint32 saved_lr = lr(); |
| 525 |
|
#if EMUL_TIME_STATS |
| 526 |
|
interrupt_time += (clock() - interrupt_start); |
| 527 |
|
#endif |
| 600 |
– |
|
| 601 |
– |
#if SAFE_INTERRUPT_PPC |
| 602 |
– |
depth--; |
| 603 |
– |
#endif |
| 528 |
|
} |
| 529 |
|
|
| 530 |
|
// Execute 68k routine |
| 802 |
|
#error "FIXME: You don't have the capability to skip instruction within signal handlers" |
| 803 |
|
#endif |
| 804 |
|
|
| 805 |
< |
printf("SIGSEGV\n"); |
| 806 |
< |
printf(" pc %p\n", fault_instruction); |
| 807 |
< |
printf(" ea %p\n", fault_address); |
| 805 |
> |
fprintf(stderr, "SIGSEGV\n"); |
| 806 |
> |
fprintf(stderr, " pc %p\n", fault_instruction); |
| 807 |
> |
fprintf(stderr, " ea %p\n", fault_address); |
| 808 |
|
dump_registers(); |
| 809 |
|
ppc_cpu->dump_log(); |
| 810 |
|
enter_mon(); |
| 915 |
|
|
| 916 |
|
void TriggerInterrupt(void) |
| 917 |
|
{ |
| 918 |
+ |
idle_resume(); |
| 919 |
|
#if 0 |
| 920 |
|
WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1); |
| 921 |
|
#else |
| 925 |
|
#endif |
| 926 |
|
} |
| 927 |
|
|
| 928 |
< |
void sheepshaver_cpu::handle_interrupt(void) |
| 928 |
> |
void HandleInterrupt(powerpc_registers *r) |
| 929 |
|
{ |
| 930 |
|
#ifdef USE_SDL_VIDEO |
| 931 |
|
// We must fill in the events queue in the same thread that did call SDL_SetVideoMode() |
| 936 |
|
if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0) |
| 937 |
|
return; |
| 938 |
|
|
| 939 |
< |
// Current interrupt nest level |
| 1015 |
< |
static int interrupt_depth = 0; |
| 1016 |
< |
++interrupt_depth; |
| 939 |
> |
// Update interrupt count |
| 940 |
|
#if EMUL_TIME_STATS |
| 941 |
|
interrupt_count++; |
| 942 |
|
#endif |
| 943 |
|
|
| 1021 |
– |
// Disable MacOS stack sniffer |
| 1022 |
– |
WriteMacInt32(0x110, 0); |
| 1023 |
– |
|
| 944 |
|
// Interrupt action depends on current run mode |
| 945 |
|
switch (ReadMacInt32(XLM_RUN_MODE)) { |
| 946 |
|
case MODE_68K: |
| 947 |
|
// 68k emulator active, trigger 68k interrupt level 1 |
| 948 |
|
WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1); |
| 949 |
< |
set_cr(get_cr() | tswap32(kernel_data->v[0x674 >> 2])); |
| 949 |
> |
r->cr.set(r->cr.get() | tswap32(kernel_data->v[0x674 >> 2])); |
| 950 |
|
break; |
| 951 |
|
|
| 952 |
|
#if INTERRUPTS_IN_NATIVE_MODE |
| 953 |
|
case MODE_NATIVE: |
| 954 |
|
// 68k emulator inactive, in nanokernel? |
| 955 |
< |
if (gpr(1) != KernelDataAddr && interrupt_depth == 1) { |
| 1036 |
< |
interrupt_context ctx(this, "PowerPC mode"); |
| 955 |
> |
if (r->gpr[1] != KernelDataAddr) { |
| 956 |
|
|
| 957 |
|
// Prepare for 68k interrupt level 1 |
| 958 |
|
WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1); |
| 974 |
|
case MODE_EMUL_OP: |
| 975 |
|
// 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0 |
| 976 |
|
if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) { |
| 1058 |
– |
interrupt_context ctx(this, "68k mode"); |
| 977 |
|
#if EMUL_TIME_STATS |
| 978 |
|
const clock_t interrupt_start = clock(); |
| 979 |
|
#endif |
| 1010 |
|
break; |
| 1011 |
|
#endif |
| 1012 |
|
} |
| 1095 |
– |
|
| 1096 |
– |
// We are done with this interrupt |
| 1097 |
– |
--interrupt_depth; |
| 1013 |
|
} |
| 1014 |
|
|
| 1015 |
|
static void get_resource(void); |
