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/* |
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* sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface |
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* |
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* SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig |
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* SheepShaver (C) 1997-2005 Christian Bauer and Marc Hellwig |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License as published by |
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// PowerPC EmulOp to exit from emulation looop |
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const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1; |
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|
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// Enable interrupt routine safety checks? |
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#define SAFE_INTERRUPT_PPC 1 |
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|
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// Enable Execute68k() safety checks? |
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#define SAFE_EXEC_68K 1 |
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|
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void init_decoder(); |
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void execute_sheep(uint32 opcode); |
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// CPU context to preserve on interrupt |
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class interrupt_context { |
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uint32 gpr[32]; |
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double fpr[32]; |
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uint32 pc; |
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uint32 lr; |
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uint32 ctr; |
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uint32 cr; |
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uint32 xer; |
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uint32 fpscr; |
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sheepshaver_cpu *cpu; |
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const char *where; |
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public: |
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interrupt_context(sheepshaver_cpu *_cpu, const char *_where); |
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~interrupt_context(); |
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}; |
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public: |
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// Constructor |
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// Handle MacOS interrupt |
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void interrupt(uint32 entry); |
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void handle_interrupt(); |
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// Make sure the SIGSEGV handler can access CPU registers |
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friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t); |
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void operator delete(void *p); |
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}; |
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// Memory allocator returning areas aligned on 16-byte boundaries |
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// Memory allocator returning sheepshaver_cpu objects aligned on 16-byte boundaries |
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// FORMAT: [ alignment ] magic identifier, offset to malloc'ed data, sheepshaver_cpu data |
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void *sheepshaver_cpu::operator new(size_t size) |
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{ |
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void *p; |
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const int ALIGN = 16; |
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#if defined(HAVE_POSIX_MEMALIGN) |
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if (posix_memalign(&p, 16, size) != 0) |
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// Allocate enough space for sheepshaver_cpu data + signature + align pad |
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uint8 *ptr = (uint8 *)malloc(size + ALIGN * 2); |
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if (ptr == NULL) |
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throw std::bad_alloc(); |
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#elif defined(HAVE_MEMALIGN) |
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p = memalign(16, size); |
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#elif defined(HAVE_VALLOC) |
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p = valloc(size); // page-aligned! |
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#else |
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/* XXX: handle padding ourselves */ |
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p = malloc(size); |
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#endif |
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return p; |
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// Align memory |
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int ofs = 0; |
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while ((((uintptr)ptr) % ALIGN) != 0) |
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ofs++, ptr++; |
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|
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// Insert signature and offset |
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struct aligned_block_t { |
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uint32 pad[(ALIGN - 8) / 4]; |
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uint32 signature; |
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uint32 offset; |
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uint8 data[sizeof(sheepshaver_cpu)]; |
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}; |
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aligned_block_t *blk = (aligned_block_t *)ptr; |
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blk->signature = FOURCC('S','C','P','U'); |
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blk->offset = ofs + (&blk->data[0] - (uint8 *)blk); |
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assert((((uintptr)&blk->data) % ALIGN) == 0); |
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return &blk->data[0]; |
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} |
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void sheepshaver_cpu::operator delete(void *p) |
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{ |
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#if defined(HAVE_MEMALIGN) || defined(HAVE_VALLOC) |
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#if defined(__GLIBC__) |
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// this is known to work only with GNU libc |
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free(p); |
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#endif |
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#else |
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free(p); |
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#endif |
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uint32 *blk = (uint32 *)p; |
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assert(blk[-2] == FOURCC('S','C','P','U')); |
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void *ptr = (void *)(((uintptr)p) - blk[-1]); |
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free(ptr); |
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} |
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sheepshaver_cpu::sheepshaver_cpu() |
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} |
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#endif |
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// CPU context to preserve on interrupt |
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sheepshaver_cpu::interrupt_context::interrupt_context(sheepshaver_cpu *_cpu, const char *_where) |
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{ |
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#if SAFE_INTERRUPT_PPC >= 2 |
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cpu = _cpu; |
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where = _where; |
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|
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// Save interrupt context |
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memcpy(&gpr[0], &cpu->gpr(0), sizeof(gpr)); |
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memcpy(&fpr[0], &cpu->fpr(0), sizeof(fpr)); |
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pc = cpu->pc(); |
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lr = cpu->lr(); |
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ctr = cpu->ctr(); |
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cr = cpu->get_cr(); |
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xer = cpu->get_xer(); |
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fpscr = cpu->fpscr(); |
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#endif |
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} |
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|
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sheepshaver_cpu::interrupt_context::~interrupt_context() |
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{ |
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#if SAFE_INTERRUPT_PPC >= 2 |
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// Check whether CPU context was preserved by interrupt |
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if (memcmp(&gpr[0], &cpu->gpr(0), sizeof(gpr)) != 0) { |
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printf("FATAL: %s: interrupt clobbers registers\n", where); |
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for (int i = 0; i < 32; i++) |
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if (gpr[i] != cpu->gpr(i)) |
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printf(" r%d: %08x -> %08x\n", i, gpr[i], cpu->gpr(i)); |
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} |
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if (memcmp(&fpr[0], &cpu->fpr(0), sizeof(fpr)) != 0) { |
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printf("FATAL: %s: interrupt clobbers registers\n", where); |
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for (int i = 0; i < 32; i++) |
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if (fpr[i] != cpu->fpr(i)) |
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printf(" r%d: %f -> %f\n", i, fpr[i], cpu->fpr(i)); |
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} |
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if (pc != cpu->pc()) |
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printf("FATAL: %s: interrupt clobbers PC\n", where); |
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if (lr != cpu->lr()) |
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printf("FATAL: %s: interrupt clobbers LR\n", where); |
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if (ctr != cpu->ctr()) |
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printf("FATAL: %s: interrupt clobbers CTR\n", where); |
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if (cr != cpu->get_cr()) |
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printf("FATAL: %s: interrupt clobbers CR\n", where); |
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if (xer != cpu->get_xer()) |
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printf("FATAL: %s: interrupt clobbers XER\n", where); |
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if (fpscr != cpu->fpscr()) |
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printf("FATAL: %s: interrupt clobbers FPSCR\n", where); |
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#endif |
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} |
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|
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// Handle MacOS interrupt |
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void sheepshaver_cpu::interrupt(uint32 entry) |
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{ |
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const clock_t interrupt_start = clock(); |
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#endif |
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#if SAFE_INTERRUPT_PPC |
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static int depth = 0; |
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if (depth != 0) |
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printf("FATAL: sheepshaver_cpu::interrupt() called more than once: %d\n", depth); |
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depth++; |
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#endif |
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// Save program counters and branch registers |
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uint32 saved_pc = pc(); |
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uint32 saved_lr = lr(); |
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#if EMUL_TIME_STATS |
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interrupt_time += (clock() - interrupt_start); |
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#endif |
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#if SAFE_INTERRUPT_PPC |
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depth--; |
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#endif |
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} |
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// Execute 68k routine |
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#error "FIXME: You don't have the capability to skip instruction within signal handlers" |
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#endif |
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printf("SIGSEGV\n"); |
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printf(" pc %p\n", fault_instruction); |
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printf(" ea %p\n", fault_address); |
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fprintf(stderr, "SIGSEGV\n"); |
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fprintf(stderr, " pc %p\n", fault_instruction); |
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fprintf(stderr, " ea %p\n", fault_address); |
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dump_registers(); |
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ppc_cpu->dump_log(); |
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enter_mon(); |
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#endif |
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} |
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void sheepshaver_cpu::handle_interrupt(void) |
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void HandleInterrupt(powerpc_registers *r) |
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{ |
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#ifdef USE_SDL_VIDEO |
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// We must fill in the events queue in the same thread that did call SDL_SetVideoMode() |
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if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0) |
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return; |
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// Do nothing if there is no pending interrupt |
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if (InterruptFlags == 0) |
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return; |
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// Current interrupt nest level |
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static int interrupt_depth = 0; |
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++interrupt_depth; |
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interrupt_count++; |
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#endif |
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// Disable MacOS stack sniffer |
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WriteMacInt32(0x110, 0); |
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// Interrupt action depends on current run mode |
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switch (ReadMacInt32(XLM_RUN_MODE)) { |
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case MODE_68K: |
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// 68k emulator active, trigger 68k interrupt level 1 |
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WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1); |
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set_cr(get_cr() | tswap32(kernel_data->v[0x674 >> 2])); |
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r->cr.set(r->cr.get() | tswap32(kernel_data->v[0x674 >> 2])); |
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break; |
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#if INTERRUPTS_IN_NATIVE_MODE |
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case MODE_NATIVE: |
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// 68k emulator inactive, in nanokernel? |
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if (gpr(1) != KernelDataAddr && interrupt_depth == 1) { |
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interrupt_context ctx(this, "PowerPC mode"); |
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if (r->gpr[1] != KernelDataAddr && interrupt_depth == 1) { |
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// Prepare for 68k interrupt level 1 |
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WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1); |
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case MODE_EMUL_OP: |
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// 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0 |
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if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) { |
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interrupt_context ctx(this, "68k mode"); |
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#if EMUL_TIME_STATS |
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const clock_t interrupt_start = clock(); |
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#endif |
