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/* |
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* sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface |
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* |
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< |
* SheepShaver (C) 1997-2002 Christian Bauer and Marc Hellwig |
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> |
* SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License as published by |
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#include "cpu/ppc/ppc-cpu.hpp" |
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#include "cpu/ppc/ppc-operations.hpp" |
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#include "cpu/ppc/ppc-instructions.hpp" |
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#include "thunks.h" |
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|
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// Used for NativeOp trampolines |
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#include "video.h" |
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#include "name_registry.h" |
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#include "serial.h" |
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#include "ether.h" |
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#include "timer.h" |
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|
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#include <stdio.h> |
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#include <stdlib.h> |
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#ifdef HAVE_MALLOC_H |
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#include <malloc.h> |
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#endif |
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|
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#ifdef USE_SDL_VIDEO |
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#include <SDL_events.h> |
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#endif |
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|
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#if ENABLE_MON |
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#include "mon.h" |
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#include "debug.h" |
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|
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// Emulation time statistics |
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#define EMUL_TIME_STATS 1 |
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#ifndef EMUL_TIME_STATS |
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#define EMUL_TIME_STATS 0 |
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#endif |
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|
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#if EMUL_TIME_STATS |
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static clock_t emul_start_time; |
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static uint32 interrupt_count = 0; |
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static uint32 interrupt_count = 0, ppc_interrupt_count = 0; |
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static clock_t interrupt_time = 0; |
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static uint32 exec68k_count = 0; |
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static clock_t exec68k_time = 0; |
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#endif |
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} |
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|
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// Enable multicore (main/interrupts) cpu emulation? |
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#define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0) |
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> |
// From main_*.cpp |
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extern uintptr SignalStackBase(); |
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|
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// From rsrc_patches.cpp |
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extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h); |
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|
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// PowerPC EmulOp to exit from emulation looop |
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const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1; |
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|
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// Enable interrupt routine safety checks? |
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#define SAFE_INTERRUPT_PPC 1 |
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|
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// Enable Execute68k() safety checks? |
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#define SAFE_EXEC_68K 1 |
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#define INTERRUPTS_IN_NATIVE_MODE 1 |
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|
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// Pointer to Kernel Data |
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static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE; |
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static KernelData * kernel_data; |
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|
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// SIGSEGV handler |
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static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t); |
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sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t); |
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|
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#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT |
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// Special trampolines for EmulOp and NativeOp |
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static uint8 *emul_op_trampoline; |
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static uint8 *native_op_trampoline; |
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#endif |
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|
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// JIT Compiler enabled? |
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static inline bool enable_jit_p() |
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void init_decoder(); |
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void execute_sheep(uint32 opcode); |
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|
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// CPU context to preserve on interrupt |
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class interrupt_context { |
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uint32 gpr[32]; |
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double fpr[32]; |
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uint32 pc; |
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uint32 lr; |
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uint32 ctr; |
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uint32 cr; |
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uint32 xer; |
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uint32 fpscr; |
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sheepshaver_cpu *cpu; |
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const char *where; |
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public: |
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interrupt_context(sheepshaver_cpu *_cpu, const char *_where); |
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~interrupt_context(); |
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}; |
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|
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public: |
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|
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// Constructor |
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sheepshaver_cpu(); |
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|
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// Condition Register accessors |
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// CR & XER accessors |
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uint32 get_cr() const { return cr().get(); } |
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void set_cr(uint32 v) { cr().set(v); } |
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uint32 get_xer() const { return xer().get(); } |
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void set_xer(uint32 v) { xer().set(v); } |
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|
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// Execute NATIVE_OP routine |
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void execute_native_op(uint32 native_op); |
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|
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// Execute EMUL_OP routine |
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void execute_emul_op(uint32 emul_op); |
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|
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// Execute 68k routine |
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void execute_68k(uint32 entry, M68kRegisters *r); |
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// Execute MacOS/PPC code |
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uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args); |
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|
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#if PPC_ENABLE_JIT |
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// Compile one instruction |
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virtual int compile1(codegen_context_t & cg_context); |
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#endif |
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// Resource manager thunk |
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void get_resource(uint32 old_get_resource); |
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|
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void interrupt(uint32 entry); |
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void handle_interrupt(); |
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|
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// Lazy memory allocator (one item at a time) |
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void *operator new(size_t size) |
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{ return allocator_helper< sheepshaver_cpu, lazy_allocator >::allocate(); } |
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void operator delete(void *p) |
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{ allocator_helper< sheepshaver_cpu, lazy_allocator >::deallocate(p); } |
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// FIXME: really make surre array allocation fail at link time? |
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void *operator new[](size_t); |
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void operator delete[](void *p); |
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|
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// Make sure the SIGSEGV handler can access CPU registers |
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friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t); |
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|
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// Memory allocator returning areas aligned on 16-byte boundaries |
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void *operator new(size_t size); |
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void operator delete(void *p); |
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}; |
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|
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< |
lazy_allocator< sheepshaver_cpu > allocator_helper< sheepshaver_cpu, lazy_allocator >::allocator; |
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> |
// Memory allocator returning areas aligned on 16-byte boundaries |
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void *sheepshaver_cpu::operator new(size_t size) |
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{ |
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void *p; |
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|
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#if defined(HAVE_POSIX_MEMALIGN) |
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if (posix_memalign(&p, 16, size) != 0) |
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throw std::bad_alloc(); |
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#elif defined(HAVE_MEMALIGN) |
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p = memalign(16, size); |
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> |
#elif defined(HAVE_VALLOC) |
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p = valloc(size); // page-aligned! |
219 |
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#else |
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> |
/* XXX: handle padding ourselves */ |
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p = malloc(size); |
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#endif |
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|
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return p; |
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} |
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> |
|
227 |
> |
void sheepshaver_cpu::operator delete(void *p) |
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{ |
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> |
#if defined(HAVE_MEMALIGN) || defined(HAVE_VALLOC) |
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#if defined(__GLIBC__) |
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// this is known to work only with GNU libc |
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free(p); |
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#endif |
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#else |
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free(p); |
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#endif |
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} |
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|
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sheepshaver_cpu::sheepshaver_cpu() |
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: powerpc_cpu(enable_jit_p()) |
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|
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void sheepshaver_cpu::init_decoder() |
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{ |
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#ifndef PPC_NO_STATIC_II_INDEX_TABLE |
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static bool initialized = false; |
168 |
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if (initialized) |
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return; |
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initialized = true; |
171 |
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#endif |
172 |
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|
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static const instr_info_t sheep_ii_table[] = { |
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{ "sheep", |
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(execute_pmf)&sheepshaver_cpu::execute_sheep, |
262 |
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} |
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} |
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|
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// Forward declaration for native opcode handler |
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static void NativeOp(int selector); |
193 |
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|
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/* NativeOp instruction format: |
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< |
+------------+--------------------------+--+----------+------------+ |
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< |
| 6 | |FN| OP | 2 | |
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< |
+------------+--------------------------+--+----------+------------+ |
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< |
0 5 |6 19 20 21 25 26 31 |
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> |
+------------+-------------------------+--+-----------+------------+ |
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> |
| 6 | |FN| OP | 2 | |
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> |
+------------+-------------------------+--+-----------+------------+ |
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> |
0 5 |6 18 19 20 25 26 31 |
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*/ |
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|
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< |
typedef bit_field< 20, 20 > FN_field; |
273 |
< |
typedef bit_field< 21, 25 > NATIVE_OP_field; |
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> |
typedef bit_field< 19, 19 > FN_field; |
273 |
> |
typedef bit_field< 20, 25 > NATIVE_OP_field; |
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typedef bit_field< 26, 31 > EMUL_OP_field; |
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|
276 |
+ |
// Execute EMUL_OP routine |
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void sheepshaver_cpu::execute_emul_op(uint32 emul_op) |
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+ |
{ |
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M68kRegisters r68; |
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WriteMacInt32(XLM_68K_R25, gpr(25)); |
281 |
+ |
WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP); |
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for (int i = 0; i < 8; i++) |
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+ |
r68.d[i] = gpr(8 + i); |
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for (int i = 0; i < 7; i++) |
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r68.a[i] = gpr(16 + i); |
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r68.a[7] = gpr(1); |
287 |
+ |
uint32 saved_cr = get_cr() & CR_field<2>::mask(); |
288 |
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uint32 saved_xer = get_xer(); |
289 |
+ |
EmulOp(&r68, gpr(24), emul_op); |
290 |
+ |
set_cr(saved_cr); |
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set_xer(saved_xer); |
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for (int i = 0; i < 8; i++) |
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+ |
gpr(8 + i) = r68.d[i]; |
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for (int i = 0; i < 7; i++) |
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gpr(16 + i) = r68.a[i]; |
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gpr(1) = r68.a[7]; |
297 |
+ |
WriteMacInt32(XLM_RUN_MODE, MODE_68K); |
298 |
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} |
299 |
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|
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// Execute SheepShaver instruction |
301 |
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void sheepshaver_cpu::execute_sheep(uint32 opcode) |
302 |
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{ |
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break; |
314 |
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|
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case 2: // EXEC_NATIVE |
316 |
< |
NativeOp(NATIVE_OP_field::extract(opcode)); |
316 |
> |
execute_native_op(NATIVE_OP_field::extract(opcode)); |
317 |
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if (FN_field::test(opcode)) |
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pc() = lr(); |
319 |
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else |
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pc() += 4; |
321 |
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break; |
322 |
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|
323 |
< |
default: { // EMUL_OP |
324 |
< |
M68kRegisters r68; |
230 |
< |
WriteMacInt32(XLM_68K_R25, gpr(25)); |
231 |
< |
WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP); |
232 |
< |
for (int i = 0; i < 8; i++) |
233 |
< |
r68.d[i] = gpr(8 + i); |
234 |
< |
for (int i = 0; i < 7; i++) |
235 |
< |
r68.a[i] = gpr(16 + i); |
236 |
< |
r68.a[7] = gpr(1); |
237 |
< |
EmulOp(&r68, gpr(24), EMUL_OP_field::extract(opcode) - 3); |
238 |
< |
for (int i = 0; i < 8; i++) |
239 |
< |
gpr(8 + i) = r68.d[i]; |
240 |
< |
for (int i = 0; i < 7; i++) |
241 |
< |
gpr(16 + i) = r68.a[i]; |
242 |
< |
gpr(1) = r68.a[7]; |
243 |
< |
WriteMacInt32(XLM_RUN_MODE, MODE_68K); |
323 |
> |
default: // EMUL_OP |
324 |
> |
execute_emul_op(EMUL_OP_field::extract(opcode) - 3); |
325 |
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pc() += 4; |
326 |
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break; |
327 |
|
} |
328 |
+ |
} |
329 |
+ |
|
330 |
+ |
// Compile one instruction |
331 |
+ |
#if PPC_ENABLE_JIT |
332 |
+ |
int sheepshaver_cpu::compile1(codegen_context_t & cg_context) |
333 |
+ |
{ |
334 |
+ |
const instr_info_t *ii = cg_context.instr_info; |
335 |
+ |
if (ii->mnemo != PPC_I(SHEEP)) |
336 |
+ |
return COMPILE_FAILURE; |
337 |
+ |
|
338 |
+ |
int status = COMPILE_FAILURE; |
339 |
+ |
powerpc_dyngen & dg = cg_context.codegen; |
340 |
+ |
uint32 opcode = cg_context.opcode; |
341 |
+ |
|
342 |
+ |
switch (opcode & 0x3f) { |
343 |
+ |
case 0: // EMUL_RETURN |
344 |
+ |
dg.gen_invoke(QuitEmulator); |
345 |
+ |
status = COMPILE_CODE_OK; |
346 |
+ |
break; |
347 |
+ |
|
348 |
+ |
case 1: // EXEC_RETURN |
349 |
+ |
dg.gen_spcflags_set(SPCFLAG_CPU_EXEC_RETURN); |
350 |
+ |
// Don't check for pending interrupts, we do know we have to |
351 |
+ |
// get out of this block ASAP |
352 |
+ |
dg.gen_exec_return(); |
353 |
+ |
status = COMPILE_EPILOGUE_OK; |
354 |
+ |
break; |
355 |
+ |
|
356 |
+ |
case 2: { // EXEC_NATIVE |
357 |
+ |
uint32 selector = NATIVE_OP_field::extract(opcode); |
358 |
+ |
switch (selector) { |
359 |
+ |
#if !PPC_REENTRANT_JIT |
360 |
+ |
// Filter out functions that may invoke Execute68k() or |
361 |
+ |
// CallMacOS(), this would break reentrancy as they could |
362 |
+ |
// invalidate the translation cache and even overwrite |
363 |
+ |
// continuation code when we are done with them. |
364 |
+ |
case NATIVE_PATCH_NAME_REGISTRY: |
365 |
+ |
dg.gen_invoke(DoPatchNameRegistry); |
366 |
+ |
status = COMPILE_CODE_OK; |
367 |
+ |
break; |
368 |
+ |
case NATIVE_VIDEO_INSTALL_ACCEL: |
369 |
+ |
dg.gen_invoke(VideoInstallAccel); |
370 |
+ |
status = COMPILE_CODE_OK; |
371 |
+ |
break; |
372 |
+ |
case NATIVE_VIDEO_VBL: |
373 |
+ |
dg.gen_invoke(VideoVBL); |
374 |
+ |
status = COMPILE_CODE_OK; |
375 |
+ |
break; |
376 |
+ |
case NATIVE_GET_RESOURCE: |
377 |
+ |
case NATIVE_GET_1_RESOURCE: |
378 |
+ |
case NATIVE_GET_IND_RESOURCE: |
379 |
+ |
case NATIVE_GET_1_IND_RESOURCE: |
380 |
+ |
case NATIVE_R_GET_RESOURCE: { |
381 |
+ |
static const uint32 get_resource_ptr[] = { |
382 |
+ |
XLM_GET_RESOURCE, |
383 |
+ |
XLM_GET_1_RESOURCE, |
384 |
+ |
XLM_GET_IND_RESOURCE, |
385 |
+ |
XLM_GET_1_IND_RESOURCE, |
386 |
+ |
XLM_R_GET_RESOURCE |
387 |
+ |
}; |
388 |
+ |
uint32 old_get_resource = ReadMacInt32(get_resource_ptr[selector - NATIVE_GET_RESOURCE]); |
389 |
+ |
typedef void (*func_t)(dyngen_cpu_base, uint32); |
390 |
+ |
func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::get_resource).ptr(); |
391 |
+ |
dg.gen_invoke_CPU_im(func, old_get_resource); |
392 |
+ |
status = COMPILE_CODE_OK; |
393 |
+ |
break; |
394 |
+ |
} |
395 |
+ |
case NATIVE_CHECK_LOAD_INVOC: |
396 |
+ |
dg.gen_load_T0_GPR(3); |
397 |
+ |
dg.gen_load_T1_GPR(4); |
398 |
+ |
dg.gen_se_16_32_T1(); |
399 |
+ |
dg.gen_load_T2_GPR(5); |
400 |
+ |
dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))check_load_invoc); |
401 |
+ |
status = COMPILE_CODE_OK; |
402 |
+ |
break; |
403 |
+ |
#endif |
404 |
+ |
case NATIVE_BITBLT: |
405 |
+ |
dg.gen_load_T0_GPR(3); |
406 |
+ |
dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt); |
407 |
+ |
status = COMPILE_CODE_OK; |
408 |
+ |
break; |
409 |
+ |
case NATIVE_INVRECT: |
410 |
+ |
dg.gen_load_T0_GPR(3); |
411 |
+ |
dg.gen_invoke_T0((void (*)(uint32))NQD_invrect); |
412 |
+ |
status = COMPILE_CODE_OK; |
413 |
+ |
break; |
414 |
+ |
case NATIVE_FILLRECT: |
415 |
+ |
dg.gen_load_T0_GPR(3); |
416 |
+ |
dg.gen_invoke_T0((void (*)(uint32))NQD_fillrect); |
417 |
+ |
status = COMPILE_CODE_OK; |
418 |
+ |
break; |
419 |
+ |
} |
420 |
+ |
// Could we fully translate this NativeOp? |
421 |
+ |
if (status == COMPILE_CODE_OK) { |
422 |
+ |
if (!FN_field::test(opcode)) |
423 |
+ |
cg_context.done_compile = false; |
424 |
+ |
else { |
425 |
+ |
dg.gen_load_A0_LR(); |
426 |
+ |
dg.gen_set_PC_A0(); |
427 |
+ |
cg_context.done_compile = true; |
428 |
+ |
} |
429 |
+ |
break; |
430 |
+ |
} |
431 |
+ |
#if PPC_REENTRANT_JIT |
432 |
+ |
// Try to execute NativeOp trampoline |
433 |
+ |
if (!FN_field::test(opcode)) |
434 |
+ |
dg.gen_set_PC_im(cg_context.pc + 4); |
435 |
+ |
else { |
436 |
+ |
dg.gen_load_A0_LR(); |
437 |
+ |
dg.gen_set_PC_A0(); |
438 |
+ |
} |
439 |
+ |
dg.gen_mov_32_T0_im(selector); |
440 |
+ |
dg.gen_jmp(native_op_trampoline); |
441 |
+ |
cg_context.done_compile = true; |
442 |
+ |
status = COMPILE_EPILOGUE_OK; |
443 |
+ |
break; |
444 |
+ |
#endif |
445 |
+ |
// Invoke NativeOp handler |
446 |
+ |
if (!FN_field::test(opcode)) { |
447 |
+ |
typedef void (*func_t)(dyngen_cpu_base, uint32); |
448 |
+ |
func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr(); |
449 |
+ |
dg.gen_invoke_CPU_im(func, selector); |
450 |
+ |
cg_context.done_compile = false; |
451 |
+ |
status = COMPILE_CODE_OK; |
452 |
+ |
} |
453 |
+ |
// Otherwise, let it generate a call to execute_sheep() which |
454 |
+ |
// will cause necessary updates to the program counter |
455 |
+ |
break; |
456 |
|
} |
457 |
+ |
|
458 |
+ |
default: { // EMUL_OP |
459 |
+ |
uint32 emul_op = EMUL_OP_field::extract(opcode) - 3; |
460 |
+ |
#if PPC_REENTRANT_JIT |
461 |
+ |
// Try to execute EmulOp trampoline |
462 |
+ |
dg.gen_set_PC_im(cg_context.pc + 4); |
463 |
+ |
dg.gen_mov_32_T0_im(emul_op); |
464 |
+ |
dg.gen_jmp(emul_op_trampoline); |
465 |
+ |
cg_context.done_compile = true; |
466 |
+ |
status = COMPILE_EPILOGUE_OK; |
467 |
+ |
break; |
468 |
+ |
#endif |
469 |
+ |
// Invoke EmulOp handler |
470 |
+ |
typedef void (*func_t)(dyngen_cpu_base, uint32); |
471 |
+ |
func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr(); |
472 |
+ |
dg.gen_invoke_CPU_im(func, emul_op); |
473 |
+ |
cg_context.done_compile = false; |
474 |
+ |
status = COMPILE_CODE_OK; |
475 |
+ |
break; |
476 |
+ |
} |
477 |
+ |
} |
478 |
+ |
return status; |
479 |
+ |
} |
480 |
+ |
#endif |
481 |
+ |
|
482 |
+ |
// CPU context to preserve on interrupt |
483 |
+ |
sheepshaver_cpu::interrupt_context::interrupt_context(sheepshaver_cpu *_cpu, const char *_where) |
484 |
+ |
{ |
485 |
+ |
#if SAFE_INTERRUPT_PPC >= 2 |
486 |
+ |
cpu = _cpu; |
487 |
+ |
where = _where; |
488 |
+ |
|
489 |
+ |
// Save interrupt context |
490 |
+ |
memcpy(&gpr[0], &cpu->gpr(0), sizeof(gpr)); |
491 |
+ |
memcpy(&fpr[0], &cpu->fpr(0), sizeof(fpr)); |
492 |
+ |
pc = cpu->pc(); |
493 |
+ |
lr = cpu->lr(); |
494 |
+ |
ctr = cpu->ctr(); |
495 |
+ |
cr = cpu->get_cr(); |
496 |
+ |
xer = cpu->get_xer(); |
497 |
+ |
fpscr = cpu->fpscr(); |
498 |
+ |
#endif |
499 |
+ |
} |
500 |
+ |
|
501 |
+ |
sheepshaver_cpu::interrupt_context::~interrupt_context() |
502 |
+ |
{ |
503 |
+ |
#if SAFE_INTERRUPT_PPC >= 2 |
504 |
+ |
// Check whether CPU context was preserved by interrupt |
505 |
+ |
if (memcmp(&gpr[0], &cpu->gpr(0), sizeof(gpr)) != 0) { |
506 |
+ |
printf("FATAL: %s: interrupt clobbers registers\n", where); |
507 |
+ |
for (int i = 0; i < 32; i++) |
508 |
+ |
if (gpr[i] != cpu->gpr(i)) |
509 |
+ |
printf(" r%d: %08x -> %08x\n", i, gpr[i], cpu->gpr(i)); |
510 |
+ |
} |
511 |
+ |
if (memcmp(&fpr[0], &cpu->fpr(0), sizeof(fpr)) != 0) { |
512 |
+ |
printf("FATAL: %s: interrupt clobbers registers\n", where); |
513 |
+ |
for (int i = 0; i < 32; i++) |
514 |
+ |
if (fpr[i] != cpu->fpr(i)) |
515 |
+ |
printf(" r%d: %f -> %f\n", i, fpr[i], cpu->fpr(i)); |
516 |
+ |
} |
517 |
+ |
if (pc != cpu->pc()) |
518 |
+ |
printf("FATAL: %s: interrupt clobbers PC\n", where); |
519 |
+ |
if (lr != cpu->lr()) |
520 |
+ |
printf("FATAL: %s: interrupt clobbers LR\n", where); |
521 |
+ |
if (ctr != cpu->ctr()) |
522 |
+ |
printf("FATAL: %s: interrupt clobbers CTR\n", where); |
523 |
+ |
if (cr != cpu->get_cr()) |
524 |
+ |
printf("FATAL: %s: interrupt clobbers CR\n", where); |
525 |
+ |
if (xer != cpu->get_xer()) |
526 |
+ |
printf("FATAL: %s: interrupt clobbers XER\n", where); |
527 |
+ |
if (fpscr != cpu->fpscr()) |
528 |
+ |
printf("FATAL: %s: interrupt clobbers FPSCR\n", where); |
529 |
+ |
#endif |
530 |
|
} |
531 |
|
|
532 |
|
// Handle MacOS interrupt |
533 |
|
void sheepshaver_cpu::interrupt(uint32 entry) |
534 |
|
{ |
535 |
|
#if EMUL_TIME_STATS |
536 |
< |
interrupt_count++; |
536 |
> |
ppc_interrupt_count++; |
537 |
|
const clock_t interrupt_start = clock(); |
538 |
|
#endif |
539 |
|
|
540 |
< |
#if !MULTICORE_CPU |
540 |
> |
#if SAFE_INTERRUPT_PPC |
541 |
> |
static int depth = 0; |
542 |
> |
if (depth != 0) |
543 |
> |
printf("FATAL: sheepshaver_cpu::interrupt() called more than once: %d\n", depth); |
544 |
> |
depth++; |
545 |
> |
#endif |
546 |
> |
|
547 |
|
// Save program counters and branch registers |
548 |
|
uint32 saved_pc = pc(); |
549 |
|
uint32 saved_lr = lr(); |
550 |
|
uint32 saved_ctr= ctr(); |
551 |
|
uint32 saved_sp = gpr(1); |
264 |
– |
#endif |
552 |
|
|
553 |
|
// Initialize stack pointer to SheepShaver alternate stack base |
554 |
< |
gpr(1) = SheepStack1Base - 64; |
554 |
> |
gpr(1) = SignalStackBase() - 64; |
555 |
|
|
556 |
|
// Build trampoline to return from interrupt |
557 |
< |
uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) }; |
557 |
> |
SheepVar32 trampoline = POWERPC_EXEC_RETURN; |
558 |
|
|
559 |
|
// Prepare registers for nanokernel interrupt routine |
560 |
|
kernel_data->v[0x004 >> 2] = htonl(gpr(1)); |
573 |
|
gpr(1) = KernelDataAddr; |
574 |
|
gpr(7) = ntohl(kernel_data->v[0x660 >> 2]); |
575 |
|
gpr(8) = 0; |
576 |
< |
gpr(10) = (uint32)trampoline; |
577 |
< |
gpr(12) = (uint32)trampoline; |
576 |
> |
gpr(10) = trampoline.addr(); |
577 |
> |
gpr(12) = trampoline.addr(); |
578 |
|
gpr(13) = get_cr(); |
579 |
|
|
580 |
|
// rlwimi. r7,r7,8,0,0 |
588 |
|
// Enter nanokernel |
589 |
|
execute(entry); |
590 |
|
|
304 |
– |
#if !MULTICORE_CPU |
591 |
|
// Restore program counters and branch registers |
592 |
|
pc() = saved_pc; |
593 |
|
lr() = saved_lr; |
594 |
|
ctr()= saved_ctr; |
595 |
|
gpr(1) = saved_sp; |
310 |
– |
#endif |
596 |
|
|
597 |
|
#if EMUL_TIME_STATS |
598 |
|
interrupt_time += (clock() - interrupt_start); |
599 |
|
#endif |
600 |
+ |
|
601 |
+ |
#if SAFE_INTERRUPT_PPC |
602 |
+ |
depth--; |
603 |
+ |
#endif |
604 |
|
} |
605 |
|
|
606 |
|
// Execute 68k routine |
713 |
|
uint32 saved_ctr= ctr(); |
714 |
|
|
715 |
|
// Build trampoline with EXEC_RETURN |
716 |
< |
uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) }; |
717 |
< |
lr() = (uint32)trampoline; |
716 |
> |
SheepVar32 trampoline = POWERPC_EXEC_RETURN; |
717 |
> |
lr() = trampoline.addr(); |
718 |
|
|
719 |
|
gpr(1) -= 64; // Create stack frame |
720 |
|
uint32 proc = ReadMacInt32(tvect); // Get routine address |
758 |
|
// Save branch registers |
759 |
|
uint32 saved_lr = lr(); |
760 |
|
|
761 |
< |
const uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) }; |
762 |
< |
lr() = (uint32)trampoline; |
761 |
> |
SheepVar32 trampoline = POWERPC_EXEC_RETURN; |
762 |
> |
WriteMacInt32(trampoline.addr(), POWERPC_EXEC_RETURN); |
763 |
> |
lr() = trampoline.addr(); |
764 |
|
|
765 |
|
execute(entry); |
766 |
|
|
769 |
|
} |
770 |
|
|
771 |
|
// Resource Manager thunk |
482 |
– |
extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h); |
483 |
– |
|
772 |
|
inline void sheepshaver_cpu::get_resource(uint32 old_get_resource) |
773 |
|
{ |
774 |
|
uint32 type = gpr(3); |
794 |
|
* SheepShaver CPU engine interface |
795 |
|
**/ |
796 |
|
|
797 |
< |
static sheepshaver_cpu *main_cpu = NULL; // CPU emulator to handle usual control flow |
798 |
< |
static sheepshaver_cpu *interrupt_cpu = NULL; // CPU emulator to handle interrupts |
511 |
< |
static sheepshaver_cpu *current_cpu = NULL; // Current CPU emulator context |
797 |
> |
// PowerPC CPU emulator |
798 |
> |
static sheepshaver_cpu *ppc_cpu = NULL; |
799 |
|
|
800 |
|
void FlushCodeCache(uintptr start, uintptr end) |
801 |
|
{ |
802 |
|
D(bug("FlushCodeCache(%08x, %08x)\n", start, end)); |
803 |
< |
main_cpu->invalidate_cache_range(start, end); |
517 |
< |
#if MULTICORE_CPU |
518 |
< |
interrupt_cpu->invalidate_cache_range(start, end); |
519 |
< |
#endif |
520 |
< |
} |
521 |
< |
|
522 |
< |
static inline void cpu_push(sheepshaver_cpu *new_cpu) |
523 |
< |
{ |
524 |
< |
#if MULTICORE_CPU |
525 |
< |
current_cpu = new_cpu; |
526 |
< |
#endif |
527 |
< |
} |
528 |
< |
|
529 |
< |
static inline void cpu_pop() |
530 |
< |
{ |
531 |
< |
#if MULTICORE_CPU |
532 |
< |
current_cpu = main_cpu; |
533 |
< |
#endif |
803 |
> |
ppc_cpu->invalidate_cache_range(start, end); |
804 |
|
} |
805 |
|
|
806 |
|
// Dump PPC registers |
807 |
|
static void dump_registers(void) |
808 |
|
{ |
809 |
< |
current_cpu->dump_registers(); |
809 |
> |
ppc_cpu->dump_registers(); |
810 |
|
} |
811 |
|
|
812 |
|
// Dump log |
813 |
|
static void dump_log(void) |
814 |
|
{ |
815 |
< |
current_cpu->dump_log(); |
815 |
> |
ppc_cpu->dump_log(); |
816 |
|
} |
817 |
|
|
818 |
|
/* |
819 |
|
* Initialize CPU emulation |
820 |
|
*/ |
821 |
|
|
822 |
< |
static sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction) |
822 |
> |
sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction) |
823 |
|
{ |
824 |
|
#if ENABLE_VOSF |
825 |
|
// Handle screen fault |
831 |
|
const uintptr addr = (uintptr)fault_address; |
832 |
|
#if HAVE_SIGSEGV_SKIP_INSTRUCTION |
833 |
|
// Ignore writes to ROM |
834 |
< |
if ((addr - ROM_BASE) < ROM_SIZE) |
834 |
> |
if ((addr - (uintptr)ROMBaseHost) < ROM_SIZE) |
835 |
|
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
836 |
|
|
837 |
|
// Get program counter of target CPU |
838 |
< |
sheepshaver_cpu * const cpu = current_cpu; |
838 |
> |
sheepshaver_cpu * const cpu = ppc_cpu; |
839 |
|
const uint32 pc = cpu->pc(); |
840 |
|
|
841 |
|
// Fault in Mac ROM or RAM? |
842 |
< |
bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize)); |
842 |
> |
bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize)) || (pc >= DR_CACHE_BASE && pc < (DR_CACHE_BASE + DR_CACHE_SIZE)); |
843 |
|
if (mac_fault) { |
844 |
|
|
845 |
|
// "VM settings" during MacOS 8 installation |
859 |
|
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
860 |
|
else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000)) |
861 |
|
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
862 |
+ |
|
863 |
+ |
// MacOS 8.6 serial drivers on startup (with DR Cache and OldWorld ROM) |
864 |
+ |
else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(16) == 0xf3012002 || cpu->gpr(16) == 0xf3012000)) |
865 |
+ |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
866 |
+ |
else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000)) |
867 |
+ |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
868 |
+ |
|
869 |
+ |
// Ignore writes to the zero page |
870 |
+ |
else if ((uint32)(addr - SheepMem::ZeroPage()) < (uint32)SheepMem::PageSize()) |
871 |
+ |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
872 |
|
|
873 |
|
// Ignore all other faults, if requested |
874 |
|
if (PrefsFindBool("ignoresegv")) |
881 |
|
printf("SIGSEGV\n"); |
882 |
|
printf(" pc %p\n", fault_instruction); |
883 |
|
printf(" ea %p\n", fault_address); |
604 |
– |
printf(" cpu %s\n", current_cpu == main_cpu ? "main" : "interrupts"); |
884 |
|
dump_registers(); |
885 |
< |
current_cpu->dump_log(); |
885 |
> |
ppc_cpu->dump_log(); |
886 |
|
enter_mon(); |
887 |
|
QuitEmulator(); |
888 |
|
|
891 |
|
|
892 |
|
void init_emul_ppc(void) |
893 |
|
{ |
894 |
+ |
// Get pointer to KernelData in host address space |
895 |
+ |
kernel_data = (KernelData *)Mac2HostAddr(KERNEL_DATA_BASE); |
896 |
+ |
|
897 |
|
// Initialize main CPU emulator |
898 |
< |
main_cpu = new sheepshaver_cpu(); |
899 |
< |
main_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000)); |
898 |
> |
ppc_cpu = new sheepshaver_cpu(); |
899 |
> |
ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000)); |
900 |
> |
ppc_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000)); |
901 |
|
WriteMacInt32(XLM_RUN_MODE, MODE_68K); |
902 |
|
|
620 |
– |
#if MULTICORE_CPU |
621 |
– |
// Initialize alternate CPU emulator to handle interrupts |
622 |
– |
interrupt_cpu = new sheepshaver_cpu(); |
623 |
– |
#endif |
624 |
– |
|
625 |
– |
// Install the handler for SIGSEGV |
626 |
– |
sigsegv_install_handler(sigsegv_handler); |
627 |
– |
|
903 |
|
#if ENABLE_MON |
904 |
|
// Install "regs" command in cxmon |
905 |
|
mon_add_command("regs", dump_registers, "regs Dump PowerPC registers\n"); |
925 |
|
printf("Total emulation time : %.1f sec\n", double(emul_time) / double(CLOCKS_PER_SEC)); |
926 |
|
printf("Total interrupt count: %d (%2.1f Hz)\n", interrupt_count, |
927 |
|
(double(interrupt_count) * CLOCKS_PER_SEC) / double(emul_time)); |
928 |
+ |
printf("Total ppc interrupt count: %d (%2.1f %%)\n", ppc_interrupt_count, |
929 |
+ |
(double(ppc_interrupt_count) * 100.0) / double(interrupt_count)); |
930 |
|
|
931 |
|
#define PRINT_STATS(LABEL, VAR_PREFIX) do { \ |
932 |
|
printf("Total " LABEL " count : %d\n", VAR_PREFIX##_count); \ |
943 |
|
printf("\n"); |
944 |
|
#endif |
945 |
|
|
946 |
< |
delete main_cpu; |
670 |
< |
#if MULTICORE_CPU |
671 |
< |
delete interrupt_cpu; |
672 |
< |
#endif |
946 |
> |
delete ppc_cpu; |
947 |
|
} |
948 |
|
|
949 |
+ |
#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT |
950 |
+ |
// Initialize EmulOp trampolines |
951 |
+ |
void init_emul_op_trampolines(basic_dyngen & dg) |
952 |
+ |
{ |
953 |
+ |
typedef void (*func_t)(dyngen_cpu_base, uint32); |
954 |
+ |
func_t func; |
955 |
+ |
|
956 |
+ |
// EmulOp |
957 |
+ |
emul_op_trampoline = dg.gen_start(); |
958 |
+ |
func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr(); |
959 |
+ |
dg.gen_invoke_CPU_T0(func); |
960 |
+ |
dg.gen_exec_return(); |
961 |
+ |
dg.gen_end(); |
962 |
+ |
|
963 |
+ |
// NativeOp |
964 |
+ |
native_op_trampoline = dg.gen_start(); |
965 |
+ |
func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr(); |
966 |
+ |
dg.gen_invoke_CPU_T0(func); |
967 |
+ |
dg.gen_exec_return(); |
968 |
+ |
dg.gen_end(); |
969 |
+ |
|
970 |
+ |
D(bug("EmulOp trampoline: %p\n", emul_op_trampoline)); |
971 |
+ |
D(bug("NativeOp trampoline: %p\n", native_op_trampoline)); |
972 |
+ |
} |
973 |
+ |
#endif |
974 |
+ |
|
975 |
|
/* |
976 |
|
* Emulation loop |
977 |
|
*/ |
978 |
|
|
979 |
|
void emul_ppc(uint32 entry) |
980 |
|
{ |
981 |
< |
current_cpu = main_cpu; |
982 |
< |
#if DEBUG |
683 |
< |
current_cpu->start_log(); |
981 |
> |
#if 0 |
982 |
> |
ppc_cpu->start_log(); |
983 |
|
#endif |
984 |
|
// start emulation loop and enable code translation or caching |
985 |
< |
current_cpu->execute(entry); |
985 |
> |
ppc_cpu->execute(entry); |
986 |
|
} |
987 |
|
|
988 |
|
/* |
989 |
|
* Handle PowerPC interrupt |
990 |
|
*/ |
991 |
|
|
693 |
– |
#if ASYNC_IRQ |
694 |
– |
void HandleInterrupt(void) |
695 |
– |
{ |
696 |
– |
main_cpu->handle_interrupt(); |
697 |
– |
} |
698 |
– |
#else |
992 |
|
void TriggerInterrupt(void) |
993 |
|
{ |
994 |
|
#if 0 |
995 |
|
WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1); |
996 |
|
#else |
997 |
|
// Trigger interrupt to main cpu only |
998 |
< |
if (main_cpu) |
999 |
< |
main_cpu->trigger_interrupt(); |
998 |
> |
if (ppc_cpu) |
999 |
> |
ppc_cpu->trigger_interrupt(); |
1000 |
|
#endif |
1001 |
|
} |
709 |
– |
#endif |
1002 |
|
|
1003 |
|
void sheepshaver_cpu::handle_interrupt(void) |
1004 |
|
{ |
1005 |
+ |
#ifdef USE_SDL_VIDEO |
1006 |
+ |
// We must fill in the events queue in the same thread that did call SDL_SetVideoMode() |
1007 |
+ |
SDL_PumpEvents(); |
1008 |
+ |
#endif |
1009 |
+ |
|
1010 |
|
// Do nothing if interrupts are disabled |
1011 |
< |
if (*(int32 *)XLM_IRQ_NEST > 0) |
1011 |
> |
if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0) |
1012 |
|
return; |
1013 |
|
|
1014 |
< |
// Do nothing if there is no interrupt pending |
1015 |
< |
if (InterruptFlags == 0) |
1016 |
< |
return; |
1014 |
> |
// Current interrupt nest level |
1015 |
> |
static int interrupt_depth = 0; |
1016 |
> |
++interrupt_depth; |
1017 |
> |
#if EMUL_TIME_STATS |
1018 |
> |
interrupt_count++; |
1019 |
> |
#endif |
1020 |
|
|
1021 |
|
// Disable MacOS stack sniffer |
1022 |
|
WriteMacInt32(0x110, 0); |
1025 |
|
switch (ReadMacInt32(XLM_RUN_MODE)) { |
1026 |
|
case MODE_68K: |
1027 |
|
// 68k emulator active, trigger 68k interrupt level 1 |
728 |
– |
assert(current_cpu == main_cpu); |
1028 |
|
WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1); |
1029 |
|
set_cr(get_cr() | tswap32(kernel_data->v[0x674 >> 2])); |
1030 |
|
break; |
1032 |
|
#if INTERRUPTS_IN_NATIVE_MODE |
1033 |
|
case MODE_NATIVE: |
1034 |
|
// 68k emulator inactive, in nanokernel? |
1035 |
< |
assert(current_cpu == main_cpu); |
1036 |
< |
if (gpr(1) != KernelDataAddr) { |
1035 |
> |
if (gpr(1) != KernelDataAddr && interrupt_depth == 1) { |
1036 |
> |
interrupt_context ctx(this, "PowerPC mode"); |
1037 |
> |
|
1038 |
|
// Prepare for 68k interrupt level 1 |
1039 |
|
WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1); |
1040 |
|
WriteMacInt32(tswap32(kernel_data->v[0x658 >> 2]) + 0xdc, |
1043 |
|
|
1044 |
|
// Execute nanokernel interrupt routine (this will activate the 68k emulator) |
1045 |
|
DisableInterrupt(); |
746 |
– |
cpu_push(interrupt_cpu); |
1046 |
|
if (ROMType == ROMTYPE_NEWWORLD) |
1047 |
< |
current_cpu->interrupt(ROM_BASE + 0x312b1c); |
1047 |
> |
ppc_cpu->interrupt(ROM_BASE + 0x312b1c); |
1048 |
|
else |
1049 |
< |
current_cpu->interrupt(ROM_BASE + 0x312a3c); |
751 |
< |
cpu_pop(); |
1049 |
> |
ppc_cpu->interrupt(ROM_BASE + 0x312a3c); |
1050 |
|
} |
1051 |
|
break; |
1052 |
|
#endif |
1055 |
|
case MODE_EMUL_OP: |
1056 |
|
// 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0 |
1057 |
|
if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) { |
1058 |
+ |
interrupt_context ctx(this, "68k mode"); |
1059 |
+ |
#if EMUL_TIME_STATS |
1060 |
+ |
const clock_t interrupt_start = clock(); |
1061 |
+ |
#endif |
1062 |
|
#if 1 |
1063 |
|
// Execute full 68k interrupt routine |
1064 |
|
M68kRegisters r; |
1065 |
|
uint32 old_r25 = ReadMacInt32(XLM_68K_R25); // Save interrupt level |
1066 |
|
WriteMacInt32(XLM_68K_R25, 0x21); // Execute with interrupt level 1 |
1067 |
< |
static const uint8 proc[] = { |
1067 |
> |
static const uint8 proc_template[] = { |
1068 |
|
0x3f, 0x3c, 0x00, 0x00, // move.w #$0000,-(sp) (fake format word) |
1069 |
|
0x48, 0x7a, 0x00, 0x0a, // pea @1(pc) (return address) |
1070 |
|
0x40, 0xe7, // move sr,-(sp) (saved SR) |
1072 |
|
0x4e, 0xd0, // jmp (a0) |
1073 |
|
M68K_RTS >> 8, M68K_RTS & 0xff // @1 |
1074 |
|
}; |
1075 |
< |
Execute68k((uint32)proc, &r); |
1075 |
> |
BUILD_SHEEPSHAVER_PROCEDURE(proc); |
1076 |
> |
Execute68k(proc, &r); |
1077 |
|
WriteMacInt32(XLM_68K_R25, old_r25); // Restore interrupt level |
1078 |
|
#else |
1079 |
|
// Only update cursor |
1081 |
|
if (InterruptFlags & INTFLAG_VIA) { |
1082 |
|
ClearInterruptFlag(INTFLAG_VIA); |
1083 |
|
ADBInterrupt(); |
1084 |
< |
ExecutePPC(VideoVBL); |
1084 |
> |
ExecuteNative(NATIVE_VIDEO_VBL); |
1085 |
|
} |
1086 |
|
} |
1087 |
|
#endif |
1088 |
+ |
#if EMUL_TIME_STATS |
1089 |
+ |
interrupt_time += (clock() - interrupt_start); |
1090 |
+ |
#endif |
1091 |
|
} |
1092 |
|
break; |
1093 |
|
#endif |
1094 |
|
} |
789 |
– |
} |
1095 |
|
|
1096 |
< |
/* |
1097 |
< |
* Execute NATIVE_OP opcode (called by PowerPC emulator) |
1098 |
< |
*/ |
794 |
< |
|
795 |
< |
#define POWERPC_NATIVE_OP_INIT(LR, OP) \ |
796 |
< |
tswap32(POWERPC_EMUL_OP | ((LR) << 11) | (((uint32)OP) << 6) | 2) |
797 |
< |
|
798 |
< |
// FIXME: Make sure 32-bit relocations are used |
799 |
< |
const uint32 NativeOpTable[NATIVE_OP_MAX] = { |
800 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_PATCH_NAME_REGISTRY), |
801 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_INSTALL_ACCEL), |
802 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_VBL), |
803 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_DO_DRIVER_IO), |
804 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_IRQ), |
805 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_INIT), |
806 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_TERM), |
807 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_OPEN), |
808 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_CLOSE), |
809 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_WPUT), |
810 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_RSRV), |
811 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_NOTHING), |
812 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_OPEN), |
813 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_IN), |
814 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_OUT), |
815 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CONTROL), |
816 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_STATUS), |
817 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CLOSE), |
818 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_RESOURCE), |
819 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_RESOURCE), |
820 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_IND_RESOURCE), |
821 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_IND_RESOURCE), |
822 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_R_GET_RESOURCE), |
823 |
< |
POWERPC_NATIVE_OP_INIT(0, NATIVE_DISABLE_INTERRUPT), |
824 |
< |
POWERPC_NATIVE_OP_INIT(0, NATIVE_ENABLE_INTERRUPT), |
825 |
< |
POWERPC_NATIVE_OP_INIT(1, NATIVE_MAKE_EXECUTABLE), |
826 |
< |
}; |
1096 |
> |
// We are done with this interrupt |
1097 |
> |
--interrupt_depth; |
1098 |
> |
} |
1099 |
|
|
1100 |
|
static void get_resource(void); |
1101 |
|
static void get_1_resource(void); |
1103 |
|
static void get_1_ind_resource(void); |
1104 |
|
static void r_get_resource(void); |
1105 |
|
|
1106 |
< |
#define GPR(REG) current_cpu->gpr(REG) |
1107 |
< |
|
836 |
< |
static void NativeOp(int selector) |
1106 |
> |
// Execute NATIVE_OP routine |
1107 |
> |
void sheepshaver_cpu::execute_native_op(uint32 selector) |
1108 |
|
{ |
1109 |
|
#if EMUL_TIME_STATS |
1110 |
|
native_exec_count++; |
1122 |
|
VideoVBL(); |
1123 |
|
break; |
1124 |
|
case NATIVE_VIDEO_DO_DRIVER_IO: |
1125 |
< |
GPR(3) = (int32)(int16)VideoDoDriverIO((void *)GPR(3), (void *)GPR(4), |
855 |
< |
(void *)GPR(5), GPR(6), GPR(7)); |
1125 |
> |
gpr(3) = (int32)(int16)VideoDoDriverIO(gpr(3), gpr(4), gpr(5), gpr(6), gpr(7)); |
1126 |
|
break; |
857 |
– |
#ifdef WORDS_BIGENDIAN |
1127 |
|
case NATIVE_ETHER_IRQ: |
1128 |
|
EtherIRQ(); |
1129 |
|
break; |
1130 |
|
case NATIVE_ETHER_INIT: |
1131 |
< |
GPR(3) = InitStreamModule((void *)GPR(3)); |
1131 |
> |
gpr(3) = InitStreamModule((void *)gpr(3)); |
1132 |
|
break; |
1133 |
|
case NATIVE_ETHER_TERM: |
1134 |
|
TerminateStreamModule(); |
1135 |
|
break; |
1136 |
|
case NATIVE_ETHER_OPEN: |
1137 |
< |
GPR(3) = ether_open((queue_t *)GPR(3), (void *)GPR(4), GPR(5), GPR(6), (void*)GPR(7)); |
1137 |
> |
gpr(3) = ether_open((queue_t *)gpr(3), (void *)gpr(4), gpr(5), gpr(6), (void*)gpr(7)); |
1138 |
|
break; |
1139 |
|
case NATIVE_ETHER_CLOSE: |
1140 |
< |
GPR(3) = ether_close((queue_t *)GPR(3), GPR(4), (void *)GPR(5)); |
1140 |
> |
gpr(3) = ether_close((queue_t *)gpr(3), gpr(4), (void *)gpr(5)); |
1141 |
|
break; |
1142 |
|
case NATIVE_ETHER_WPUT: |
1143 |
< |
GPR(3) = ether_wput((queue_t *)GPR(3), (mblk_t *)GPR(4)); |
1143 |
> |
gpr(3) = ether_wput((queue_t *)gpr(3), (mblk_t *)gpr(4)); |
1144 |
|
break; |
1145 |
|
case NATIVE_ETHER_RSRV: |
1146 |
< |
GPR(3) = ether_rsrv((queue_t *)GPR(3)); |
1146 |
> |
gpr(3) = ether_rsrv((queue_t *)gpr(3)); |
1147 |
|
break; |
1148 |
< |
#else |
1149 |
< |
case NATIVE_ETHER_INIT: |
1150 |
< |
// FIXME: needs more complicated thunks |
1151 |
< |
GPR(3) = false; |
1148 |
> |
case NATIVE_SYNC_HOOK: |
1149 |
> |
gpr(3) = NQD_sync_hook(gpr(3)); |
1150 |
> |
break; |
1151 |
> |
case NATIVE_BITBLT_HOOK: |
1152 |
> |
gpr(3) = NQD_bitblt_hook(gpr(3)); |
1153 |
> |
break; |
1154 |
> |
case NATIVE_BITBLT: |
1155 |
> |
NQD_bitblt(gpr(3)); |
1156 |
> |
break; |
1157 |
> |
case NATIVE_FILLRECT_HOOK: |
1158 |
> |
gpr(3) = NQD_fillrect_hook(gpr(3)); |
1159 |
> |
break; |
1160 |
> |
case NATIVE_INVRECT: |
1161 |
> |
NQD_invrect(gpr(3)); |
1162 |
> |
break; |
1163 |
> |
case NATIVE_FILLRECT: |
1164 |
> |
NQD_fillrect(gpr(3)); |
1165 |
|
break; |
884 |
– |
#endif |
1166 |
|
case NATIVE_SERIAL_NOTHING: |
1167 |
|
case NATIVE_SERIAL_OPEN: |
1168 |
|
case NATIVE_SERIAL_PRIME_IN: |
1180 |
|
SerialStatus, |
1181 |
|
SerialClose |
1182 |
|
}; |
1183 |
< |
GPR(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](GPR(3), GPR(4)); |
1183 |
> |
gpr(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](gpr(3), gpr(4)); |
1184 |
|
break; |
1185 |
|
} |
1186 |
|
case NATIVE_GET_RESOURCE: |
1190 |
|
case NATIVE_R_GET_RESOURCE: { |
1191 |
|
typedef void (*GetResourceCallback)(void); |
1192 |
|
static const GetResourceCallback get_resource_callbacks[] = { |
1193 |
< |
get_resource, |
1194 |
< |
get_1_resource, |
1195 |
< |
get_ind_resource, |
1196 |
< |
get_1_ind_resource, |
1197 |
< |
r_get_resource |
1193 |
> |
::get_resource, |
1194 |
> |
::get_1_resource, |
1195 |
> |
::get_ind_resource, |
1196 |
> |
::get_1_ind_resource, |
1197 |
> |
::r_get_resource |
1198 |
|
}; |
1199 |
|
get_resource_callbacks[selector - NATIVE_GET_RESOURCE](); |
1200 |
|
break; |
1201 |
|
} |
921 |
– |
case NATIVE_DISABLE_INTERRUPT: |
922 |
– |
DisableInterrupt(); |
923 |
– |
break; |
924 |
– |
case NATIVE_ENABLE_INTERRUPT: |
925 |
– |
EnableInterrupt(); |
926 |
– |
break; |
1202 |
|
case NATIVE_MAKE_EXECUTABLE: |
1203 |
< |
MakeExecutable(0, (void *)GPR(4), GPR(5)); |
1203 |
> |
MakeExecutable(0, gpr(4), gpr(5)); |
1204 |
> |
break; |
1205 |
> |
case NATIVE_CHECK_LOAD_INVOC: |
1206 |
> |
check_load_invoc(gpr(3), gpr(4), gpr(5)); |
1207 |
|
break; |
1208 |
|
default: |
1209 |
|
printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector); |
1217 |
|
} |
1218 |
|
|
1219 |
|
/* |
942 |
– |
* Execute native subroutine (LR must contain return address) |
943 |
– |
*/ |
944 |
– |
|
945 |
– |
void ExecuteNative(int selector) |
946 |
– |
{ |
947 |
– |
uint32 tvect[2]; |
948 |
– |
tvect[0] = tswap32(POWERPC_NATIVE_OP_FUNC(selector)); |
949 |
– |
tvect[1] = 0; // Fake TVECT |
950 |
– |
RoutineDescriptor desc = BUILD_PPC_ROUTINE_DESCRIPTOR(0, tvect); |
951 |
– |
M68kRegisters r; |
952 |
– |
Execute68k((uint32)&desc, &r); |
953 |
– |
} |
954 |
– |
|
955 |
– |
/* |
1220 |
|
* Execute 68k subroutine (must be ended with EXEC_RETURN) |
1221 |
|
* This must only be called by the emul_thread when in EMUL_OP mode |
1222 |
|
* r->a[7] is unused, the routine runs on the caller's stack |
1224 |
|
|
1225 |
|
void Execute68k(uint32 pc, M68kRegisters *r) |
1226 |
|
{ |
1227 |
< |
current_cpu->execute_68k(pc, r); |
1227 |
> |
ppc_cpu->execute_68k(pc, r); |
1228 |
|
} |
1229 |
|
|
1230 |
|
/* |
1234 |
|
|
1235 |
|
void Execute68kTrap(uint16 trap, M68kRegisters *r) |
1236 |
|
{ |
1237 |
< |
uint16 proc[2]; |
1238 |
< |
proc[0] = htons(trap); |
1239 |
< |
proc[1] = htons(M68K_RTS); |
1240 |
< |
Execute68k((uint32)proc, r); |
1237 |
> |
SheepVar proc_var(4); |
1238 |
> |
uint32 proc = proc_var.addr(); |
1239 |
> |
WriteMacInt16(proc, trap); |
1240 |
> |
WriteMacInt16(proc + 2, M68K_RTS); |
1241 |
> |
Execute68k(proc, r); |
1242 |
|
} |
1243 |
|
|
1244 |
|
/* |
1247 |
|
|
1248 |
|
uint32 call_macos(uint32 tvect) |
1249 |
|
{ |
1250 |
< |
return current_cpu->execute_macos_code(tvect, 0, NULL); |
1250 |
> |
return ppc_cpu->execute_macos_code(tvect, 0, NULL); |
1251 |
|
} |
1252 |
|
|
1253 |
|
uint32 call_macos1(uint32 tvect, uint32 arg1) |
1254 |
|
{ |
1255 |
|
const uint32 args[] = { arg1 }; |
1256 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1256 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1257 |
|
} |
1258 |
|
|
1259 |
|
uint32 call_macos2(uint32 tvect, uint32 arg1, uint32 arg2) |
1260 |
|
{ |
1261 |
|
const uint32 args[] = { arg1, arg2 }; |
1262 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1262 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1263 |
|
} |
1264 |
|
|
1265 |
|
uint32 call_macos3(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3) |
1266 |
|
{ |
1267 |
|
const uint32 args[] = { arg1, arg2, arg3 }; |
1268 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1268 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1269 |
|
} |
1270 |
|
|
1271 |
|
uint32 call_macos4(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4) |
1272 |
|
{ |
1273 |
|
const uint32 args[] = { arg1, arg2, arg3, arg4 }; |
1274 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1274 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1275 |
|
} |
1276 |
|
|
1277 |
|
uint32 call_macos5(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5) |
1278 |
|
{ |
1279 |
|
const uint32 args[] = { arg1, arg2, arg3, arg4, arg5 }; |
1280 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1280 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1281 |
|
} |
1282 |
|
|
1283 |
|
uint32 call_macos6(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6) |
1284 |
|
{ |
1285 |
|
const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6 }; |
1286 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1286 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1287 |
|
} |
1288 |
|
|
1289 |
|
uint32 call_macos7(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6, uint32 arg7) |
1290 |
|
{ |
1291 |
|
const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6, arg7 }; |
1292 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1292 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1293 |
|
} |
1294 |
|
|
1295 |
|
/* |
1298 |
|
|
1299 |
|
void get_resource(void) |
1300 |
|
{ |
1301 |
< |
current_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE)); |
1301 |
> |
ppc_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE)); |
1302 |
|
} |
1303 |
|
|
1304 |
|
void get_1_resource(void) |
1305 |
|
{ |
1306 |
< |
current_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE)); |
1306 |
> |
ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE)); |
1307 |
|
} |
1308 |
|
|
1309 |
|
void get_ind_resource(void) |
1310 |
|
{ |
1311 |
< |
current_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE)); |
1311 |
> |
ppc_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE)); |
1312 |
|
} |
1313 |
|
|
1314 |
|
void get_1_ind_resource(void) |
1315 |
|
{ |
1316 |
< |
current_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE)); |
1316 |
> |
ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE)); |
1317 |
|
} |
1318 |
|
|
1319 |
|
void r_get_resource(void) |
1320 |
|
{ |
1321 |
< |
current_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE)); |
1321 |
> |
ppc_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE)); |
1322 |
|
} |