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root/cebix/SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.55 by gbeauche, 2004-12-18T18:40:04Z vs.
Revision 1.76 by asvitkine, 2009-08-18T18:26:11Z

#	Line 1 | Line 1
1		/*
2		*  sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface
3		*
4	<	*  SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig
4	>	*  SheepShaver (C) 1997-2008 Christian Bauer and Marc Hellwig
5		*
6		*  This program is free software; you can redistribute it and/or modify
7		*  it under the terms of the GNU General Public License as published by
#	Line 89 | Line 89 | extern uintptr SignalStackBase();
89
90		// From rsrc_patches.cpp
91		extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
92	+	extern "C" void named_check_load_invoc(uint32 type, uint32 name, uint32 h);
93
94		// PowerPC EmulOp to exit from emulation looop
95		const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1;
96
96	–	// Enable interrupt routine safety checks?
97	–	#define SAFE_INTERRUPT_PPC 1
98	–
97		// Enable Execute68k() safety checks?
98		#define SAFE_EXEC_68K 1
99
#	Line 120 | Line 118 | static uint8 *emul_op_trampoline;
118		static uint8 *native_op_trampoline;
119		#endif
120
123	–	// JIT Compiler enabled?
124	–	static inline bool enable_jit_p()
125	–	{
126	–	return PrefsFindBool("jit");
127	–	}
128	–
121
122		/**
123		*              PowerPC emulator glue with special 'sheep' opcodes
#	Line 142 | Line 134 | class sheepshaver_cpu
134		void init_decoder();
135		void execute_sheep(uint32 opcode);
136
145	–	// CPU context to preserve on interrupt
146	–	class interrupt_context {
147	–	uint32 gpr[32];
148	–	uint32 pc;
149	–	uint32 lr;
150	–	uint32 ctr;
151	–	uint32 cr;
152	–	uint32 xer;
153	–	sheepshaver_cpu *cpu;
154	–	const char *where;
155	–	public:
156	–	interrupt_context(sheepshaver_cpu *_cpu, const char *_where);
157	–	~interrupt_context();
158	–	};
159	–
137		public:
138
139		// Constructor
#	Line 192 | Line 169 | public:
169
170		// Handle MacOS interrupt
171		void interrupt(uint32 entry);
195	–	void handle_interrupt();
172
173		// Make sure the SIGSEGV handler can access CPU registers
174	<	friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
199	<
200	<	// Memory allocator returning areas aligned on 16-byte boundaries
201	<	void *operator new(size_t size);
202	<	void operator delete(void *p);
174	>	friend sigsegv_return_t sigsegv_handler(sigsegv_info_t *sip);
175		};
176
205	–	// Memory allocator returning areas aligned on 16-byte boundaries
206	–	void *sheepshaver_cpu::operator new(size_t size)
207	–	{
208	–	void *p;
209	–
210	–	#if defined(HAVE_POSIX_MEMALIGN)
211	–	if (posix_memalign(&p, 16, size) != 0)
212	–	throw std::bad_alloc();
213	–	#elif defined(HAVE_MEMALIGN)
214	–	p = memalign(16, size);
215	–	#elif defined(HAVE_VALLOC)
216	–	p = valloc(size); // page-aligned!
217	–	#else
218	–	/* XXX: handle padding ourselves */
219	–	p = malloc(size);
220	–	#endif
221	–
222	–	return p;
223	–	}
224	–
225	–	void sheepshaver_cpu::operator delete(void *p)
226	–	{
227	–	#if defined(HAVE_MEMALIGN) || defined(HAVE_VALLOC)
228	–	#if defined(__GLIBC__)
229	–	// this is known to work only with GNU libc
230	–	free(p);
231	–	#endif
232	–	#else
233	–	free(p);
234	–	#endif
235	–	}
236	–
177		sheepshaver_cpu::sheepshaver_cpu()
238	–	: powerpc_cpu(enable_jit_p())
178		{
179		init_decoder();
180	+
181	+	#if PPC_ENABLE_JIT
182	+	if (PrefsFindBool("jit"))
183	+	enable_jit();
184	+	#endif
185		}
186
187		void sheepshaver_cpu::init_decoder()
#	Line 245 | Line 189 | void sheepshaver_cpu::init_decoder()
189		static const instr_info_t sheep_ii_table[] = {
190		{ "sheep",
191		(execute_pmf)&sheepshaver_cpu::execute_sheep,
248	–	NULL,
192		PPC_I(SHEEP),
193		D_form, 6, 0, CFLOW_JUMP | CFLOW_TRAP
194		}
#	Line 282 | Line 225 | void sheepshaver_cpu::execute_emul_op(ui
225		for (int i = 0; i < 7; i++)
226		r68.a[i] = gpr(16 + i);
227		r68.a[7] = gpr(1);
228	<	uint32 saved_cr = get_cr() & CR_field<2>::mask();
228	>	uint32 saved_cr = get_cr() & 0xff9fffff; // mask_operand::compute(11, 8)
229		uint32 saved_xer = get_xer();
230		EmulOp(&r68, gpr(24), emul_op);
231		set_cr(saved_cr);
#	Line 390 | Line 333 | int sheepshaver_cpu::compile1(codegen_co
333		status = COMPILE_CODE_OK;
334		break;
335		}
336	+	#endif
337		case NATIVE_CHECK_LOAD_INVOC:
338		dg.gen_load_T0_GPR(3);
339		dg.gen_load_T1_GPR(4);
#	Line 398 | Line 342 | int sheepshaver_cpu::compile1(codegen_co
342		dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))check_load_invoc);
343		status = COMPILE_CODE_OK;
344		break;
345	<	#endif
346	<	case NATIVE_BITBLT:
345	>	case NATIVE_NAMED_CHECK_LOAD_INVOC:
346	>	dg.gen_load_T0_GPR(3);
347	>	dg.gen_load_T1_GPR(4);
348	>	dg.gen_load_T2_GPR(5);
349	>	dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))named_check_load_invoc);
350	>	status = COMPILE_CODE_OK;
351	>	break;
352	>	case NATIVE_NQD_SYNC_HOOK:
353	>	dg.gen_load_T0_GPR(3);
354	>	dg.gen_invoke_T0_ret_T0((uint32 (*)(uint32))NQD_sync_hook);
355	>	dg.gen_store_T0_GPR(3);
356	>	status = COMPILE_CODE_OK;
357	>	break;
358	>	case NATIVE_NQD_BITBLT_HOOK:
359	>	dg.gen_load_T0_GPR(3);
360	>	dg.gen_invoke_T0_ret_T0((uint32 (*)(uint32))NQD_bitblt_hook);
361	>	dg.gen_store_T0_GPR(3);
362	>	status = COMPILE_CODE_OK;
363	>	break;
364	>	case NATIVE_NQD_FILLRECT_HOOK:
365	>	dg.gen_load_T0_GPR(3);
366	>	dg.gen_invoke_T0_ret_T0((uint32 (*)(uint32))NQD_fillrect_hook);
367	>	dg.gen_store_T0_GPR(3);
368	>	status = COMPILE_CODE_OK;
369	>	break;
370	>	case NATIVE_NQD_UNKNOWN_HOOK:
371	>	dg.gen_load_T0_GPR(3);
372	>	dg.gen_invoke_T0_ret_T0((uint32 (*)(uint32))NQD_unknown_hook);
373	>	dg.gen_store_T0_GPR(3);
374	>	status = COMPILE_CODE_OK;
375	>	break;
376	>	case NATIVE_NQD_BITBLT:
377		dg.gen_load_T0_GPR(3);
378		dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt);
379		status = COMPILE_CODE_OK;
380		break;
381	<	case NATIVE_INVRECT:
381	>	case NATIVE_NQD_INVRECT:
382		dg.gen_load_T0_GPR(3);
383		dg.gen_invoke_T0((void (*)(uint32))NQD_invrect);
384		status = COMPILE_CODE_OK;
385		break;
386	<	case NATIVE_FILLRECT:
386	>	case NATIVE_NQD_FILLRECT:
387		dg.gen_load_T0_GPR(3);
388		dg.gen_invoke_T0((void (*)(uint32))NQD_fillrect);
389		status = COMPILE_CODE_OK;
#	Line 420 | Line 394 | int sheepshaver_cpu::compile1(codegen_co
394		if (!FN_field::test(opcode))
395		cg_context.done_compile = false;
396		else {
397	<	dg.gen_load_A0_LR();
398	<	dg.gen_set_PC_A0();
397	>	dg.gen_load_T0_LR_aligned();
398	>	dg.gen_set_PC_T0();
399		cg_context.done_compile = true;
400		}
401		break;
#	Line 431 | Line 405 | int sheepshaver_cpu::compile1(codegen_co
405		if (!FN_field::test(opcode))
406		dg.gen_set_PC_im(cg_context.pc + 4);
407		else {
408	<	dg.gen_load_A0_LR();
409	<	dg.gen_set_PC_A0();
408	>	dg.gen_load_T0_LR_aligned();
409	>	dg.gen_set_PC_T0();
410		}
411		dg.gen_mov_32_T0_im(selector);
412		dg.gen_jmp(native_op_trampoline);
#	Line 477 | Line 451 | int sheepshaver_cpu::compile1(codegen_co
451		}
452		#endif
453
480	–	// CPU context to preserve on interrupt
481	–	sheepshaver_cpu::interrupt_context::interrupt_context(sheepshaver_cpu *_cpu, const char *_where)
482	–	{
483	–	#if SAFE_INTERRUPT_PPC >= 2
484	–	cpu = _cpu;
485	–	where = _where;
486	–
487	–	// Save interrupt context
488	–	memcpy(&gpr[0], &cpu->gpr(0), sizeof(gpr));
489	–	pc = cpu->pc();
490	–	lr = cpu->lr();
491	–	ctr = cpu->ctr();
492	–	cr = cpu->get_cr();
493	–	xer = cpu->get_xer();
494	–	#endif
495	–	}
496	–
497	–	sheepshaver_cpu::interrupt_context::~interrupt_context()
498	–	{
499	–	#if SAFE_INTERRUPT_PPC >= 2
500	–	// Check whether CPU context was preserved by interrupt
501	–	if (memcmp(&gpr[0], &cpu->gpr(0), sizeof(gpr)) != 0) {
502	–	printf("FATAL: %s: interrupt clobbers registers\n", where);
503	–	for (int i = 0; i < 32; i++)
504	–	if (gpr[i] != cpu->gpr(i))
505	–	printf(" r%d: %08x -> %08x\n", i, gpr[i], cpu->gpr(i));
506	–	}
507	–	if (pc != cpu->pc())
508	–	printf("FATAL: %s: interrupt clobbers PC\n", where);
509	–	if (lr != cpu->lr())
510	–	printf("FATAL: %s: interrupt clobbers LR\n", where);
511	–	if (ctr != cpu->ctr())
512	–	printf("FATAL: %s: interrupt clobbers CTR\n", where);
513	–	if (cr != cpu->get_cr())
514	–	printf("FATAL: %s: interrupt clobbers CR\n", where);
515	–	if (xer != cpu->get_xer())
516	–	printf("FATAL: %s: interrupt clobbers XER\n", where);
517	–	#endif
518	–	}
519	–
454		// Handle MacOS interrupt
455		void sheepshaver_cpu::interrupt(uint32 entry)
456		{
#	Line 525 | Line 459 | void sheepshaver_cpu::interrupt(uint32 e
459		const clock_t interrupt_start = clock();
460		#endif
461
528	–	#if SAFE_INTERRUPT_PPC
529	–	static int depth = 0;
530	–	if (depth != 0)
531	–	printf("FATAL: sheepshaver_cpu::interrupt() called more than once: %d\n", depth);
532	–	depth++;
533	–	#endif
534	–
462		// Save program counters and branch registers
463		uint32 saved_pc = pc();
464		uint32 saved_lr = lr();
#	Line 585 | Line 512 | void sheepshaver_cpu::interrupt(uint32 e
512		#if EMUL_TIME_STATS
513		interrupt_time += (clock() - interrupt_start);
514		#endif
588	–
589	–	#if SAFE_INTERRUPT_PPC
590	–	depth--;
591	–	#endif
515		}
516
517		// Execute 68k routine
#	Line 807 | Line 730 | static void dump_log(void)
730		*  Initialize CPU emulation
731		*/
732
733	<	sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
733	>	sigsegv_return_t sigsegv_handler(sigsegv_info_t *sip)
734		{
735		#if ENABLE_VOSF
736		// Handle screen fault
737	<	extern bool Screen_fault_handler(sigsegv_address_t, sigsegv_address_t);
738	<	if (Screen_fault_handler(fault_address, fault_instruction))
737	>	extern bool Screen_fault_handler(sigsegv_info_t *sip);
738	>	if (Screen_fault_handler(sip))
739		return SIGSEGV_RETURN_SUCCESS;
740		#endif
741
742	<	const uintptr addr = (uintptr)fault_address;
742	>	const uintptr addr = (uintptr)sigsegv_get_fault_address(sip);
743		#if HAVE_SIGSEGV_SKIP_INSTRUCTION
744		// Ignore writes to ROM
745		if ((addr - (uintptr)ROMBaseHost) < ROM_SIZE)
#	Line 827 | Line 750 | sigsegv_return_t sigsegv_handler(sigsegv
750		const uint32 pc = cpu->pc();
751
752		// Fault in Mac ROM or RAM?
753	<	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize)) || (pc >= DR_CACHE_BASE && pc < (DR_CACHE_BASE + DR_CACHE_SIZE));
753	>	bool mac_fault = (pc >= ROMBase) && (pc < (ROMBase + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize)) || (pc >= DR_CACHE_BASE && pc < (DR_CACHE_BASE + DR_CACHE_SIZE));
754		if (mac_fault) {
755
756		// "VM settings" during MacOS 8 installation
757	<	if (pc == ROM_BASE + 0x488160 && cpu->gpr(20) == 0xf8000000)
757	>	if (pc == ROMBase + 0x488160 && cpu->gpr(20) == 0xf8000000)
758		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
759
760		// MacOS 8.5 installation
761	<	else if (pc == ROM_BASE + 0x488140 && cpu->gpr(16) == 0xf8000000)
761	>	else if (pc == ROMBase + 0x488140 && cpu->gpr(16) == 0xf8000000)
762		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
763
764		// MacOS 8 serial drivers on startup
765	<	else if (pc == ROM_BASE + 0x48e080 && (cpu->gpr(8) == 0xf3012002 || cpu->gpr(8) == 0xf3012000))
765	>	else if (pc == ROMBase + 0x48e080 && (cpu->gpr(8) == 0xf3012002 || cpu->gpr(8) == 0xf3012000))
766		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
767
768		// MacOS 8.1 serial drivers on startup
769	<	else if (pc == ROM_BASE + 0x48c5e0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
769	>	else if (pc == ROMBase + 0x48c5e0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
770		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
771	<	else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
771	>	else if (pc == ROMBase + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
772		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
773
774		// MacOS 8.6 serial drivers on startup (with DR Cache and OldWorld ROM)
#	Line 866 | Line 789 | sigsegv_return_t sigsegv_handler(sigsegv
789		#error "FIXME: You don't have the capability to skip instruction within signal handlers"
790		#endif
791
792	<	printf("SIGSEGV\n");
793	<	printf("  pc %p\n", fault_instruction);
794	<	printf("  ea %p\n", fault_address);
792	>	fprintf(stderr, "SIGSEGV\n");
793	>	fprintf(stderr, "  pc %p\n", sigsegv_get_fault_instruction_address(sip));
794	>	fprintf(stderr, "  ea %p\n", sigsegv_get_fault_address(sip));
795		dump_registers();
796		ppc_cpu->dump_log();
797		enter_mon();
#	Line 884 | Line 807 | void init_emul_ppc(void)
807
808		// Initialize main CPU emulator
809		ppc_cpu = new sheepshaver_cpu();
810	<	ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
810	>	ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROMBase + 0x30d000));
811		ppc_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
812		WriteMacInt32(XLM_RUN_MODE, MODE_68K);
813
#	Line 932 | Line 855 | void exit_emul_ppc(void)
855		#endif
856
857		delete ppc_cpu;
858	+	ppc_cpu = NULL;
859		}
860
861		#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
#	Line 979 | Line 903 | void emul_ppc(uint32 entry)
903
904		void TriggerInterrupt(void)
905		{
906	+	idle_resume();
907		#if 0
908		WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1);
909		#else
#	Line 988 | Line 913 | void TriggerInterrupt(void)
913		#endif
914		}
915
916	<	void sheepshaver_cpu::handle_interrupt(void)
916	>	void HandleInterrupt(powerpc_registers *r)
917		{
918		#ifdef USE_SDL_VIDEO
919		// We must fill in the events queue in the same thread that did call SDL_SetVideoMode()
#	Line 999 | Line 924 | void sheepshaver_cpu::handle_interrupt(v
924		if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0)
925		return;
926
927	<	// Current interrupt nest level
1003	<	static int interrupt_depth = 0;
1004	<	++interrupt_depth;
927	>	// Update interrupt count
928		#if EMUL_TIME_STATS
929		interrupt_count++;
930		#endif
931
1009	–	// Disable MacOS stack sniffer
1010	–	WriteMacInt32(0x110, 0);
1011	–
932		// Interrupt action depends on current run mode
933		switch (ReadMacInt32(XLM_RUN_MODE)) {
934		case MODE_68K:
935		// 68k emulator active, trigger 68k interrupt level 1
936		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
937	<	set_cr(get_cr() | tswap32(kernel_data->v[0x674 >> 2]));
937	>	r->cr.set(r->cr.get() | tswap32(kernel_data->v[0x674 >> 2]));
938		break;
939
940		#if INTERRUPTS_IN_NATIVE_MODE
941		case MODE_NATIVE:
942		// 68k emulator inactive, in nanokernel?
943	<	if (gpr(1) != KernelDataAddr && interrupt_depth == 1) {
1024	<	interrupt_context ctx(this, "PowerPC mode");
943	>	if (r->gpr[1] != KernelDataAddr) {
944
945		// Prepare for 68k interrupt level 1
946		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
#	Line 1032 | Line 951 | void sheepshaver_cpu::handle_interrupt(v
951		// Execute nanokernel interrupt routine (this will activate the 68k emulator)
952		DisableInterrupt();
953		if (ROMType == ROMTYPE_NEWWORLD)
954	<	ppc_cpu->interrupt(ROM_BASE + 0x312b1c);
954	>	ppc_cpu->interrupt(ROMBase + 0x312b1c);
955		else
956	<	ppc_cpu->interrupt(ROM_BASE + 0x312a3c);
956	>	ppc_cpu->interrupt(ROMBase + 0x312a3c);
957		}
958		break;
959		#endif
#	Line 1043 | Line 962 | void sheepshaver_cpu::handle_interrupt(v
962		case MODE_EMUL_OP:
963		// 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0
964		if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) {
1046	–	interrupt_context ctx(this, "68k mode");
965		#if EMUL_TIME_STATS
966		const clock_t interrupt_start = clock();
967		#endif
#	Line 1080 | Line 998 | void sheepshaver_cpu::handle_interrupt(v
998		break;
999		#endif
1000		}
1083	–
1084	–	// We are done with this interrupt
1085	–	--interrupt_depth;
1001		}
1002
1088	–	static void get_resource(void);
1089	–	static void get_1_resource(void);
1090	–	static void get_ind_resource(void);
1091	–	static void get_1_ind_resource(void);
1092	–	static void r_get_resource(void);
1093	–
1003		// Execute NATIVE_OP routine
1004		void sheepshaver_cpu::execute_native_op(uint32 selector)
1005		{
#	Line 1112 | Line 1021 | void sheepshaver_cpu::execute_native_op(
1021		case NATIVE_VIDEO_DO_DRIVER_IO:
1022		gpr(3) = (int32)(int16)VideoDoDriverIO(gpr(3), gpr(4), gpr(5), gpr(6), gpr(7));
1023		break;
1024	+	case NATIVE_ETHER_AO_GET_HWADDR:
1025	+	AO_get_ethernet_address(gpr(3));
1026	+	break;
1027	+	case NATIVE_ETHER_AO_ADD_MULTI:
1028	+	AO_enable_multicast(gpr(3));
1029	+	break;
1030	+	case NATIVE_ETHER_AO_DEL_MULTI:
1031	+	AO_disable_multicast(gpr(3));
1032	+	break;
1033	+	case NATIVE_ETHER_AO_SEND_PACKET:
1034	+	AO_transmit_packet(gpr(3));
1035	+	break;
1036		case NATIVE_ETHER_IRQ:
1037		EtherIRQ();
1038		break;
#	Line 1133 | Line 1054 | void sheepshaver_cpu::execute_native_op(
1054		case NATIVE_ETHER_RSRV:
1055		gpr(3) = ether_rsrv((queue_t *)gpr(3));
1056		break;
1057	<	case NATIVE_SYNC_HOOK:
1057	>	case NATIVE_NQD_SYNC_HOOK:
1058		gpr(3) = NQD_sync_hook(gpr(3));
1059		break;
1060	<	case NATIVE_BITBLT_HOOK:
1060	>	case NATIVE_NQD_UNKNOWN_HOOK:
1061	>	gpr(3) = NQD_unknown_hook(gpr(3));
1062	>	break;
1063	>	case NATIVE_NQD_BITBLT_HOOK:
1064		gpr(3) = NQD_bitblt_hook(gpr(3));
1065		break;
1066	<	case NATIVE_BITBLT:
1066	>	case NATIVE_NQD_BITBLT:
1067		NQD_bitblt(gpr(3));
1068		break;
1069	<	case NATIVE_FILLRECT_HOOK:
1069	>	case NATIVE_NQD_FILLRECT_HOOK:
1070		gpr(3) = NQD_fillrect_hook(gpr(3));
1071		break;
1072	<	case NATIVE_INVRECT:
1072	>	case NATIVE_NQD_INVRECT:
1073		NQD_invrect(gpr(3));
1074		break;
1075	<	case NATIVE_FILLRECT:
1075	>	case NATIVE_NQD_FILLRECT:
1076		NQD_fillrect(gpr(3));
1077		break;
1078		case NATIVE_SERIAL_NOTHING:
#	Line 1172 | Line 1096 | void sheepshaver_cpu::execute_native_op(
1096		break;
1097		}
1098		case NATIVE_GET_RESOURCE:
1099	+	get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1100	+	break;
1101		case NATIVE_GET_1_RESOURCE:
1102	+	get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1103	+	break;
1104		case NATIVE_GET_IND_RESOURCE:
1105	+	get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1106	+	break;
1107		case NATIVE_GET_1_IND_RESOURCE:
1108	<	case NATIVE_R_GET_RESOURCE: {
1109	<	typedef void (*GetResourceCallback)(void);
1110	<	static const GetResourceCallback get_resource_callbacks[] = {
1111	<	::get_resource,
1182	<	::get_1_resource,
1183	<	::get_ind_resource,
1184	<	::get_1_ind_resource,
1185	<	::r_get_resource
1186	<	};
1187	<	get_resource_callbacks[selector - NATIVE_GET_RESOURCE]();
1108	>	get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1109	>	break;
1110	>	case NATIVE_R_GET_RESOURCE:
1111	>	get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1112		break;
1189	–	}
1113		case NATIVE_MAKE_EXECUTABLE:
1114		MakeExecutable(0, gpr(4), gpr(5));
1115		break;
1116		case NATIVE_CHECK_LOAD_INVOC:
1117		check_load_invoc(gpr(3), gpr(4), gpr(5));
1118		break;
1119	+	case NATIVE_NAMED_CHECK_LOAD_INVOC:
1120	+	named_check_load_invoc(gpr(3), gpr(4), gpr(5));
1121	+	break;
1122		default:
1123		printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector);
1124		QuitEmulator();
#	Line 1279 | Line 1205 | uint32 call_macos7(uint32 tvect, uint32
1205		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6, arg7 };
1206		return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1207		}
1282	–
1283	–	/*
1284	–	*  Resource Manager thunks
1285	–	*/
1286	–
1287	–	void get_resource(void)
1288	–	{
1289	–	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1290	–	}
1291	–
1292	–	void get_1_resource(void)
1293	–	{
1294	–	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1295	–	}
1296	–
1297	–	void get_ind_resource(void)
1298	–	{
1299	–	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1300	–	}
1301	–
1302	–	void get_1_ind_resource(void)
1303	–	{
1304	–	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1305	–	}
1306	–
1307	–	void r_get_resource(void)
1308	–	{
1309	–	ppc_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1310	–	}

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