42 |
|
|
43 |
|
#include <stdio.h> |
44 |
|
#include <stdlib.h> |
45 |
+ |
#ifdef HAVE_MALLOC_H |
46 |
+ |
#include <malloc.h> |
47 |
+ |
#endif |
48 |
+ |
|
49 |
+ |
#ifdef USE_SDL_VIDEO |
50 |
+ |
#include <SDL_events.h> |
51 |
+ |
#endif |
52 |
|
|
53 |
|
#if ENABLE_MON |
54 |
|
#include "mon.h" |
59 |
|
#include "debug.h" |
60 |
|
|
61 |
|
// Emulation time statistics |
62 |
< |
#define EMUL_TIME_STATS 1 |
62 |
> |
#ifndef EMUL_TIME_STATS |
63 |
> |
#define EMUL_TIME_STATS 0 |
64 |
> |
#endif |
65 |
|
|
66 |
|
#if EMUL_TIME_STATS |
67 |
|
static clock_t emul_start_time; |
68 |
< |
static uint32 interrupt_count = 0; |
68 |
> |
static uint32 interrupt_count = 0, ppc_interrupt_count = 0; |
69 |
|
static clock_t interrupt_time = 0; |
70 |
|
static uint32 exec68k_count = 0; |
71 |
|
static clock_t exec68k_time = 0; |
108 |
|
// Interrupts in native mode? |
109 |
|
#define INTERRUPTS_IN_NATIVE_MODE 1 |
110 |
|
|
102 |
– |
// Enable native EMUL_OPs to be run without a mode switch |
103 |
– |
#define ENABLE_NATIVE_EMUL_OP 1 |
104 |
– |
|
111 |
|
// Pointer to Kernel Data |
112 |
< |
static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE; |
112 |
> |
static KernelData * kernel_data; |
113 |
|
|
114 |
|
// SIGSEGV handler |
115 |
< |
static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t); |
115 |
> |
sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t); |
116 |
|
|
117 |
|
#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT |
118 |
|
// Special trampolines for EmulOp and NativeOp |
142 |
|
void init_decoder(); |
143 |
|
void execute_sheep(uint32 opcode); |
144 |
|
|
139 |
– |
// Filter out EMUL_OP routines that only call native code |
140 |
– |
bool filter_execute_emul_op(uint32 emul_op); |
141 |
– |
|
142 |
– |
// "Native" EMUL_OP routines |
143 |
– |
void execute_emul_op_microseconds(); |
144 |
– |
void execute_emul_op_idle_time_1(); |
145 |
– |
void execute_emul_op_idle_time_2(); |
146 |
– |
|
145 |
|
// CPU context to preserve on interrupt |
146 |
|
class interrupt_context { |
147 |
|
uint32 gpr[32]; |
183 |
|
// Execute MacOS/PPC code |
184 |
|
uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args); |
185 |
|
|
186 |
+ |
#if PPC_ENABLE_JIT |
187 |
|
// Compile one instruction |
188 |
|
virtual int compile1(codegen_context_t & cg_context); |
189 |
< |
|
189 |
> |
#endif |
190 |
|
// Resource manager thunk |
191 |
|
void get_resource(uint32 old_get_resource); |
192 |
|
|
196 |
|
|
197 |
|
// Make sure the SIGSEGV handler can access CPU registers |
198 |
|
friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t); |
199 |
+ |
|
200 |
+ |
// Memory allocator returning areas aligned on 16-byte boundaries |
201 |
+ |
void *operator new(size_t size); |
202 |
+ |
void operator delete(void *p); |
203 |
|
}; |
204 |
|
|
205 |
|
// Memory allocator returning areas aligned on 16-byte boundaries |
206 |
< |
void *operator new(size_t size) |
206 |
> |
void *sheepshaver_cpu::operator new(size_t size) |
207 |
|
{ |
208 |
|
void *p; |
209 |
|
|
222 |
|
return p; |
223 |
|
} |
224 |
|
|
225 |
< |
void operator delete(void *p) |
225 |
> |
void sheepshaver_cpu::operator delete(void *p) |
226 |
|
{ |
227 |
|
#if defined(HAVE_MEMALIGN) || defined(HAVE_VALLOC) |
228 |
|
#if defined(__GLIBC__) |
271 |
|
typedef bit_field< 20, 25 > NATIVE_OP_field; |
272 |
|
typedef bit_field< 26, 31 > EMUL_OP_field; |
273 |
|
|
271 |
– |
// "Native" EMUL_OP routines |
272 |
– |
#define GPR_A(REG) gpr(16 + (REG)) |
273 |
– |
#define GPR_D(REG) gpr( 8 + (REG)) |
274 |
– |
|
275 |
– |
void sheepshaver_cpu::execute_emul_op_microseconds() |
276 |
– |
{ |
277 |
– |
Microseconds(GPR_A(0), GPR_D(0)); |
278 |
– |
} |
279 |
– |
|
280 |
– |
void sheepshaver_cpu::execute_emul_op_idle_time_1() |
281 |
– |
{ |
282 |
– |
// Sleep if no events pending |
283 |
– |
if (ReadMacInt32(0x14c) == 0) |
284 |
– |
Delay_usec(16667); |
285 |
– |
GPR_A(0) = ReadMacInt32(0x2b6); |
286 |
– |
} |
287 |
– |
|
288 |
– |
void sheepshaver_cpu::execute_emul_op_idle_time_2() |
289 |
– |
{ |
290 |
– |
// Sleep if no events pending |
291 |
– |
if (ReadMacInt32(0x14c) == 0) |
292 |
– |
Delay_usec(16667); |
293 |
– |
GPR_D(0) = (uint32)-2; |
294 |
– |
} |
295 |
– |
|
296 |
– |
// Filter out EMUL_OP routines that only call native code |
297 |
– |
bool sheepshaver_cpu::filter_execute_emul_op(uint32 emul_op) |
298 |
– |
{ |
299 |
– |
switch (emul_op) { |
300 |
– |
case OP_MICROSECONDS: |
301 |
– |
execute_emul_op_microseconds(); |
302 |
– |
return true; |
303 |
– |
case OP_IDLE_TIME: |
304 |
– |
execute_emul_op_idle_time_1(); |
305 |
– |
return true; |
306 |
– |
case OP_IDLE_TIME_2: |
307 |
– |
execute_emul_op_idle_time_2(); |
308 |
– |
return true; |
309 |
– |
} |
310 |
– |
return false; |
311 |
– |
} |
312 |
– |
|
274 |
|
// Execute EMUL_OP routine |
275 |
|
void sheepshaver_cpu::execute_emul_op(uint32 emul_op) |
276 |
|
{ |
316 |
– |
#if ENABLE_NATIVE_EMUL_OP |
317 |
– |
// First, filter out EMUL_OPs that can be executed without a mode switch |
318 |
– |
if (filter_execute_emul_op(emul_op)) |
319 |
– |
return; |
320 |
– |
#endif |
321 |
– |
|
277 |
|
M68kRegisters r68; |
278 |
|
WriteMacInt32(XLM_68K_R25, gpr(25)); |
279 |
|
WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP); |
326 |
|
} |
327 |
|
|
328 |
|
// Compile one instruction |
329 |
+ |
#if PPC_ENABLE_JIT |
330 |
|
int sheepshaver_cpu::compile1(codegen_context_t & cg_context) |
331 |
|
{ |
376 |
– |
#if PPC_ENABLE_JIT |
332 |
|
const instr_info_t *ii = cg_context.instr_info; |
333 |
|
if (ii->mnemo != PPC_I(SHEEP)) |
334 |
|
return COMPILE_FAILURE; |
399 |
|
status = COMPILE_CODE_OK; |
400 |
|
break; |
401 |
|
#endif |
447 |
– |
case NATIVE_DISABLE_INTERRUPT: |
448 |
– |
dg.gen_invoke(DisableInterrupt); |
449 |
– |
status = COMPILE_CODE_OK; |
450 |
– |
break; |
451 |
– |
case NATIVE_ENABLE_INTERRUPT: |
452 |
– |
dg.gen_invoke(EnableInterrupt); |
453 |
– |
status = COMPILE_CODE_OK; |
454 |
– |
break; |
402 |
|
case NATIVE_BITBLT: |
403 |
|
dg.gen_load_T0_GPR(3); |
404 |
|
dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt); |
416 |
|
break; |
417 |
|
} |
418 |
|
// Could we fully translate this NativeOp? |
419 |
< |
if (FN_field::test(opcode)) { |
420 |
< |
if (status != COMPILE_FAILURE) { |
419 |
> |
if (status == COMPILE_CODE_OK) { |
420 |
> |
if (!FN_field::test(opcode)) |
421 |
> |
cg_context.done_compile = false; |
422 |
> |
else { |
423 |
|
dg.gen_load_A0_LR(); |
424 |
|
dg.gen_set_PC_A0(); |
425 |
+ |
cg_context.done_compile = true; |
426 |
|
} |
477 |
– |
cg_context.done_compile = true; |
478 |
– |
break; |
479 |
– |
} |
480 |
– |
else if (status != COMPILE_FAILURE) { |
481 |
– |
cg_context.done_compile = false; |
427 |
|
break; |
428 |
|
} |
429 |
|
#if PPC_REENTRANT_JIT |
430 |
|
// Try to execute NativeOp trampoline |
431 |
< |
dg.gen_set_PC_im(cg_context.pc + 4); |
431 |
> |
if (!FN_field::test(opcode)) |
432 |
> |
dg.gen_set_PC_im(cg_context.pc + 4); |
433 |
> |
else { |
434 |
> |
dg.gen_load_A0_LR(); |
435 |
> |
dg.gen_set_PC_A0(); |
436 |
> |
} |
437 |
|
dg.gen_mov_32_T0_im(selector); |
438 |
|
dg.gen_jmp(native_op_trampoline); |
439 |
|
cg_context.done_compile = true; |
441 |
|
break; |
442 |
|
#endif |
443 |
|
// Invoke NativeOp handler |
444 |
< |
typedef void (*func_t)(dyngen_cpu_base, uint32); |
445 |
< |
func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr(); |
446 |
< |
dg.gen_invoke_CPU_im(func, selector); |
447 |
< |
cg_context.done_compile = false; |
448 |
< |
status = COMPILE_CODE_OK; |
444 |
> |
if (!FN_field::test(opcode)) { |
445 |
> |
typedef void (*func_t)(dyngen_cpu_base, uint32); |
446 |
> |
func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr(); |
447 |
> |
dg.gen_invoke_CPU_im(func, selector); |
448 |
> |
cg_context.done_compile = false; |
449 |
> |
status = COMPILE_CODE_OK; |
450 |
> |
} |
451 |
> |
// Otherwise, let it generate a call to execute_sheep() which |
452 |
> |
// will cause necessary updates to the program counter |
453 |
|
break; |
454 |
|
} |
455 |
|
|
456 |
|
default: { // EMUL_OP |
457 |
|
uint32 emul_op = EMUL_OP_field::extract(opcode) - 3; |
504 |
– |
#if ENABLE_NATIVE_EMUL_OP |
505 |
– |
typedef void (*emul_op_func_t)(dyngen_cpu_base); |
506 |
– |
emul_op_func_t emul_op_func = 0; |
507 |
– |
switch (emul_op) { |
508 |
– |
case OP_MICROSECONDS: |
509 |
– |
emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_microseconds).ptr(); |
510 |
– |
break; |
511 |
– |
case OP_IDLE_TIME: |
512 |
– |
emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_1).ptr(); |
513 |
– |
break; |
514 |
– |
case OP_IDLE_TIME_2: |
515 |
– |
emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_2).ptr(); |
516 |
– |
break; |
517 |
– |
} |
518 |
– |
if (emul_op_func) { |
519 |
– |
dg.gen_invoke_CPU(emul_op_func); |
520 |
– |
cg_context.done_compile = false; |
521 |
– |
status = COMPILE_CODE_OK; |
522 |
– |
break; |
523 |
– |
} |
524 |
– |
#endif |
458 |
|
#if PPC_REENTRANT_JIT |
459 |
|
// Try to execute EmulOp trampoline |
460 |
|
dg.gen_set_PC_im(cg_context.pc + 4); |
474 |
|
} |
475 |
|
} |
476 |
|
return status; |
544 |
– |
#endif |
545 |
– |
return COMPILE_FAILURE; |
477 |
|
} |
478 |
+ |
#endif |
479 |
|
|
480 |
|
// CPU context to preserve on interrupt |
481 |
|
sheepshaver_cpu::interrupt_context::interrupt_context(sheepshaver_cpu *_cpu, const char *_where) |
521 |
|
void sheepshaver_cpu::interrupt(uint32 entry) |
522 |
|
{ |
523 |
|
#if EMUL_TIME_STATS |
524 |
< |
interrupt_count++; |
524 |
> |
ppc_interrupt_count++; |
525 |
|
const clock_t interrupt_start = clock(); |
526 |
|
#endif |
527 |
|
|
807 |
|
* Initialize CPU emulation |
808 |
|
*/ |
809 |
|
|
810 |
< |
static sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction) |
810 |
> |
sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction) |
811 |
|
{ |
812 |
|
#if ENABLE_VOSF |
813 |
|
// Handle screen fault |
819 |
|
const uintptr addr = (uintptr)fault_address; |
820 |
|
#if HAVE_SIGSEGV_SKIP_INSTRUCTION |
821 |
|
// Ignore writes to ROM |
822 |
< |
if ((addr - ROM_BASE) < ROM_SIZE) |
822 |
> |
if ((addr - (uintptr)ROMBaseHost) < ROM_SIZE) |
823 |
|
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
824 |
|
|
825 |
|
// Get program counter of target CPU |
827 |
|
const uint32 pc = cpu->pc(); |
828 |
|
|
829 |
|
// Fault in Mac ROM or RAM? |
830 |
< |
bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize)); |
830 |
> |
bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize)) || (pc >= DR_CACHE_BASE && pc < (DR_CACHE_BASE + DR_CACHE_SIZE)); |
831 |
|
if (mac_fault) { |
832 |
|
|
833 |
|
// "VM settings" during MacOS 8 installation |
847 |
|
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
848 |
|
else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000)) |
849 |
|
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
850 |
+ |
|
851 |
+ |
// MacOS 8.6 serial drivers on startup (with DR Cache and OldWorld ROM) |
852 |
+ |
else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(16) == 0xf3012002 || cpu->gpr(16) == 0xf3012000)) |
853 |
+ |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
854 |
+ |
else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000)) |
855 |
+ |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
856 |
|
|
857 |
|
// Ignore writes to the zero page |
858 |
|
else if ((uint32)(addr - SheepMem::ZeroPage()) < (uint32)SheepMem::PageSize()) |
879 |
|
|
880 |
|
void init_emul_ppc(void) |
881 |
|
{ |
882 |
+ |
// Get pointer to KernelData in host address space |
883 |
+ |
kernel_data = (KernelData *)Mac2HostAddr(KERNEL_DATA_BASE); |
884 |
+ |
|
885 |
|
// Initialize main CPU emulator |
886 |
|
ppc_cpu = new sheepshaver_cpu(); |
887 |
|
ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000)); |
888 |
|
ppc_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000)); |
889 |
|
WriteMacInt32(XLM_RUN_MODE, MODE_68K); |
890 |
|
|
950 |
– |
// Install the handler for SIGSEGV |
951 |
– |
sigsegv_install_handler(sigsegv_handler); |
952 |
– |
|
891 |
|
#if ENABLE_MON |
892 |
|
// Install "regs" command in cxmon |
893 |
|
mon_add_command("regs", dump_registers, "regs Dump PowerPC registers\n"); |
913 |
|
printf("Total emulation time : %.1f sec\n", double(emul_time) / double(CLOCKS_PER_SEC)); |
914 |
|
printf("Total interrupt count: %d (%2.1f Hz)\n", interrupt_count, |
915 |
|
(double(interrupt_count) * CLOCKS_PER_SEC) / double(emul_time)); |
916 |
+ |
printf("Total ppc interrupt count: %d (%2.1f %%)\n", ppc_interrupt_count, |
917 |
+ |
(double(ppc_interrupt_count) * 100.0) / double(interrupt_count)); |
918 |
|
|
919 |
|
#define PRINT_STATS(LABEL, VAR_PREFIX) do { \ |
920 |
|
printf("Total " LABEL " count : %d\n", VAR_PREFIX##_count); \ |
990 |
|
|
991 |
|
void sheepshaver_cpu::handle_interrupt(void) |
992 |
|
{ |
993 |
< |
// Do nothing if interrupts are disabled |
994 |
< |
if (*(int32 *)XLM_IRQ_NEST > 0) |
995 |
< |
return; |
993 |
> |
#ifdef USE_SDL_VIDEO |
994 |
> |
// We must fill in the events queue in the same thread that did call SDL_SetVideoMode() |
995 |
> |
SDL_PumpEvents(); |
996 |
> |
#endif |
997 |
|
|
998 |
< |
// Do nothing if there is no interrupt pending |
999 |
< |
if (InterruptFlags == 0) |
998 |
> |
// Do nothing if interrupts are disabled |
999 |
> |
if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0) |
1000 |
|
return; |
1001 |
|
|
1002 |
|
// Current interrupt nest level |
1003 |
|
static int interrupt_depth = 0; |
1004 |
|
++interrupt_depth; |
1005 |
+ |
#if EMUL_TIME_STATS |
1006 |
+ |
interrupt_count++; |
1007 |
+ |
#endif |
1008 |
|
|
1009 |
|
// Disable MacOS stack sniffer |
1010 |
|
WriteMacInt32(0x110, 0); |
1044 |
|
// 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0 |
1045 |
|
if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) { |
1046 |
|
interrupt_context ctx(this, "68k mode"); |
1047 |
+ |
#if EMUL_TIME_STATS |
1048 |
+ |
const clock_t interrupt_start = clock(); |
1049 |
+ |
#endif |
1050 |
|
#if 1 |
1051 |
|
// Execute full 68k interrupt routine |
1052 |
|
M68kRegisters r; |
1053 |
|
uint32 old_r25 = ReadMacInt32(XLM_68K_R25); // Save interrupt level |
1054 |
|
WriteMacInt32(XLM_68K_R25, 0x21); // Execute with interrupt level 1 |
1055 |
< |
static const uint8 proc[] = { |
1055 |
> |
static const uint8 proc_template[] = { |
1056 |
|
0x3f, 0x3c, 0x00, 0x00, // move.w #$0000,-(sp) (fake format word) |
1057 |
|
0x48, 0x7a, 0x00, 0x0a, // pea @1(pc) (return address) |
1058 |
|
0x40, 0xe7, // move sr,-(sp) (saved SR) |
1060 |
|
0x4e, 0xd0, // jmp (a0) |
1061 |
|
M68K_RTS >> 8, M68K_RTS & 0xff // @1 |
1062 |
|
}; |
1063 |
< |
Execute68k((uint32)proc, &r); |
1063 |
> |
BUILD_SHEEPSHAVER_PROCEDURE(proc); |
1064 |
> |
Execute68k(proc, &r); |
1065 |
|
WriteMacInt32(XLM_68K_R25, old_r25); // Restore interrupt level |
1066 |
|
#else |
1067 |
|
// Only update cursor |
1073 |
|
} |
1074 |
|
} |
1075 |
|
#endif |
1076 |
+ |
#if EMUL_TIME_STATS |
1077 |
+ |
interrupt_time += (clock() - interrupt_start); |
1078 |
+ |
#endif |
1079 |
|
} |
1080 |
|
break; |
1081 |
|
#endif |
1110 |
|
VideoVBL(); |
1111 |
|
break; |
1112 |
|
case NATIVE_VIDEO_DO_DRIVER_IO: |
1113 |
< |
gpr(3) = (int32)(int16)VideoDoDriverIO((void *)gpr(3), (void *)gpr(4), |
1163 |
< |
(void *)gpr(5), gpr(6), gpr(7)); |
1113 |
> |
gpr(3) = (int32)(int16)VideoDoDriverIO(gpr(3), gpr(4), gpr(5), gpr(6), gpr(7)); |
1114 |
|
break; |
1165 |
– |
#ifdef WORDS_BIGENDIAN |
1115 |
|
case NATIVE_ETHER_IRQ: |
1116 |
|
EtherIRQ(); |
1117 |
|
break; |
1133 |
|
case NATIVE_ETHER_RSRV: |
1134 |
|
gpr(3) = ether_rsrv((queue_t *)gpr(3)); |
1135 |
|
break; |
1187 |
– |
#else |
1188 |
– |
case NATIVE_ETHER_INIT: |
1189 |
– |
// FIXME: needs more complicated thunks |
1190 |
– |
gpr(3) = false; |
1191 |
– |
break; |
1192 |
– |
#endif |
1136 |
|
case NATIVE_SYNC_HOOK: |
1137 |
|
gpr(3) = NQD_sync_hook(gpr(3)); |
1138 |
|
break; |
1187 |
|
get_resource_callbacks[selector - NATIVE_GET_RESOURCE](); |
1188 |
|
break; |
1189 |
|
} |
1247 |
– |
case NATIVE_DISABLE_INTERRUPT: |
1248 |
– |
DisableInterrupt(); |
1249 |
– |
break; |
1250 |
– |
case NATIVE_ENABLE_INTERRUPT: |
1251 |
– |
EnableInterrupt(); |
1252 |
– |
break; |
1190 |
|
case NATIVE_MAKE_EXECUTABLE: |
1191 |
< |
MakeExecutable(0, (void *)gpr(4), gpr(5)); |
1191 |
> |
MakeExecutable(0, gpr(4), gpr(5)); |
1192 |
|
break; |
1193 |
|
case NATIVE_CHECK_LOAD_INVOC: |
1194 |
|
check_load_invoc(gpr(3), gpr(4), gpr(5)); |