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root/cebix/SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.38 by gbeauche, 2004-05-19T21:23:16Z vs.
Revision 1.55 by gbeauche, 2004-12-18T18:40:04Z

#	Line 42 | Line 42
42
43		#include <stdio.h>
44		#include <stdlib.h>
45	+	#ifdef HAVE_MALLOC_H
46	+	#include <malloc.h>
47	+	#endif
48	+
49	+	#ifdef USE_SDL_VIDEO
50	+	#include <SDL_events.h>
51	+	#endif
52
53		#if ENABLE_MON
54		#include "mon.h"
#	Line 52 | Line 59
59		#include "debug.h"
60
61		// Emulation time statistics
62	<	#define EMUL_TIME_STATS 1
62	>	#ifndef EMUL_TIME_STATS
63	>	#define EMUL_TIME_STATS 0
64	>	#endif
65
66		#if EMUL_TIME_STATS
67		static clock_t emul_start_time;
68	<	static uint32 interrupt_count = 0;
68	>	static uint32 interrupt_count = 0, ppc_interrupt_count = 0;
69		static clock_t interrupt_time = 0;
70		static uint32 exec68k_count = 0;
71		static clock_t exec68k_time = 0;
#	Line 84 | Line 93 | extern "C" void check_load_invoc(uint32
93		// PowerPC EmulOp to exit from emulation looop
94		const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1;
95
87	–	// Enable multicore (main/interrupts) cpu emulation?
88	–	#define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0)
89	–
96		// Enable interrupt routine safety checks?
97		#define SAFE_INTERRUPT_PPC 1
98
#	Line 102 | Line 108 | const uint32 POWERPC_EXEC_RETURN = POWER
108		// Interrupts in native mode?
109		#define INTERRUPTS_IN_NATIVE_MODE 1
110
105	–	// Enable native EMUL_OPs to be run without a mode switch
106	–	#define ENABLE_NATIVE_EMUL_OP 1
107	–
111		// Pointer to Kernel Data
112	<	static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE;
112	>	static KernelData * kernel_data;
113
114		// SIGSEGV handler
115	<	static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
115	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
116
117		#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
118		// Special trampolines for EmulOp and NativeOp
#	Line 139 | Line 142 | class sheepshaver_cpu
142		void init_decoder();
143		void execute_sheep(uint32 opcode);
144
145	<	// Filter out EMUL_OP routines that only call native code
146	<	bool filter_execute_emul_op(uint32 emul_op);
147	<
148	<	// "Native" EMUL_OP routines
149	<	void execute_emul_op_microseconds();
150	<	void execute_emul_op_idle_time_1();
151	<	void execute_emul_op_idle_time_2();
145	>	// CPU context to preserve on interrupt
146	>	class interrupt_context {
147	>	uint32 gpr[32];
148	>	uint32 pc;
149	>	uint32 lr;
150	>	uint32 ctr;
151	>	uint32 cr;
152	>	uint32 xer;
153	>	sheepshaver_cpu *cpu;
154	>	const char *where;
155	>	public:
156	>	interrupt_context(sheepshaver_cpu *_cpu, const char *_where);
157	>	~interrupt_context();
158	>	};
159
160		public:
161
#	Line 173 | Line 183 | public:
183		// Execute MacOS/PPC code
184		uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args);
185
186	+	#if PPC_ENABLE_JIT
187		// Compile one instruction
188		virtual int compile1(codegen_context_t & cg_context);
189	<
189	>	#endif
190		// Resource manager thunk
191		void get_resource(uint32 old_get_resource);
192
#	Line 185 | Line 196 | public:
196
197		// Make sure the SIGSEGV handler can access CPU registers
198		friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
199	+
200	+	// Memory allocator returning areas aligned on 16-byte boundaries
201	+	void *operator new(size_t size);
202	+	void operator delete(void *p);
203		};
204
205		// Memory allocator returning areas aligned on 16-byte boundaries
206	<	void *operator new(size_t size)
206	>	void *sheepshaver_cpu::operator new(size_t size)
207		{
208		void *p;
209
#	Line 207 | Line 222 | void *operator new(size_t size)
222		return p;
223		}
224
225	<	void operator delete(void *p)
225	>	void sheepshaver_cpu::operator delete(void *p)
226		{
227		#if defined(HAVE_MEMALIGN) || defined(HAVE_VALLOC)
228		#if defined(__GLIBC__)
#	Line 256 | Line 271 | typedef bit_field< 19, 19 > FN_field;
271		typedef bit_field< 20, 25 > NATIVE_OP_field;
272		typedef bit_field< 26, 31 > EMUL_OP_field;
273
259	–	// "Native" EMUL_OP routines
260	–	#define GPR_A(REG) gpr(16 + (REG))
261	–	#define GPR_D(REG) gpr( 8 + (REG))
262	–
263	–	void sheepshaver_cpu::execute_emul_op_microseconds()
264	–	{
265	–	Microseconds(GPR_A(0), GPR_D(0));
266	–	}
267	–
268	–	void sheepshaver_cpu::execute_emul_op_idle_time_1()
269	–	{
270	–	// Sleep if no events pending
271	–	if (ReadMacInt32(0x14c) == 0)
272	–	Delay_usec(16667);
273	–	GPR_A(0) = ReadMacInt32(0x2b6);
274	–	}
275	–
276	–	void sheepshaver_cpu::execute_emul_op_idle_time_2()
277	–	{
278	–	// Sleep if no events pending
279	–	if (ReadMacInt32(0x14c) == 0)
280	–	Delay_usec(16667);
281	–	GPR_D(0) = (uint32)-2;
282	–	}
283	–
284	–	// Filter out EMUL_OP routines that only call native code
285	–	bool sheepshaver_cpu::filter_execute_emul_op(uint32 emul_op)
286	–	{
287	–	switch (emul_op) {
288	–	case OP_MICROSECONDS:
289	–	execute_emul_op_microseconds();
290	–	return true;
291	–	case OP_IDLE_TIME:
292	–	execute_emul_op_idle_time_1();
293	–	return true;
294	–	case OP_IDLE_TIME_2:
295	–	execute_emul_op_idle_time_2();
296	–	return true;
297	–	}
298	–	return false;
299	–	}
300	–
274		// Execute EMUL_OP routine
275		void sheepshaver_cpu::execute_emul_op(uint32 emul_op)
276		{
304	–	#if ENABLE_NATIVE_EMUL_OP
305	–	// First, filter out EMUL_OPs that can be executed without a mode switch
306	–	if (filter_execute_emul_op(emul_op))
307	–	return;
308	–	#endif
309	–
277		M68kRegisters r68;
278		WriteMacInt32(XLM_68K_R25, gpr(25));
279		WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
#	Line 359 | Line 326 | void sheepshaver_cpu::execute_sheep(uint
326		}
327
328		// Compile one instruction
329	+	#if PPC_ENABLE_JIT
330		int sheepshaver_cpu::compile1(codegen_context_t & cg_context)
331		{
364	–	#if PPC_ENABLE_JIT
332		const instr_info_t *ii = cg_context.instr_info;
333		if (ii->mnemo != PPC_I(SHEEP))
334		return COMPILE_FAILURE;
#	Line 432 | Line 399 | int sheepshaver_cpu::compile1(codegen_co
399		status = COMPILE_CODE_OK;
400		break;
401		#endif
435	–	case NATIVE_DISABLE_INTERRUPT:
436	–	dg.gen_invoke(DisableInterrupt);
437	–	status = COMPILE_CODE_OK;
438	–	break;
439	–	case NATIVE_ENABLE_INTERRUPT:
440	–	dg.gen_invoke(EnableInterrupt);
441	–	status = COMPILE_CODE_OK;
442	–	break;
402		case NATIVE_BITBLT:
403		dg.gen_load_T0_GPR(3);
404		dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt);
#	Line 457 | Line 416 | int sheepshaver_cpu::compile1(codegen_co
416		break;
417		}
418		// Could we fully translate this NativeOp?
419	<	if (FN_field::test(opcode)) {
420	<	if (status != COMPILE_FAILURE) {
419	>	if (status == COMPILE_CODE_OK) {
420	>	if (!FN_field::test(opcode))
421	>	cg_context.done_compile = false;
422	>	else {
423		dg.gen_load_A0_LR();
424		dg.gen_set_PC_A0();
425	+	cg_context.done_compile = true;
426		}
465	–	cg_context.done_compile = true;
466	–	break;
467	–	}
468	–	else if (status != COMPILE_FAILURE) {
469	–	cg_context.done_compile = false;
427		break;
428		}
429		#if PPC_REENTRANT_JIT
430		// Try to execute NativeOp trampoline
431	<	dg.gen_set_PC_im(cg_context.pc + 4);
431	>	if (!FN_field::test(opcode))
432	>	dg.gen_set_PC_im(cg_context.pc + 4);
433	>	else {
434	>	dg.gen_load_A0_LR();
435	>	dg.gen_set_PC_A0();
436	>	}
437		dg.gen_mov_32_T0_im(selector);
438		dg.gen_jmp(native_op_trampoline);
439		cg_context.done_compile = true;
#	Line 479 | Line 441 | int sheepshaver_cpu::compile1(codegen_co
441		break;
442		#endif
443		// Invoke NativeOp handler
444	<	typedef void (*func_t)(dyngen_cpu_base, uint32);
445	<	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
446	<	dg.gen_invoke_CPU_im(func, selector);
447	<	cg_context.done_compile = false;
448	<	status = COMPILE_CODE_OK;
444	>	if (!FN_field::test(opcode)) {
445	>	typedef void (*func_t)(dyngen_cpu_base, uint32);
446	>	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
447	>	dg.gen_invoke_CPU_im(func, selector);
448	>	cg_context.done_compile = false;
449	>	status = COMPILE_CODE_OK;
450	>	}
451	>	// Otherwise, let it generate a call to execute_sheep() which
452	>	// will cause necessary updates to the program counter
453		break;
454		}
455
456		default: {      // EMUL_OP
457		uint32 emul_op = EMUL_OP_field::extract(opcode) - 3;
492	–	#if ENABLE_NATIVE_EMUL_OP
493	–	typedef void (*emul_op_func_t)(dyngen_cpu_base);
494	–	emul_op_func_t emul_op_func = 0;
495	–	switch (emul_op) {
496	–	case OP_MICROSECONDS:
497	–	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_microseconds).ptr();
498	–	break;
499	–	case OP_IDLE_TIME:
500	–	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_1).ptr();
501	–	break;
502	–	case OP_IDLE_TIME_2:
503	–	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_2).ptr();
504	–	break;
505	–	}
506	–	if (emul_op_func) {
507	–	dg.gen_invoke_CPU(emul_op_func);
508	–	cg_context.done_compile = false;
509	–	status = COMPILE_CODE_OK;
510	–	break;
511	–	}
512	–	#endif
458		#if PPC_REENTRANT_JIT
459		// Try to execute EmulOp trampoline
460		dg.gen_set_PC_im(cg_context.pc + 4);
#	Line 529 | Line 474 | int sheepshaver_cpu::compile1(codegen_co
474		}
475		}
476		return status;
477	+	}
478	+	#endif
479	+
480	+	// CPU context to preserve on interrupt
481	+	sheepshaver_cpu::interrupt_context::interrupt_context(sheepshaver_cpu *_cpu, const char *_where)
482	+	{
483	+	#if SAFE_INTERRUPT_PPC >= 2
484	+	cpu = _cpu;
485	+	where = _where;
486	+
487	+	// Save interrupt context
488	+	memcpy(&gpr[0], &cpu->gpr(0), sizeof(gpr));
489	+	pc = cpu->pc();
490	+	lr = cpu->lr();
491	+	ctr = cpu->ctr();
492	+	cr = cpu->get_cr();
493	+	xer = cpu->get_xer();
494	+	#endif
495	+	}
496	+
497	+	sheepshaver_cpu::interrupt_context::~interrupt_context()
498	+	{
499	+	#if SAFE_INTERRUPT_PPC >= 2
500	+	// Check whether CPU context was preserved by interrupt
501	+	if (memcmp(&gpr[0], &cpu->gpr(0), sizeof(gpr)) != 0) {
502	+	printf("FATAL: %s: interrupt clobbers registers\n", where);
503	+	for (int i = 0; i < 32; i++)
504	+	if (gpr[i] != cpu->gpr(i))
505	+	printf(" r%d: %08x -> %08x\n", i, gpr[i], cpu->gpr(i));
506	+	}
507	+	if (pc != cpu->pc())
508	+	printf("FATAL: %s: interrupt clobbers PC\n", where);
509	+	if (lr != cpu->lr())
510	+	printf("FATAL: %s: interrupt clobbers LR\n", where);
511	+	if (ctr != cpu->ctr())
512	+	printf("FATAL: %s: interrupt clobbers CTR\n", where);
513	+	if (cr != cpu->get_cr())
514	+	printf("FATAL: %s: interrupt clobbers CR\n", where);
515	+	if (xer != cpu->get_xer())
516	+	printf("FATAL: %s: interrupt clobbers XER\n", where);
517		#endif
533	–	return COMPILE_FAILURE;
518		}
519
520		// Handle MacOS interrupt
521		void sheepshaver_cpu::interrupt(uint32 entry)
522		{
523		#if EMUL_TIME_STATS
524	<	interrupt_count++;
524	>	ppc_interrupt_count++;
525		const clock_t interrupt_start = clock();
526		#endif
527
#	Line 547 | Line 531 | void sheepshaver_cpu::interrupt(uint32 e
531		printf("FATAL: sheepshaver_cpu::interrupt() called more than once: %d\n", depth);
532		depth++;
533		#endif
550	–	#if SAFE_INTERRUPT_PPC >= 2
551	–	uint32 saved_regs[32];
552	–	memcpy(&saved_regs[0], &gpr(0), sizeof(saved_regs));
553	–	#endif
534
555	–	#if !MULTICORE_CPU
535		// Save program counters and branch registers
536		uint32 saved_pc = pc();
537		uint32 saved_lr = lr();
538		uint32 saved_ctr= ctr();
539		uint32 saved_sp = gpr(1);
561	–	#endif
540
541		// Initialize stack pointer to SheepShaver alternate stack base
542		gpr(1) = SignalStackBase() - 64;
#	Line 598 | Line 576 | void sheepshaver_cpu::interrupt(uint32 e
576		// Enter nanokernel
577		execute(entry);
578
601	–	#if !MULTICORE_CPU
579		// Restore program counters and branch registers
580		pc() = saved_pc;
581		lr() = saved_lr;
582		ctr()= saved_ctr;
583		gpr(1) = saved_sp;
607	–	#endif
584
585		#if EMUL_TIME_STATS
586		interrupt_time += (clock() - interrupt_start);
587		#endif
588
613	–	#if SAFE_INTERRUPT_PPC >= 2
614	–	if (memcmp(&saved_regs[0], &gpr(0), sizeof(saved_regs)) != 0)
615	–	printf("FATAL: dirty PowerPC registers\n");
616	–	#endif
589		#if SAFE_INTERRUPT_PPC
590		depth--;
591		#endif
#	Line 810 | Line 782 | inline void sheepshaver_cpu::get_resourc
782		*              SheepShaver CPU engine interface
783		**/
784
785	<	static sheepshaver_cpu *main_cpu = NULL;                // CPU emulator to handle usual control flow
786	<	static sheepshaver_cpu *interrupt_cpu = NULL;   // CPU emulator to handle interrupts
815	<	static sheepshaver_cpu *current_cpu = NULL;             // Current CPU emulator context
785	>	// PowerPC CPU emulator
786	>	static sheepshaver_cpu *ppc_cpu = NULL;
787
788		void FlushCodeCache(uintptr start, uintptr end)
789		{
790		D(bug("FlushCodeCache(%08x, %08x)\n", start, end));
791	<	main_cpu->invalidate_cache_range(start, end);
821	<	#if MULTICORE_CPU
822	<	interrupt_cpu->invalidate_cache_range(start, end);
823	<	#endif
824	<	}
825	<
826	<	static inline void cpu_push(sheepshaver_cpu *new_cpu)
827	<	{
828	<	#if MULTICORE_CPU
829	<	current_cpu = new_cpu;
830	<	#endif
831	<	}
832	<
833	<	static inline void cpu_pop()
834	<	{
835	<	#if MULTICORE_CPU
836	<	current_cpu = main_cpu;
837	<	#endif
791	>	ppc_cpu->invalidate_cache_range(start, end);
792		}
793
794		// Dump PPC registers
795		static void dump_registers(void)
796		{
797	<	current_cpu->dump_registers();
797	>	ppc_cpu->dump_registers();
798		}
799
800		// Dump log
801		static void dump_log(void)
802		{
803	<	current_cpu->dump_log();
803	>	ppc_cpu->dump_log();
804		}
805
806		/*
807		*  Initialize CPU emulation
808		*/
809
810	<	static sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
810	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
811		{
812		#if ENABLE_VOSF
813		// Handle screen fault
#	Line 865 | Line 819 | static sigsegv_return_t sigsegv_handler(
819		const uintptr addr = (uintptr)fault_address;
820		#if HAVE_SIGSEGV_SKIP_INSTRUCTION
821		// Ignore writes to ROM
822	<	if ((addr - ROM_BASE) < ROM_SIZE)
822	>	if ((addr - (uintptr)ROMBaseHost) < ROM_SIZE)
823		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
824
825		// Get program counter of target CPU
826	<	sheepshaver_cpu * const cpu = current_cpu;
826	>	sheepshaver_cpu * const cpu = ppc_cpu;
827		const uint32 pc = cpu->pc();
828
829		// Fault in Mac ROM or RAM?
830	<	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize));
830	>	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize)) || (pc >= DR_CACHE_BASE && pc < (DR_CACHE_BASE + DR_CACHE_SIZE));
831		if (mac_fault) {
832
833		// "VM settings" during MacOS 8 installation
#	Line 893 | Line 847 | static sigsegv_return_t sigsegv_handler(
847		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
848		else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
849		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
850	+
851	+	// MacOS 8.6 serial drivers on startup (with DR Cache and OldWorld ROM)
852	+	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(16) == 0xf3012002 || cpu->gpr(16) == 0xf3012000))
853	+	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
854	+	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
855	+	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
856
857		// Ignore writes to the zero page
858		else if ((uint32)(addr - SheepMem::ZeroPage()) < (uint32)SheepMem::PageSize())
#	Line 909 | Line 869 | static sigsegv_return_t sigsegv_handler(
869		printf("SIGSEGV\n");
870		printf("  pc %p\n", fault_instruction);
871		printf("  ea %p\n", fault_address);
912	–	printf(" cpu %s\n", current_cpu == main_cpu ? "main" : "interrupts");
872		dump_registers();
873	<	current_cpu->dump_log();
873	>	ppc_cpu->dump_log();
874		enter_mon();
875		QuitEmulator();
876
#	Line 920 | Line 879 | static sigsegv_return_t sigsegv_handler(
879
880		void init_emul_ppc(void)
881		{
882	+	// Get pointer to KernelData in host address space
883	+	kernel_data = (KernelData *)Mac2HostAddr(KERNEL_DATA_BASE);
884	+
885		// Initialize main CPU emulator
886	<	main_cpu = new sheepshaver_cpu();
887	<	main_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
888	<	main_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
886	>	ppc_cpu = new sheepshaver_cpu();
887	>	ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
888	>	ppc_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
889		WriteMacInt32(XLM_RUN_MODE, MODE_68K);
890
929	–	#if MULTICORE_CPU
930	–	// Initialize alternate CPU emulator to handle interrupts
931	–	interrupt_cpu = new sheepshaver_cpu();
932	–	#endif
933	–
934	–	// Install the handler for SIGSEGV
935	–	sigsegv_install_handler(sigsegv_handler);
936	–
891		#if ENABLE_MON
892		// Install "regs" command in cxmon
893		mon_add_command("regs", dump_registers, "regs                     Dump PowerPC registers\n");
#	Line 959 | Line 913 | void exit_emul_ppc(void)
913		printf("Total emulation time : %.1f sec\n", double(emul_time) / double(CLOCKS_PER_SEC));
914		printf("Total interrupt count: %d (%2.1f Hz)\n", interrupt_count,
915		(double(interrupt_count) * CLOCKS_PER_SEC) / double(emul_time));
916	+	printf("Total ppc interrupt count: %d (%2.1f %%)\n", ppc_interrupt_count,
917	+	(double(ppc_interrupt_count) * 100.0) / double(interrupt_count));
918
919		#define PRINT_STATS(LABEL, VAR_PREFIX) do {                                                             \
920		printf("Total " LABEL " count : %d\n", VAR_PREFIX##_count);             \
#	Line 975 | Line 931 | void exit_emul_ppc(void)
931		printf("\n");
932		#endif
933
934	<	delete main_cpu;
979	<	#if MULTICORE_CPU
980	<	delete interrupt_cpu;
981	<	#endif
934	>	delete ppc_cpu;
935		}
936
937		#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
#	Line 1013 | Line 966 | void init_emul_op_trampolines(basic_dyng
966
967		void emul_ppc(uint32 entry)
968		{
1016	–	current_cpu = main_cpu;
969		#if 0
970	<	current_cpu->start_log();
970	>	ppc_cpu->start_log();
971		#endif
972		// start emulation loop and enable code translation or caching
973	<	current_cpu->execute(entry);
973	>	ppc_cpu->execute(entry);
974		}
975
976		/*
977		*  Handle PowerPC interrupt
978		*/
979
1028	–	#if ASYNC_IRQ
1029	–	void HandleInterrupt(void)
1030	–	{
1031	–	main_cpu->handle_interrupt();
1032	–	}
1033	–	#else
980		void TriggerInterrupt(void)
981		{
982		#if 0
983		WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1);
984		#else
985		// Trigger interrupt to main cpu only
986	<	if (main_cpu)
987	<	main_cpu->trigger_interrupt();
986	>	if (ppc_cpu)
987	>	ppc_cpu->trigger_interrupt();
988		#endif
989		}
1044	–	#endif
990
991		void sheepshaver_cpu::handle_interrupt(void)
992		{
993	+	#ifdef USE_SDL_VIDEO
994	+	// We must fill in the events queue in the same thread that did call SDL_SetVideoMode()
995	+	SDL_PumpEvents();
996	+	#endif
997	+
998		// Do nothing if interrupts are disabled
999	<	if (*(int32 *)XLM_IRQ_NEST > 0)
999	>	if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0)
1000		return;
1001
1002	<	// Do nothing if there is no interrupt pending
1003	<	if (InterruptFlags == 0)
1004	<	return;
1002	>	// Current interrupt nest level
1003	>	static int interrupt_depth = 0;
1004	>	++interrupt_depth;
1005	>	#if EMUL_TIME_STATS
1006	>	interrupt_count++;
1007	>	#endif
1008
1009		// Disable MacOS stack sniffer
1010		WriteMacInt32(0x110, 0);
#	Line 1060 | Line 1013 | void sheepshaver_cpu::handle_interrupt(v
1013		switch (ReadMacInt32(XLM_RUN_MODE)) {
1014		case MODE_68K:
1015		// 68k emulator active, trigger 68k interrupt level 1
1063	–	assert(current_cpu == main_cpu);
1016		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
1017		set_cr(get_cr() | tswap32(kernel_data->v[0x674 >> 2]));
1018		break;
#	Line 1068 | Line 1020 | void sheepshaver_cpu::handle_interrupt(v
1020		#if INTERRUPTS_IN_NATIVE_MODE
1021		case MODE_NATIVE:
1022		// 68k emulator inactive, in nanokernel?
1023	<	assert(current_cpu == main_cpu);
1024	<	if (gpr(1) != KernelDataAddr) {
1023	>	if (gpr(1) != KernelDataAddr && interrupt_depth == 1) {
1024	>	interrupt_context ctx(this, "PowerPC mode");
1025	>
1026		// Prepare for 68k interrupt level 1
1027		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
1028		WriteMacInt32(tswap32(kernel_data->v[0x658 >> 2]) + 0xdc,
#	Line 1078 | Line 1031 | void sheepshaver_cpu::handle_interrupt(v
1031
1032		// Execute nanokernel interrupt routine (this will activate the 68k emulator)
1033		DisableInterrupt();
1081	–	cpu_push(interrupt_cpu);
1034		if (ROMType == ROMTYPE_NEWWORLD)
1035	<	current_cpu->interrupt(ROM_BASE + 0x312b1c);
1035	>	ppc_cpu->interrupt(ROM_BASE + 0x312b1c);
1036		else
1037	<	current_cpu->interrupt(ROM_BASE + 0x312a3c);
1086	<	cpu_pop();
1037	>	ppc_cpu->interrupt(ROM_BASE + 0x312a3c);
1038		}
1039		break;
1040		#endif
#	Line 1092 | Line 1043 | void sheepshaver_cpu::handle_interrupt(v
1043		case MODE_EMUL_OP:
1044		// 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0
1045		if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) {
1046	+	interrupt_context ctx(this, "68k mode");
1047	+	#if EMUL_TIME_STATS
1048	+	const clock_t interrupt_start = clock();
1049	+	#endif
1050		#if 1
1051		// Execute full 68k interrupt routine
1052		M68kRegisters r;
1053		uint32 old_r25 = ReadMacInt32(XLM_68K_R25);     // Save interrupt level
1054		WriteMacInt32(XLM_68K_R25, 0x21);                       // Execute with interrupt level 1
1055	<	static const uint8 proc[] = {
1055	>	static const uint8 proc_template[] = {
1056		0x3f, 0x3c, 0x00, 0x00,                 // move.w       #$0000,-(sp)    (fake format word)
1057		0x48, 0x7a, 0x00, 0x0a,                 // pea          @1(pc)                  (return address)
1058		0x40, 0xe7,                                             // move         sr,-(sp)                (saved SR)
#	Line 1105 | Line 1060 | void sheepshaver_cpu::handle_interrupt(v
1060		0x4e, 0xd0,                                             // jmp          (a0)
1061		M68K_RTS >> 8, M68K_RTS & 0xff  // @1
1062		};
1063	<	Execute68k((uint32)proc, &r);
1063	>	BUILD_SHEEPSHAVER_PROCEDURE(proc);
1064	>	Execute68k(proc, &r);
1065		WriteMacInt32(XLM_68K_R25, old_r25);            // Restore interrupt level
1066		#else
1067		// Only update cursor
#	Line 1117 | Line 1073 | void sheepshaver_cpu::handle_interrupt(v
1073		}
1074		}
1075		#endif
1076	+	#if EMUL_TIME_STATS
1077	+	interrupt_time += (clock() - interrupt_start);
1078	+	#endif
1079		}
1080		break;
1081		#endif
1082		}
1083	+
1084	+	// We are done with this interrupt
1085	+	--interrupt_depth;
1086		}
1087
1088		static void get_resource(void);
#	Line 1148 | Line 1110 | void sheepshaver_cpu::execute_native_op(
1110		VideoVBL();
1111		break;
1112		case NATIVE_VIDEO_DO_DRIVER_IO:
1113	<	gpr(3) = (int32)(int16)VideoDoDriverIO((void *)gpr(3), (void *)gpr(4),
1152	<	(void *)gpr(5), gpr(6), gpr(7));
1113	>	gpr(3) = (int32)(int16)VideoDoDriverIO(gpr(3), gpr(4), gpr(5), gpr(6), gpr(7));
1114		break;
1154	–	#ifdef WORDS_BIGENDIAN
1115		case NATIVE_ETHER_IRQ:
1116		EtherIRQ();
1117		break;
#	Line 1173 | Line 1133 | void sheepshaver_cpu::execute_native_op(
1133		case NATIVE_ETHER_RSRV:
1134		gpr(3) = ether_rsrv((queue_t *)gpr(3));
1135		break;
1176	–	#else
1177	–	case NATIVE_ETHER_INIT:
1178	–	// FIXME: needs more complicated thunks
1179	–	gpr(3) = false;
1180	–	break;
1181	–	#endif
1136		case NATIVE_SYNC_HOOK:
1137		gpr(3) = NQD_sync_hook(gpr(3));
1138		break;
#	Line 1233 | Line 1187 | void sheepshaver_cpu::execute_native_op(
1187		get_resource_callbacks[selector - NATIVE_GET_RESOURCE]();
1188		break;
1189		}
1236	–	case NATIVE_DISABLE_INTERRUPT:
1237	–	DisableInterrupt();
1238	–	break;
1239	–	case NATIVE_ENABLE_INTERRUPT:
1240	–	EnableInterrupt();
1241	–	break;
1190		case NATIVE_MAKE_EXECUTABLE:
1191	<	MakeExecutable(0, (void *)gpr(4), gpr(5));
1191	>	MakeExecutable(0, gpr(4), gpr(5));
1192		break;
1193		case NATIVE_CHECK_LOAD_INVOC:
1194		check_load_invoc(gpr(3), gpr(4), gpr(5));
#	Line 1264 | Line 1212 | void sheepshaver_cpu::execute_native_op(
1212
1213		void Execute68k(uint32 pc, M68kRegisters *r)
1214		{
1215	<	current_cpu->execute_68k(pc, r);
1215	>	ppc_cpu->execute_68k(pc, r);
1216		}
1217
1218		/*
#	Line 1287 | Line 1235 | void Execute68kTrap(uint16 trap, M68kReg
1235
1236		uint32 call_macos(uint32 tvect)
1237		{
1238	<	return current_cpu->execute_macos_code(tvect, 0, NULL);
1238	>	return ppc_cpu->execute_macos_code(tvect, 0, NULL);
1239		}
1240
1241		uint32 call_macos1(uint32 tvect, uint32 arg1)
1242		{
1243		const uint32 args[] = { arg1 };
1244	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1244	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1245		}
1246
1247		uint32 call_macos2(uint32 tvect, uint32 arg1, uint32 arg2)
1248		{
1249		const uint32 args[] = { arg1, arg2 };
1250	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1250	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1251		}
1252
1253		uint32 call_macos3(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3)
1254		{
1255		const uint32 args[] = { arg1, arg2, arg3 };
1256	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1256	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1257		}
1258
1259		uint32 call_macos4(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4)
1260		{
1261		const uint32 args[] = { arg1, arg2, arg3, arg4 };
1262	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1262	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1263		}
1264
1265		uint32 call_macos5(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5)
1266		{
1267		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5 };
1268	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1268	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1269		}
1270
1271		uint32 call_macos6(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6)
1272		{
1273		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6 };
1274	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1274	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1275		}
1276
1277		uint32 call_macos7(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6, uint32 arg7)
1278		{
1279		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6, arg7 };
1280	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1280	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1281		}
1282
1283		/*
#	Line 1338 | Line 1286 | uint32 call_macos7(uint32 tvect, uint32
1286
1287		void get_resource(void)
1288		{
1289	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1289	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1290		}
1291
1292		void get_1_resource(void)
1293		{
1294	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1294	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1295		}
1296
1297		void get_ind_resource(void)
1298		{
1299	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1299	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1300		}
1301
1302		void get_1_ind_resource(void)
1303		{
1304	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1304	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1305		}
1306
1307		void r_get_resource(void)
1308		{
1309	<	current_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1309	>	ppc_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1310		}

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