ViewVC Help

View File | Revision Log | Show Annotations | Revision Graph | Root Listing

root/cebix/SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.2 by gbeauche, 2003-09-28T21:27:34Z vs.
Revision 1.55 by gbeauche, 2004-12-18T18:40:04Z

#	Line 1 | Line 1
1		/*
2		*  sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface
3		*
4	<	*  SheepShaver (C) 1997-2002 Christian Bauer and Marc Hellwig
4	>	*  SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig
5		*
6		*  This program is free software; you can redistribute it and/or modify
7		*  it under the terms of the GNU General Public License as published by
#	Line 21 | Line 21
21		#include "sysdeps.h"
22		#include "cpu_emulation.h"
23		#include "main.h"
24	+	#include "prefs.h"
25		#include "xlowmem.h"
26		#include "emul_op.h"
27		#include "rom_patches.h"
28		#include "macos_util.h"
29		#include "block-alloc.hpp"
30		#include "sigsegv.h"
30	–	#include "spcflags.h"
31		#include "cpu/ppc/ppc-cpu.hpp"
32		#include "cpu/ppc/ppc-operations.hpp"
33	+	#include "cpu/ppc/ppc-instructions.hpp"
34	+	#include "thunks.h"
35
36		// Used for NativeOp trampolines
37		#include "video.h"
38		#include "name_registry.h"
39		#include "serial.h"
40	+	#include "ether.h"
41	+	#include "timer.h"
42
43		#include <stdio.h>
44	+	#include <stdlib.h>
45	+	#ifdef HAVE_MALLOC_H
46	+	#include <malloc.h>
47	+	#endif
48	+
49	+	#ifdef USE_SDL_VIDEO
50	+	#include <SDL_events.h>
51	+	#endif
52
53		#if ENABLE_MON
54		#include "mon.h"
55		#include "mon_disass.h"
56		#endif
57
58	<	#define DEBUG 1
58	>	#define DEBUG 0
59		#include "debug.h"
60
61	+	// Emulation time statistics
62	+	#ifndef EMUL_TIME_STATS
63	+	#define EMUL_TIME_STATS 0
64	+	#endif
65	+
66	+	#if EMUL_TIME_STATS
67	+	static clock_t emul_start_time;
68	+	static uint32 interrupt_count = 0, ppc_interrupt_count = 0;
69	+	static clock_t interrupt_time = 0;
70	+	static uint32 exec68k_count = 0;
71	+	static clock_t exec68k_time = 0;
72	+	static uint32 native_exec_count = 0;
73	+	static clock_t native_exec_time = 0;
74	+	static uint32 macos_exec_count = 0;
75	+	static clock_t macos_exec_time = 0;
76	+	#endif
77	+
78		static void enter_mon(void)
79		{
80		// Start up mon in real-mode
#	Line 55 | Line 84 | static void enter_mon(void)
84		#endif
85		}
86
87	<	// Enable multicore (main/interrupts) cpu emulation?
88	<	#define MULTICORE_CPU 0
87	>	// From main_*.cpp
88	>	extern uintptr SignalStackBase();
89	>
90	>	// From rsrc_patches.cpp
91	>	extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
92	>
93	>	// PowerPC EmulOp to exit from emulation looop
94	>	const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1;
95	>
96	>	// Enable interrupt routine safety checks?
97	>	#define SAFE_INTERRUPT_PPC 1
98
99		// Enable Execute68k() safety checks?
100		#define SAFE_EXEC_68K 1
#	Line 70 | Line 108 | static void enter_mon(void)
108		// Interrupts in native mode?
109		#define INTERRUPTS_IN_NATIVE_MODE 1
110
111	<	// 68k Emulator Data
112	<	struct EmulatorData {
75	<	uint32  v[0x400];
76	<	};
111	>	// Pointer to Kernel Data
112	>	static KernelData * kernel_data;
113
114	<	// Kernel Data
115	<	struct KernelData {
80	<	uint32  v[0x400];
81	<	EmulatorData ed;
82	<	};
114	>	// SIGSEGV handler
115	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
116
117	<	// Pointer to Kernel Data
118	<	static KernelData * const kernel_data = (KernelData *)0x68ffe000;
117	>	#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
118	>	// Special trampolines for EmulOp and NativeOp
119	>	static uint8 *emul_op_trampoline;
120	>	static uint8 *native_op_trampoline;
121	>	#endif
122	>
123	>	// JIT Compiler enabled?
124	>	static inline bool enable_jit_p()
125	>	{
126	>	return PrefsFindBool("jit");
127	>	}
128
129
130		/**
131		*              PowerPC emulator glue with special 'sheep' opcodes
132		**/
133
134	<	struct sheepshaver_exec_return { };
134	>	enum {
135	>	PPC_I(SHEEP) = PPC_I(MAX),
136	>	PPC_I(SHEEP_MAX)
137	>	};
138
139		class sheepshaver_cpu
140		: public powerpc_cpu
#	Line 97 | Line 142 | class sheepshaver_cpu
142		void init_decoder();
143		void execute_sheep(uint32 opcode);
144
145	+	// CPU context to preserve on interrupt
146	+	class interrupt_context {
147	+	uint32 gpr[32];
148	+	uint32 pc;
149	+	uint32 lr;
150	+	uint32 ctr;
151	+	uint32 cr;
152	+	uint32 xer;
153	+	sheepshaver_cpu *cpu;
154	+	const char *where;
155	+	public:
156	+	interrupt_context(sheepshaver_cpu *_cpu, const char *_where);
157	+	~interrupt_context();
158	+	};
159	+
160		public:
161
162	<	sheepshaver_cpu()
163	<	: powerpc_cpu()
104	<	{ init_decoder(); }
162	>	// Constructor
163	>	sheepshaver_cpu();
164
165	<	// Condition Register accessors
165	>	// CR & XER accessors
166		uint32 get_cr() const           { return cr().get(); }
167		void set_cr(uint32 v)           { cr().set(v); }
168	+	uint32 get_xer() const          { return xer().get(); }
169	+	void set_xer(uint32 v)          { xer().set(v); }
170
171	<	// Execution loop
172	<	void execute(uint32 pc);
171	>	// Execute NATIVE_OP routine
172	>	void execute_native_op(uint32 native_op);
173	>
174	>	// Execute EMUL_OP routine
175	>	void execute_emul_op(uint32 emul_op);
176
177		// Execute 68k routine
178		void execute_68k(uint32 entry, M68kRegisters *r);
#	Line 119 | Line 183 | public:
183		// Execute MacOS/PPC code
184		uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args);
185
186	+	#if PPC_ENABLE_JIT
187	+	// Compile one instruction
188	+	virtual int compile1(codegen_context_t & cg_context);
189	+	#endif
190		// Resource manager thunk
191		void get_resource(uint32 old_get_resource);
192
193		// Handle MacOS interrupt
194	<	void interrupt(uint32 entry, sheepshaver_cpu *cpu);
194	>	void interrupt(uint32 entry);
195	>	void handle_interrupt();
196
197	<	// spcflags for interrupts handling
198	<	static uint32 spcflags;
197	>	// Make sure the SIGSEGV handler can access CPU registers
198	>	friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
199
200	<	// Lazy memory allocator (one item at a time)
201	<	void *operator new(size_t size)
202	<	{ return allocator_helper< sheepshaver_cpu, lazy_allocator >::allocate(); }
134	<	void operator delete(void *p)
135	<	{ allocator_helper< sheepshaver_cpu, lazy_allocator >::deallocate(p); }
136	<	// FIXME: really make surre array allocation fail at link time?
137	<	void *operator new[](size_t);
138	<	void operator delete[](void *p);
200	>	// Memory allocator returning areas aligned on 16-byte boundaries
201	>	void *operator new(size_t size);
202	>	void operator delete(void *p);
203		};
204
205	<	uint32 sheepshaver_cpu::spcflags = 0;
206	<	lazy_allocator< sheepshaver_cpu > allocator_helper< sheepshaver_cpu, lazy_allocator >::allocator;
205	>	// Memory allocator returning areas aligned on 16-byte boundaries
206	>	void *sheepshaver_cpu::operator new(size_t size)
207	>	{
208	>	void *p;
209
210	<	void sheepshaver_cpu::init_decoder()
210	>	#if defined(HAVE_POSIX_MEMALIGN)
211	>	if (posix_memalign(&p, 16, size) != 0)
212	>	throw std::bad_alloc();
213	>	#elif defined(HAVE_MEMALIGN)
214	>	p = memalign(16, size);
215	>	#elif defined(HAVE_VALLOC)
216	>	p = valloc(size); // page-aligned!
217	>	#else
218	>	/* XXX: handle padding ourselves */
219	>	p = malloc(size);
220	>	#endif
221	>
222	>	return p;
223	>	}
224	>
225	>	void sheepshaver_cpu::operator delete(void *p)
226		{
227	<	#ifndef PPC_NO_STATIC_II_INDEX_TABLE
228	<	static bool initialized = false;
229	<	if (initialized)
230	<	return;
150	<	initialized = true;
227	>	#if defined(HAVE_MEMALIGN) || defined(HAVE_VALLOC)
228	>	#if defined(__GLIBC__)
229	>	// this is known to work only with GNU libc
230	>	free(p);
231		#endif
232	+	#else
233	+	free(p);
234	+	#endif
235	+	}
236
237	+	sheepshaver_cpu::sheepshaver_cpu()
238	+	: powerpc_cpu(enable_jit_p())
239	+	{
240	+	init_decoder();
241	+	}
242	+
243	+	void sheepshaver_cpu::init_decoder()
244	+	{
245		static const instr_info_t sheep_ii_table[] = {
246		{ "sheep",
247	<	(execute_fn)&sheepshaver_cpu::execute_sheep,
247	>	(execute_pmf)&sheepshaver_cpu::execute_sheep,
248		NULL,
249	<	D_form, 6, 0, CFLOW_TRAP
249	>	PPC_I(SHEEP),
250	>	D_form, 6, 0, CFLOW_JUMP | CFLOW_TRAP
251		}
252		};
253
#	Line 167 | Line 260 | void sheepshaver_cpu::init_decoder()
260		}
261		}
262
170	–	// Forward declaration for native opcode handler
171	–	static void NativeOp(int selector);
172	–
263		/*              NativeOp instruction format:
264	<	+------------+--------------------------+--+----------+------------+
265	<	|      6     |                          |FN|    OP    |      2     |
266	<	+------------+--------------------------+--+----------+------------+
267	<	0         5 |6                       19 20 21      25 26        31
264	>	+------------+-------------------------+--+-----------+------------+
265	>	|      6     |                         |FN|    OP     |      2     |
266	>	+------------+-------------------------+--+-----------+------------+
267	>	0         5 |6                      18 19 20      25 26        31
268		*/
269
270	<	typedef bit_field< 20, 20 > FN_field;
271	<	typedef bit_field< 21, 25 > NATIVE_OP_field;
270	>	typedef bit_field< 19, 19 > FN_field;
271	>	typedef bit_field< 20, 25 > NATIVE_OP_field;
272		typedef bit_field< 26, 31 > EMUL_OP_field;
273
274	+	// Execute EMUL_OP routine
275	+	void sheepshaver_cpu::execute_emul_op(uint32 emul_op)
276	+	{
277	+	M68kRegisters r68;
278	+	WriteMacInt32(XLM_68K_R25, gpr(25));
279	+	WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
280	+	for (int i = 0; i < 8; i++)
281	+	r68.d[i] = gpr(8 + i);
282	+	for (int i = 0; i < 7; i++)
283	+	r68.a[i] = gpr(16 + i);
284	+	r68.a[7] = gpr(1);
285	+	uint32 saved_cr = get_cr() & CR_field<2>::mask();
286	+	uint32 saved_xer = get_xer();
287	+	EmulOp(&r68, gpr(24), emul_op);
288	+	set_cr(saved_cr);
289	+	set_xer(saved_xer);
290	+	for (int i = 0; i < 8; i++)
291	+	gpr(8 + i) = r68.d[i];
292	+	for (int i = 0; i < 7; i++)
293	+	gpr(16 + i) = r68.a[i];
294	+	gpr(1) = r68.a[7];
295	+	WriteMacInt32(XLM_RUN_MODE, MODE_68K);
296	+	}
297	+
298		// Execute SheepShaver instruction
299		void sheepshaver_cpu::execute_sheep(uint32 opcode)
300		{
#	Line 191 | Line 305 | void sheepshaver_cpu::execute_sheep(uint
305		case 0:         // EMUL_RETURN
306		QuitEmulator();
307		break;
308	<
308	>
309		case 1:         // EXEC_RETURN
310	<	throw sheepshaver_exec_return();
310	>	spcflags().set(SPCFLAG_CPU_EXEC_RETURN);
311		break;
312
313		case 2:         // EXEC_NATIVE
314	<	NativeOp(NATIVE_OP_field::extract(opcode));
314	>	execute_native_op(NATIVE_OP_field::extract(opcode));
315		if (FN_field::test(opcode))
316		pc() = lr();
317		else
318		pc() += 4;
319		break;
320
321	<	default: {      // EMUL_OP
322	<	M68kRegisters r68;
209	<	WriteMacInt32(XLM_68K_R25, gpr(25));
210	<	WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
211	<	for (int i = 0; i < 8; i++)
212	<	r68.d[i] = gpr(8 + i);
213	<	for (int i = 0; i < 7; i++)
214	<	r68.a[i] = gpr(16 + i);
215	<	r68.a[7] = gpr(1);
216	<	EmulOp(&r68, gpr(24), EMUL_OP_field::extract(opcode) - 3);
217	<	for (int i = 0; i < 8; i++)
218	<	gpr(8 + i) = r68.d[i];
219	<	for (int i = 0; i < 7; i++)
220	<	gpr(16 + i) = r68.a[i];
221	<	gpr(1) = r68.a[7];
222	<	WriteMacInt32(XLM_RUN_MODE, MODE_68K);
321	>	default:        // EMUL_OP
322	>	execute_emul_op(EMUL_OP_field::extract(opcode) - 3);
323		pc() += 4;
324		break;
325		}
226	–	}
326		}
327
328	<	// Checks for pending interrupts
329	<	struct execute_nothing {
330	<	static inline void execute(powerpc_cpu *) { }
331	<	};
328	>	// Compile one instruction
329	>	#if PPC_ENABLE_JIT
330	>	int sheepshaver_cpu::compile1(codegen_context_t & cg_context)
331	>	{
332	>	const instr_info_t *ii = cg_context.instr_info;
333	>	if (ii->mnemo != PPC_I(SHEEP))
334	>	return COMPILE_FAILURE;
335	>
336	>	int status = COMPILE_FAILURE;
337	>	powerpc_dyngen & dg = cg_context.codegen;
338	>	uint32 opcode = cg_context.opcode;
339
340	<	static void HandleInterrupt(void);
340	>	switch (opcode & 0x3f) {
341	>	case 0:         // EMUL_RETURN
342	>	dg.gen_invoke(QuitEmulator);
343	>	status = COMPILE_CODE_OK;
344	>	break;
345
346	<	struct execute_spcflags_check {
347	<	static inline void execute(powerpc_cpu *cpu) {
348	<	if (SPCFLAGS_TEST(SPCFLAG_ALL_BUT_EXEC_RETURN)) {
349	<	if (SPCFLAGS_TEST( SPCFLAG_ENTER_MON )) {
350	<	SPCFLAGS_CLEAR( SPCFLAG_ENTER_MON );
351	<	enter_mon();
352	<	}
353	<	if (SPCFLAGS_TEST( SPCFLAG_DOINT )) {
354	<	SPCFLAGS_CLEAR( SPCFLAG_DOINT );
355	<	HandleInterrupt();
356	<	}
357	<	if (SPCFLAGS_TEST( SPCFLAG_INT )) {
358	<	SPCFLAGS_CLEAR( SPCFLAG_INT );
359	<	SPCFLAGS_SET( SPCFLAG_DOINT );
346	>	case 1:         // EXEC_RETURN
347	>	dg.gen_spcflags_set(SPCFLAG_CPU_EXEC_RETURN);
348	>	// Don't check for pending interrupts, we do know we have to
349	>	// get out of this block ASAP
350	>	dg.gen_exec_return();
351	>	status = COMPILE_EPILOGUE_OK;
352	>	break;
353	>
354	>	case 2: {       // EXEC_NATIVE
355	>	uint32 selector = NATIVE_OP_field::extract(opcode);
356	>	switch (selector) {
357	>	#if !PPC_REENTRANT_JIT
358	>	// Filter out functions that may invoke Execute68k() or
359	>	// CallMacOS(), this would break reentrancy as they could
360	>	// invalidate the translation cache and even overwrite
361	>	// continuation code when we are done with them.
362	>	case NATIVE_PATCH_NAME_REGISTRY:
363	>	dg.gen_invoke(DoPatchNameRegistry);
364	>	status = COMPILE_CODE_OK;
365	>	break;
366	>	case NATIVE_VIDEO_INSTALL_ACCEL:
367	>	dg.gen_invoke(VideoInstallAccel);
368	>	status = COMPILE_CODE_OK;
369	>	break;
370	>	case NATIVE_VIDEO_VBL:
371	>	dg.gen_invoke(VideoVBL);
372	>	status = COMPILE_CODE_OK;
373	>	break;
374	>	case NATIVE_GET_RESOURCE:
375	>	case NATIVE_GET_1_RESOURCE:
376	>	case NATIVE_GET_IND_RESOURCE:
377	>	case NATIVE_GET_1_IND_RESOURCE:
378	>	case NATIVE_R_GET_RESOURCE: {
379	>	static const uint32 get_resource_ptr[] = {
380	>	XLM_GET_RESOURCE,
381	>	XLM_GET_1_RESOURCE,
382	>	XLM_GET_IND_RESOURCE,
383	>	XLM_GET_1_IND_RESOURCE,
384	>	XLM_R_GET_RESOURCE
385	>	};
386	>	uint32 old_get_resource = ReadMacInt32(get_resource_ptr[selector - NATIVE_GET_RESOURCE]);
387	>	typedef void (*func_t)(dyngen_cpu_base, uint32);
388	>	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::get_resource).ptr();
389	>	dg.gen_invoke_CPU_im(func, old_get_resource);
390	>	status = COMPILE_CODE_OK;
391	>	break;
392	>	}
393	>	case NATIVE_CHECK_LOAD_INVOC:
394	>	dg.gen_load_T0_GPR(3);
395	>	dg.gen_load_T1_GPR(4);
396	>	dg.gen_se_16_32_T1();
397	>	dg.gen_load_T2_GPR(5);
398	>	dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))check_load_invoc);
399	>	status = COMPILE_CODE_OK;
400	>	break;
401	>	#endif
402	>	case NATIVE_BITBLT:
403	>	dg.gen_load_T0_GPR(3);
404	>	dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt);
405	>	status = COMPILE_CODE_OK;
406	>	break;
407	>	case NATIVE_INVRECT:
408	>	dg.gen_load_T0_GPR(3);
409	>	dg.gen_invoke_T0((void (*)(uint32))NQD_invrect);
410	>	status = COMPILE_CODE_OK;
411	>	break;
412	>	case NATIVE_FILLRECT:
413	>	dg.gen_load_T0_GPR(3);
414	>	dg.gen_invoke_T0((void (*)(uint32))NQD_fillrect);
415	>	status = COMPILE_CODE_OK;
416	>	break;
417	>	}
418	>	// Could we fully translate this NativeOp?
419	>	if (status == COMPILE_CODE_OK) {
420	>	if (!FN_field::test(opcode))
421	>	cg_context.done_compile = false;
422	>	else {
423	>	dg.gen_load_A0_LR();
424	>	dg.gen_set_PC_A0();
425	>	cg_context.done_compile = true;
426		}
427	+	break;
428	+	}
429	+	#if PPC_REENTRANT_JIT
430	+	// Try to execute NativeOp trampoline
431	+	if (!FN_field::test(opcode))
432	+	dg.gen_set_PC_im(cg_context.pc + 4);
433	+	else {
434	+	dg.gen_load_A0_LR();
435	+	dg.gen_set_PC_A0();
436	+	}
437	+	dg.gen_mov_32_T0_im(selector);
438	+	dg.gen_jmp(native_op_trampoline);
439	+	cg_context.done_compile = true;
440	+	status = COMPILE_EPILOGUE_OK;
441	+	break;
442	+	#endif
443	+	// Invoke NativeOp handler
444	+	if (!FN_field::test(opcode)) {
445	+	typedef void (*func_t)(dyngen_cpu_base, uint32);
446	+	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
447	+	dg.gen_invoke_CPU_im(func, selector);
448	+	cg_context.done_compile = false;
449	+	status = COMPILE_CODE_OK;
450		}
451	+	// Otherwise, let it generate a call to execute_sheep() which
452	+	// will cause necessary updates to the program counter
453	+	break;
454		}
253	–	};
455
456	<	// Execution loop
457	<	void sheepshaver_cpu::execute(uint32 entry)
458	<	{
459	<	try {
460	<	pc() = entry;
461	<	powerpc_cpu::do_execute<execute_nothing, execute_spcflags_check>();
456	>	default: {      // EMUL_OP
457	>	uint32 emul_op = EMUL_OP_field::extract(opcode) - 3;
458	>	#if PPC_REENTRANT_JIT
459	>	// Try to execute EmulOp trampoline
460	>	dg.gen_set_PC_im(cg_context.pc + 4);
461	>	dg.gen_mov_32_T0_im(emul_op);
462	>	dg.gen_jmp(emul_op_trampoline);
463	>	cg_context.done_compile = true;
464	>	status = COMPILE_EPILOGUE_OK;
465	>	break;
466	>	#endif
467	>	// Invoke EmulOp handler
468	>	typedef void (*func_t)(dyngen_cpu_base, uint32);
469	>	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr();
470	>	dg.gen_invoke_CPU_im(func, emul_op);
471	>	cg_context.done_compile = false;
472	>	status = COMPILE_CODE_OK;
473	>	break;
474		}
262	–	catch (sheepshaver_exec_return const &) {
263	–	// Nothing, simply return
475		}
476	<	catch (...) {
477	<	printf("ERROR: execute() received an unknown exception!\n");
478	<	QuitEmulator();
476	>	return status;
477	>	}
478	>	#endif
479	>
480	>	// CPU context to preserve on interrupt
481	>	sheepshaver_cpu::interrupt_context::interrupt_context(sheepshaver_cpu *_cpu, const char *_where)
482	>	{
483	>	#if SAFE_INTERRUPT_PPC >= 2
484	>	cpu = _cpu;
485	>	where = _where;
486	>
487	>	// Save interrupt context
488	>	memcpy(&gpr[0], &cpu->gpr(0), sizeof(gpr));
489	>	pc = cpu->pc();
490	>	lr = cpu->lr();
491	>	ctr = cpu->ctr();
492	>	cr = cpu->get_cr();
493	>	xer = cpu->get_xer();
494	>	#endif
495	>	}
496	>
497	>	sheepshaver_cpu::interrupt_context::~interrupt_context()
498	>	{
499	>	#if SAFE_INTERRUPT_PPC >= 2
500	>	// Check whether CPU context was preserved by interrupt
501	>	if (memcmp(&gpr[0], &cpu->gpr(0), sizeof(gpr)) != 0) {
502	>	printf("FATAL: %s: interrupt clobbers registers\n", where);
503	>	for (int i = 0; i < 32; i++)
504	>	if (gpr[i] != cpu->gpr(i))
505	>	printf(" r%d: %08x -> %08x\n", i, gpr[i], cpu->gpr(i));
506		}
507	+	if (pc != cpu->pc())
508	+	printf("FATAL: %s: interrupt clobbers PC\n", where);
509	+	if (lr != cpu->lr())
510	+	printf("FATAL: %s: interrupt clobbers LR\n", where);
511	+	if (ctr != cpu->ctr())
512	+	printf("FATAL: %s: interrupt clobbers CTR\n", where);
513	+	if (cr != cpu->get_cr())
514	+	printf("FATAL: %s: interrupt clobbers CR\n", where);
515	+	if (xer != cpu->get_xer())
516	+	printf("FATAL: %s: interrupt clobbers XER\n", where);
517	+	#endif
518		}
519
520		// Handle MacOS interrupt
521	<	void sheepshaver_cpu::interrupt(uint32 entry, sheepshaver_cpu *cpu)
521	>	void sheepshaver_cpu::interrupt(uint32 entry)
522		{
523	<	#if MULTICORE_CPU
524	<	// Initialize stack pointer from previous CPU running
525	<	gpr(1) = cpu->gpr(1);
526	<	#else
523	>	#if EMUL_TIME_STATS
524	>	ppc_interrupt_count++;
525	>	const clock_t interrupt_start = clock();
526	>	#endif
527	>
528	>	#if SAFE_INTERRUPT_PPC
529	>	static int depth = 0;
530	>	if (depth != 0)
531	>	printf("FATAL: sheepshaver_cpu::interrupt() called more than once: %d\n", depth);
532	>	depth++;
533	>	#endif
534	>
535		// Save program counters and branch registers
536		uint32 saved_pc = pc();
537		uint32 saved_lr = lr();
538		uint32 saved_ctr= ctr();
539	<	#endif
539	>	uint32 saved_sp = gpr(1);
540
541	<	// Create stack frame
542	<	gpr(1) -= 64;
541	>	// Initialize stack pointer to SheepShaver alternate stack base
542	>	gpr(1) = SignalStackBase() - 64;
543
544		// Build trampoline to return from interrupt
545	<	uint32 trampoline[] = { POWERPC_EMUL_OP | 1 };
545	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
546
547		// Prepare registers for nanokernel interrupt routine
548	<	kernel_data->v[0x004 >> 2] = gpr(1);
549	<	kernel_data->v[0x018 >> 2] = gpr(6);
548	>	kernel_data->v[0x004 >> 2] = htonl(gpr(1));
549	>	kernel_data->v[0x018 >> 2] = htonl(gpr(6));
550
551	<	gpr(6) = kernel_data->v[0x65c >> 2];
551	>	gpr(6) = ntohl(kernel_data->v[0x65c >> 2]);
552		assert(gpr(6) != 0);
553		WriteMacInt32(gpr(6) + 0x13c, gpr(7));
554		WriteMacInt32(gpr(6) + 0x144, gpr(8));
#	Line 302 | Line 559 | void sheepshaver_cpu::interrupt(uint32 e
559		WriteMacInt32(gpr(6) + 0x16c, gpr(13));
560
561		gpr(1)  = KernelDataAddr;
562	<	gpr(7)  = kernel_data->v[0x660 >> 2];
562	>	gpr(7)  = ntohl(kernel_data->v[0x660 >> 2]);
563		gpr(8)  = 0;
564	<	gpr(10) = (uint32)trampoline;
565	<	gpr(12) = (uint32)trampoline;
566	<	gpr(13) = cr().get();
564	>	gpr(10) = trampoline.addr();
565	>	gpr(12) = trampoline.addr();
566	>	gpr(13) = get_cr();
567
568		// rlwimi. r7,r7,8,0,0
569		uint32 result = op_ppc_rlwimi::apply(gpr(7), 8, 0x80000000, gpr(7));
#	Line 314 | Line 571 | void sheepshaver_cpu::interrupt(uint32 e
571		gpr(7) = result;
572
573		gpr(11) = 0xf072; // MSR (SRR1)
574	<	cr().set((gpr(11) & 0x0fff0000) | (cr().get() & ~0x0fff0000));
574	>	cr().set((gpr(11) & 0x0fff0000) | (get_cr() & ~0x0fff0000));
575
576		// Enter nanokernel
577		execute(entry);
578
322	–	// Cleanup stack
323	–	gpr(1) += 64;
324	–
325	–	#if !MULTICORE_CPU
579		// Restore program counters and branch registers
580		pc() = saved_pc;
581		lr() = saved_lr;
582		ctr()= saved_ctr;
583	+	gpr(1) = saved_sp;
584	+
585	+	#if EMUL_TIME_STATS
586	+	interrupt_time += (clock() - interrupt_start);
587	+	#endif
588	+
589	+	#if SAFE_INTERRUPT_PPC
590	+	depth--;
591		#endif
592		}
593
594		// Execute 68k routine
595		void sheepshaver_cpu::execute_68k(uint32 entry, M68kRegisters *r)
596		{
597	+	#if EMUL_TIME_STATS
598	+	exec68k_count++;
599	+	const clock_t exec68k_start = clock();
600	+	#endif
601	+
602		#if SAFE_EXEC_68K
603		if (ReadMacInt32(XLM_RUN_MODE) != MODE_EMUL_OP)
604		printf("FATAL: Execute68k() not called from EMUL_OP mode\n");
#	Line 342 | Line 608 | void sheepshaver_cpu::execute_68k(uint32
608		uint32 saved_pc = pc();
609		uint32 saved_lr = lr();
610		uint32 saved_ctr= ctr();
611	+	uint32 saved_cr = get_cr();
612
613		// Create MacOS stack frame
614	+	// FIXME: make sure MacOS doesn't expect PPC registers to live on top
615		uint32 sp = gpr(1);
616	<	gpr(1) -= 56 + 19*4 + 18*8;
616	>	gpr(1) -= 56;
617		WriteMacInt32(gpr(1), sp);
618
619		// Save PowerPC registers
620	<	memcpy(Mac2HostAddr(gpr(1)+56), &gpr(13), sizeof(uint32)*(32-13));
620	>	uint32 saved_GPRs[19];
621	>	memcpy(&saved_GPRs[0], &gpr(13), sizeof(uint32)*(32-13));
622		#if SAVE_FP_EXEC_68K
623	<	memcpy(Mac2HostAddr(gpr(1)+56+19*4), &fpr(14), sizeof(double)*(32-14));
623	>	double saved_FPRs[18];
624	>	memcpy(&saved_FPRs[0], &fpr(14), sizeof(double)*(32-14));
625		#endif
626
627		// Setup registers for 68k emulator
#	Line 365 | Line 635 | void sheepshaver_cpu::execute_68k(uint32
635		gpr(25) = ReadMacInt32(XLM_68K_R25);            // MSB of SR
636		gpr(26) = 0;
637		gpr(28) = 0;                                                            // VBR
638	<	gpr(29) = kernel_data->ed.v[0x74 >> 2];         // Pointer to opcode table
639	<	gpr(30) = kernel_data->ed.v[0x78 >> 2];         // Address of emulator
638	>	gpr(29) = ntohl(kernel_data->ed.v[0x74 >> 2]);          // Pointer to opcode table
639	>	gpr(30) = ntohl(kernel_data->ed.v[0x78 >> 2]);          // Address of emulator
640		gpr(31) = KernelDataAddr + 0x1000;
641
642		// Push return address (points to EXEC_RETURN opcode) on stack
#	Line 398 | Line 668 | void sheepshaver_cpu::execute_68k(uint32
668		r->a[i] = gpr(16 + i);
669
670		// Restore PowerPC registers
671	<	memcpy(&gpr(13), Mac2HostAddr(gpr(1)+56), sizeof(uint32)*(32-13));
671	>	memcpy(&gpr(13), &saved_GPRs[0], sizeof(uint32)*(32-13));
672		#if SAVE_FP_EXEC_68K
673	<	memcpy(&fpr(14), Mac2HostAddr(gpr(1)+56+19*4), sizeof(double)*(32-14));
673	>	memcpy(&fpr(14), &saved_FPRs[0], sizeof(double)*(32-14));
674		#endif
675
676		// Cleanup stack
677	<	gpr(1) += 56 + 19*4 + 18*8;
677	>	gpr(1) += 56;
678
679		// Restore program counters and branch registers
680		pc() = saved_pc;
681		lr() = saved_lr;
682		ctr()= saved_ctr;
683	+	set_cr(saved_cr);
684	+
685	+	#if EMUL_TIME_STATS
686	+	exec68k_time += (clock() - exec68k_start);
687	+	#endif
688		}
689
690		// Call MacOS PPC code
691		uint32 sheepshaver_cpu::execute_macos_code(uint32 tvect, int nargs, uint32 const *args)
692		{
693	+	#if EMUL_TIME_STATS
694	+	macos_exec_count++;
695	+	const clock_t macos_exec_start = clock();
696	+	#endif
697	+
698		// Save program counters and branch registers
699		uint32 saved_pc = pc();
700		uint32 saved_lr = lr();
701		uint32 saved_ctr= ctr();
702
703		// Build trampoline with EXEC_RETURN
704	<	uint32 trampoline[] = { POWERPC_EMUL_OP | 1 };
705	<	lr() = (uint32)trampoline;
704	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
705	>	lr() = trampoline.addr();
706
707		gpr(1) -= 64;                                                           // Create stack frame
708		uint32 proc = ReadMacInt32(tvect);                      // Get routine address
#	Line 453 | Line 733 | uint32 sheepshaver_cpu::execute_macos_co
733		lr() = saved_lr;
734		ctr()= saved_ctr;
735
736	+	#if EMUL_TIME_STATS
737	+	macos_exec_time += (clock() - macos_exec_start);
738	+	#endif
739	+
740		return retval;
741		}
742
#	Line 461 | Line 745 | inline void sheepshaver_cpu::execute_ppc
745		{
746		// Save branch registers
747		uint32 saved_lr = lr();
464	–	uint32 saved_ctr= ctr();
748
749	<	const uint32 trampoline[] = { POWERPC_EMUL_OP | 1 };
749	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
750	>	WriteMacInt32(trampoline.addr(), POWERPC_EXEC_RETURN);
751	>	lr() = trampoline.addr();
752
468	–	lr() = (uint32)trampoline;
469	–	ctr()= entry;
753		execute(entry);
754
755		// Restore branch registers
756		lr() = saved_lr;
474	–	ctr()= saved_ctr;
757		}
758
759		// Resource Manager thunk
478	–	extern "C" void check_load_invoc(uint32 type, int16 id, uint16 **h);
479	–
760		inline void sheepshaver_cpu::get_resource(uint32 old_get_resource)
761		{
762		uint32 type = gpr(3);
#	Line 487 | Line 767 | inline void sheepshaver_cpu::get_resourc
767
768		// Call old routine
769		execute_ppc(old_get_resource);
490	–	uint16 **handle = (uint16 **)gpr(3);
770
771		// Call CheckLoad()
772	+	uint32 handle = gpr(3);
773		check_load_invoc(type, id, handle);
774	<	gpr(3) = (uint32)handle;
774	>	gpr(3) = handle;
775
776		// Cleanup stack
777		gpr(1) += 56;
#	Line 502 | Line 782 | inline void sheepshaver_cpu::get_resourc
782		*              SheepShaver CPU engine interface
783		**/
784
785	<	static sheepshaver_cpu *main_cpu = NULL;                // CPU emulator to handle usual control flow
786	<	static sheepshaver_cpu *interrupt_cpu = NULL;   // CPU emulator to handle interrupts
507	<	static sheepshaver_cpu *current_cpu = NULL;             // Current CPU emulator context
508	<
509	<	static inline void cpu_push(sheepshaver_cpu *new_cpu)
510	<	{
511	<	#if MULTICORE_CPU
512	<	current_cpu = new_cpu;
513	<	#endif
514	<	}
785	>	// PowerPC CPU emulator
786	>	static sheepshaver_cpu *ppc_cpu = NULL;
787
788	<	static inline void cpu_pop()
788	>	void FlushCodeCache(uintptr start, uintptr end)
789		{
790	<	#if MULTICORE_CPU
791	<	current_cpu = main_cpu;
520	<	#endif
790	>	D(bug("FlushCodeCache(%08x, %08x)\n", start, end));
791	>	ppc_cpu->invalidate_cache_range(start, end);
792		}
793
794		// Dump PPC registers
795		static void dump_registers(void)
796		{
797	<	current_cpu->dump_registers();
797	>	ppc_cpu->dump_registers();
798		}
799
800		// Dump log
801		static void dump_log(void)
802		{
803	<	current_cpu->dump_log();
803	>	ppc_cpu->dump_log();
804		}
805
806		/*
807		*  Initialize CPU emulation
808		*/
809
810	<	static struct sigaction sigsegv_action;
540	<
541	<	#if defined(__powerpc__)
542	<	#include <sys/ucontext.h>
543	<	#endif
544	<
545	<	static void sigsegv_handler(int sig, siginfo_t *sip, void *scp)
810	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
811		{
547	–	const uintptr addr = (uintptr)sip->si_addr;
812		#if ENABLE_VOSF
813	<	// Handle screen fault.
814	<	extern bool Screen_fault_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction);
815	<	if (Screen_fault_handler((sigsegv_address_t)addr, SIGSEGV_INVALID_PC))
816	<	return;
813	>	// Handle screen fault
814	>	extern bool Screen_fault_handler(sigsegv_address_t, sigsegv_address_t);
815	>	if (Screen_fault_handler(fault_address, fault_instruction))
816	>	return SIGSEGV_RETURN_SUCCESS;
817		#endif
818	<	#if defined(__powerpc__)
819	<	if (addr >= ROM_BASE && addr < ROM_BASE + ROM_SIZE) {
820	<	printf("IGNORE write access to ROM at %08x\n", addr);
821	<	(((ucontext_t *)scp)->uc_mcontext.regs)->nip += 4;
822	<	return;
823	<	}
824	<	if (addr >= 0xf3012000 && addr < 0xf3014000 && 0) {
825	<	printf("IGNORE write access to ROM at %08x\n", addr);
826	<	(((ucontext_t *)scp)->uc_mcontext.regs)->nip += 4;
827	<	return;
818	>
819	>	const uintptr addr = (uintptr)fault_address;
820	>	#if HAVE_SIGSEGV_SKIP_INSTRUCTION
821	>	// Ignore writes to ROM
822	>	if ((addr - (uintptr)ROMBaseHost) < ROM_SIZE)
823	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
824	>
825	>	// Get program counter of target CPU
826	>	sheepshaver_cpu * const cpu = ppc_cpu;
827	>	const uint32 pc = cpu->pc();
828	>
829	>	// Fault in Mac ROM or RAM?
830	>	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize)) || (pc >= DR_CACHE_BASE && pc < (DR_CACHE_BASE + DR_CACHE_SIZE));
831	>	if (mac_fault) {
832	>
833	>	// "VM settings" during MacOS 8 installation
834	>	if (pc == ROM_BASE + 0x488160 && cpu->gpr(20) == 0xf8000000)
835	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
836	>
837	>	// MacOS 8.5 installation
838	>	else if (pc == ROM_BASE + 0x488140 && cpu->gpr(16) == 0xf8000000)
839	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
840	>
841	>	// MacOS 8 serial drivers on startup
842	>	else if (pc == ROM_BASE + 0x48e080 && (cpu->gpr(8) == 0xf3012002 || cpu->gpr(8) == 0xf3012000))
843	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
844	>
845	>	// MacOS 8.1 serial drivers on startup
846	>	else if (pc == ROM_BASE + 0x48c5e0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
847	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
848	>	else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
849	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
850	>
851	>	// MacOS 8.6 serial drivers on startup (with DR Cache and OldWorld ROM)
852	>	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(16) == 0xf3012002 || cpu->gpr(16) == 0xf3012000))
853	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
854	>	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
855	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
856	>
857	>	// Ignore writes to the zero page
858	>	else if ((uint32)(addr - SheepMem::ZeroPage()) < (uint32)SheepMem::PageSize())
859	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
860	>
861	>	// Ignore all other faults, if requested
862	>	if (PrefsFindBool("ignoresegv"))
863	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
864		}
565	–	#endif
566	–	printf("Caught SIGSEGV at address %p\n", sip->si_addr);
567	–	printf("Native PC: %08x\n", (((ucontext_t *)scp)->uc_mcontext.regs)->nip);
568	–	printf("Current CPU: %s\n", current_cpu == main_cpu ? "main" : "interrupts");
569	–	#if 1
570	–	dump_registers();
865		#else
866	<	printf("Main CPU context\n");
573	<	main_cpu->dump_registers();
574	<	printf("Interrupts CPU context\n");
575	<	interrupt_cpu->dump_registers();
866	>	#error "FIXME: You don't have the capability to skip instruction within signal handlers"
867		#endif
868	<	current_cpu->dump_log();
868	>
869	>	printf("SIGSEGV\n");
870	>	printf("  pc %p\n", fault_instruction);
871	>	printf("  ea %p\n", fault_address);
872	>	dump_registers();
873	>	ppc_cpu->dump_log();
874		enter_mon();
875		QuitEmulator();
876	+
877	+	return SIGSEGV_RETURN_FAILURE;
878		}
879
880		void init_emul_ppc(void)
881		{
882	+	// Get pointer to KernelData in host address space
883	+	kernel_data = (KernelData *)Mac2HostAddr(KERNEL_DATA_BASE);
884	+
885		// Initialize main CPU emulator
886	<	main_cpu = new sheepshaver_cpu();
887	<	main_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
886	>	ppc_cpu = new sheepshaver_cpu();
887	>	ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
888	>	ppc_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
889		WriteMacInt32(XLM_RUN_MODE, MODE_68K);
890
589	–	#if MULTICORE_CPU
590	–	// Initialize alternate CPU emulator to handle interrupts
591	–	interrupt_cpu = new sheepshaver_cpu();
592	–	#endif
593	–
594	–	// Install SIGSEGV handler
595	–	sigemptyset(&sigsegv_action.sa_mask);
596	–	sigsegv_action.sa_sigaction = sigsegv_handler;
597	–	sigsegv_action.sa_flags = SA_SIGINFO;
598	–	sigsegv_action.sa_restorer = NULL;
599	–	sigaction(SIGSEGV, &sigsegv_action, NULL);
600	–
891		#if ENABLE_MON
892		// Install "regs" command in cxmon
893		mon_add_command("regs", dump_registers, "regs                     Dump PowerPC registers\n");
894		mon_add_command("log", dump_log, "log                      Dump PowerPC emulation log\n");
895		#endif
896	+
897	+	#if EMUL_TIME_STATS
898	+	emul_start_time = clock();
899	+	#endif
900	+	}
901	+
902	+	/*
903	+	*  Deinitialize emulation
904	+	*/
905	+
906	+	void exit_emul_ppc(void)
907	+	{
908	+	#if EMUL_TIME_STATS
909	+	clock_t emul_end_time = clock();
910	+
911	+	printf("### Statistics for SheepShaver emulation parts\n");
912	+	const clock_t emul_time = emul_end_time - emul_start_time;
913	+	printf("Total emulation time : %.1f sec\n", double(emul_time) / double(CLOCKS_PER_SEC));
914	+	printf("Total interrupt count: %d (%2.1f Hz)\n", interrupt_count,
915	+	(double(interrupt_count) * CLOCKS_PER_SEC) / double(emul_time));
916	+	printf("Total ppc interrupt count: %d (%2.1f %%)\n", ppc_interrupt_count,
917	+	(double(ppc_interrupt_count) * 100.0) / double(interrupt_count));
918	+
919	+	#define PRINT_STATS(LABEL, VAR_PREFIX) do {                                                             \
920	+	printf("Total " LABEL " count : %d\n", VAR_PREFIX##_count);             \
921	+	printf("Total " LABEL " time  : %.1f sec (%.1f%%)\n",                   \
922	+	double(VAR_PREFIX##_time) / double(CLOCKS_PER_SEC),          \
923	+	100.0 * double(VAR_PREFIX##_time) / double(emul_time));      \
924	+	} while (0)
925	+
926	+	PRINT_STATS("Execute68k[Trap] execution", exec68k);
927	+	PRINT_STATS("NativeOp execution", native_exec);
928	+	PRINT_STATS("MacOS routine execution", macos_exec);
929	+
930	+	#undef PRINT_STATS
931	+	printf("\n");
932	+	#endif
933	+
934	+	delete ppc_cpu;
935		}
936
937	+	#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
938	+	// Initialize EmulOp trampolines
939	+	void init_emul_op_trampolines(basic_dyngen & dg)
940	+	{
941	+	typedef void (*func_t)(dyngen_cpu_base, uint32);
942	+	func_t func;
943	+
944	+	// EmulOp
945	+	emul_op_trampoline = dg.gen_start();
946	+	func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr();
947	+	dg.gen_invoke_CPU_T0(func);
948	+	dg.gen_exec_return();
949	+	dg.gen_end();
950	+
951	+	// NativeOp
952	+	native_op_trampoline = dg.gen_start();
953	+	func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
954	+	dg.gen_invoke_CPU_T0(func);
955	+	dg.gen_exec_return();
956	+	dg.gen_end();
957	+
958	+	D(bug("EmulOp trampoline:   %p\n", emul_op_trampoline));
959	+	D(bug("NativeOp trampoline: %p\n", native_op_trampoline));
960	+	}
961	+	#endif
962	+
963		/*
964		*  Emulation loop
965		*/
966
967		void emul_ppc(uint32 entry)
968		{
969	<	current_cpu = main_cpu;
970	<	current_cpu->start_log();
971	<	current_cpu->execute(entry);
969	>	#if 0
970	>	ppc_cpu->start_log();
971	>	#endif
972	>	// start emulation loop and enable code translation or caching
973	>	ppc_cpu->execute(entry);
974		}
975
976		/*
977		*  Handle PowerPC interrupt
978		*/
979
623	–	// Atomic operations
624	–	extern int atomic_add(int *var, int v);
625	–	extern int atomic_and(int *var, int v);
626	–	extern int atomic_or(int *var, int v);
627	–
980		void TriggerInterrupt(void)
981		{
982		#if 0
983		WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1);
984		#else
985	<	SPCFLAGS_SET( SPCFLAG_INT );
985	>	// Trigger interrupt to main cpu only
986	>	if (ppc_cpu)
987	>	ppc_cpu->trigger_interrupt();
988		#endif
989		}
990
991	<	static void HandleInterrupt(void)
991	>	void sheepshaver_cpu::handle_interrupt(void)
992		{
993	+	#ifdef USE_SDL_VIDEO
994	+	// We must fill in the events queue in the same thread that did call SDL_SetVideoMode()
995	+	SDL_PumpEvents();
996	+	#endif
997	+
998		// Do nothing if interrupts are disabled
999		if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0)
1000		return;
1001
1002	<	// Do nothing if there is no interrupt pending
1003	<	if (InterruptFlags == 0)
1004	<	return;
1002	>	// Current interrupt nest level
1003	>	static int interrupt_depth = 0;
1004	>	++interrupt_depth;
1005	>	#if EMUL_TIME_STATS
1006	>	interrupt_count++;
1007	>	#endif
1008
1009		// Disable MacOS stack sniffer
1010		WriteMacInt32(0x110, 0);
#	Line 651 | Line 1013 | static void HandleInterrupt(void)
1013		switch (ReadMacInt32(XLM_RUN_MODE)) {
1014		case MODE_68K:
1015		// 68k emulator active, trigger 68k interrupt level 1
654	–	assert(current_cpu == main_cpu);
1016		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
1017	<	main_cpu->set_cr(main_cpu->get_cr() | tswap32(kernel_data->v[0x674 >> 2]));
1017	>	set_cr(get_cr() | tswap32(kernel_data->v[0x674 >> 2]));
1018		break;
1019
1020		#if INTERRUPTS_IN_NATIVE_MODE
1021		case MODE_NATIVE:
1022		// 68k emulator inactive, in nanokernel?
1023	<	assert(current_cpu == main_cpu);
1024	<	if (main_cpu->gpr(1) != KernelDataAddr) {
1023	>	if (gpr(1) != KernelDataAddr && interrupt_depth == 1) {
1024	>	interrupt_context ctx(this, "PowerPC mode");
1025	>
1026		// Prepare for 68k interrupt level 1
1027		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
1028		WriteMacInt32(tswap32(kernel_data->v[0x658 >> 2]) + 0xdc,
#	Line 669 | Line 1031 | static void HandleInterrupt(void)
1031
1032		// Execute nanokernel interrupt routine (this will activate the 68k emulator)
1033		DisableInterrupt();
672	–	cpu_push(interrupt_cpu);
1034		if (ROMType == ROMTYPE_NEWWORLD)
1035	<	current_cpu->interrupt(ROM_BASE + 0x312b1c, main_cpu);
1035	>	ppc_cpu->interrupt(ROM_BASE + 0x312b1c);
1036		else
1037	<	current_cpu->interrupt(ROM_BASE + 0x312a3c, main_cpu);
677	<	cpu_pop();
1037	>	ppc_cpu->interrupt(ROM_BASE + 0x312a3c);
1038		}
1039		break;
1040		#endif
#	Line 683 | Line 1043 | static void HandleInterrupt(void)
1043		case MODE_EMUL_OP:
1044		// 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0
1045		if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) {
1046	+	interrupt_context ctx(this, "68k mode");
1047	+	#if EMUL_TIME_STATS
1048	+	const clock_t interrupt_start = clock();
1049	+	#endif
1050		#if 1
1051		// Execute full 68k interrupt routine
1052		M68kRegisters r;
1053		uint32 old_r25 = ReadMacInt32(XLM_68K_R25);     // Save interrupt level
1054		WriteMacInt32(XLM_68K_R25, 0x21);                       // Execute with interrupt level 1
1055	<	static const uint8 proc[] = {
1055	>	static const uint8 proc_template[] = {
1056		0x3f, 0x3c, 0x00, 0x00,                 // move.w       #$0000,-(sp)    (fake format word)
1057		0x48, 0x7a, 0x00, 0x0a,                 // pea          @1(pc)                  (return address)
1058		0x40, 0xe7,                                             // move         sr,-(sp)                (saved SR)
#	Line 696 | Line 1060 | static void HandleInterrupt(void)
1060		0x4e, 0xd0,                                             // jmp          (a0)
1061		M68K_RTS >> 8, M68K_RTS & 0xff  // @1
1062		};
1063	<	Execute68k((uint32)proc, &r);
1063	>	BUILD_SHEEPSHAVER_PROCEDURE(proc);
1064	>	Execute68k(proc, &r);
1065		WriteMacInt32(XLM_68K_R25, old_r25);            // Restore interrupt level
1066		#else
1067		// Only update cursor
#	Line 704 | Line 1069 | static void HandleInterrupt(void)
1069		if (InterruptFlags & INTFLAG_VIA) {
1070		ClearInterruptFlag(INTFLAG_VIA);
1071		ADBInterrupt();
1072	<	ExecutePPC(VideoVBL);
1072	>	ExecuteNative(NATIVE_VIDEO_VBL);
1073		}
1074		}
1075		#endif
1076	+	#if EMUL_TIME_STATS
1077	+	interrupt_time += (clock() - interrupt_start);
1078	+	#endif
1079		}
1080		break;
1081		#endif
1082		}
715	–	}
1083
1084	<	/*
1085	<	*  Execute NATIVE_OP opcode (called by PowerPC emulator)
1086	<	*/
720	<
721	<	#define POWERPC_NATIVE_OP_INIT(LR, OP) \
722	<	tswap32(POWERPC_EMUL_OP | ((LR) << 11) | (((uint32)OP) << 6) | 2)
723	<
724	<	// FIXME: Make sure 32-bit relocations are used
725	<	const uint32 NativeOpTable[NATIVE_OP_MAX] = {
726	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_PATCH_NAME_REGISTRY),
727	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_INSTALL_ACCEL),
728	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_VBL),
729	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_DO_DRIVER_IO),
730	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_IRQ),
731	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_INIT),
732	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_TERM),
733	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_OPEN),
734	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_CLOSE),
735	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_WPUT),
736	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_RSRV),
737	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_NOTHING),
738	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_OPEN),
739	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_IN),
740	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_OUT),
741	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CONTROL),
742	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_STATUS),
743	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CLOSE),
744	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_RESOURCE),
745	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_RESOURCE),
746	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_IND_RESOURCE),
747	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_IND_RESOURCE),
748	<	POWERPC_NATIVE_OP_INIT(1, NATIVE_R_GET_RESOURCE),
749	<	POWERPC_NATIVE_OP_INIT(0, NATIVE_DISABLE_INTERRUPT),
750	<	POWERPC_NATIVE_OP_INIT(0, NATIVE_ENABLE_INTERRUPT),
751	<	};
1084	>	// We are done with this interrupt
1085	>	--interrupt_depth;
1086	>	}
1087
1088		static void get_resource(void);
1089		static void get_1_resource(void);
#	Line 756 | Line 1091 | static void get_ind_resource(void);
1091		static void get_1_ind_resource(void);
1092		static void r_get_resource(void);
1093
1094	<	#define GPR(REG) current_cpu->gpr(REG)
1095	<
761	<	static void NativeOp(int selector)
1094	>	// Execute NATIVE_OP routine
1095	>	void sheepshaver_cpu::execute_native_op(uint32 selector)
1096		{
1097	+	#if EMUL_TIME_STATS
1098	+	native_exec_count++;
1099	+	const clock_t native_exec_start = clock();
1100	+	#endif
1101	+
1102		switch (selector) {
1103		case NATIVE_PATCH_NAME_REGISTRY:
1104		DoPatchNameRegistry();
#	Line 771 | Line 1110 | static void NativeOp(int selector)
1110		VideoVBL();
1111		break;
1112		case NATIVE_VIDEO_DO_DRIVER_IO:
1113	<	GPR(3) = (int32)(int16)VideoDoDriverIO((void *)GPR(3), (void *)GPR(4),
775	<	(void *)GPR(5), GPR(6), GPR(7));
1113	>	gpr(3) = (int32)(int16)VideoDoDriverIO(gpr(3), gpr(4), gpr(5), gpr(6), gpr(7));
1114		break;
1115	<	case NATIVE_GET_RESOURCE:
1116	<	get_resource();
1115	>	case NATIVE_ETHER_IRQ:
1116	>	EtherIRQ();
1117		break;
1118	<	case NATIVE_GET_1_RESOURCE:
1119	<	get_1_resource();
1118	>	case NATIVE_ETHER_INIT:
1119	>	gpr(3) = InitStreamModule((void *)gpr(3));
1120		break;
1121	<	case NATIVE_GET_IND_RESOURCE:
1122	<	get_ind_resource();
1121	>	case NATIVE_ETHER_TERM:
1122	>	TerminateStreamModule();
1123		break;
1124	<	case NATIVE_GET_1_IND_RESOURCE:
1125	<	get_1_ind_resource();
1124	>	case NATIVE_ETHER_OPEN:
1125	>	gpr(3) = ether_open((queue_t *)gpr(3), (void *)gpr(4), gpr(5), gpr(6), (void*)gpr(7));
1126	>	break;
1127	>	case NATIVE_ETHER_CLOSE:
1128	>	gpr(3) = ether_close((queue_t *)gpr(3), gpr(4), (void *)gpr(5));
1129	>	break;
1130	>	case NATIVE_ETHER_WPUT:
1131	>	gpr(3) = ether_wput((queue_t *)gpr(3), (mblk_t *)gpr(4));
1132	>	break;
1133	>	case NATIVE_ETHER_RSRV:
1134	>	gpr(3) = ether_rsrv((queue_t *)gpr(3));
1135	>	break;
1136	>	case NATIVE_SYNC_HOOK:
1137	>	gpr(3) = NQD_sync_hook(gpr(3));
1138	>	break;
1139	>	case NATIVE_BITBLT_HOOK:
1140	>	gpr(3) = NQD_bitblt_hook(gpr(3));
1141	>	break;
1142	>	case NATIVE_BITBLT:
1143	>	NQD_bitblt(gpr(3));
1144	>	break;
1145	>	case NATIVE_FILLRECT_HOOK:
1146	>	gpr(3) = NQD_fillrect_hook(gpr(3));
1147		break;
1148	<	case NATIVE_R_GET_RESOURCE:
1149	<	r_get_resource();
1148	>	case NATIVE_INVRECT:
1149	>	NQD_invrect(gpr(3));
1150	>	break;
1151	>	case NATIVE_FILLRECT:
1152	>	NQD_fillrect(gpr(3));
1153		break;
1154		case NATIVE_SERIAL_NOTHING:
1155		case NATIVE_SERIAL_OPEN:
#	Line 806 | Line 1168 | static void NativeOp(int selector)
1168		SerialStatus,
1169		SerialClose
1170		};
1171	<	GPR(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](GPR(3), GPR(4));
1171	>	gpr(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](gpr(3), gpr(4));
1172		break;
1173		}
1174	<	case NATIVE_DISABLE_INTERRUPT:
1175	<	DisableInterrupt();
1174	>	case NATIVE_GET_RESOURCE:
1175	>	case NATIVE_GET_1_RESOURCE:
1176	>	case NATIVE_GET_IND_RESOURCE:
1177	>	case NATIVE_GET_1_IND_RESOURCE:
1178	>	case NATIVE_R_GET_RESOURCE: {
1179	>	typedef void (*GetResourceCallback)(void);
1180	>	static const GetResourceCallback get_resource_callbacks[] = {
1181	>	::get_resource,
1182	>	::get_1_resource,
1183	>	::get_ind_resource,
1184	>	::get_1_ind_resource,
1185	>	::r_get_resource
1186	>	};
1187	>	get_resource_callbacks[selector - NATIVE_GET_RESOURCE]();
1188		break;
1189	<	case NATIVE_ENABLE_INTERRUPT:
1190	<	EnableInterrupt();
1189	>	}
1190	>	case NATIVE_MAKE_EXECUTABLE:
1191	>	MakeExecutable(0, gpr(4), gpr(5));
1192	>	break;
1193	>	case NATIVE_CHECK_LOAD_INVOC:
1194	>	check_load_invoc(gpr(3), gpr(4), gpr(5));
1195		break;
1196		default:
1197		printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector);
1198		QuitEmulator();
1199		break;
1200		}
823	–	}
824	–
825	–	/*
826	–	*  Execute native subroutine (LR must contain return address)
827	–	*/
1201
1202	<	void ExecuteNative(int selector)
1203	<	{
1204	<	uint32 tvect[2];
832	<	tvect[0] = tswap32(POWERPC_NATIVE_OP_FUNC(selector));
833	<	tvect[1] = 0; // Fake TVECT
834	<	RoutineDescriptor desc = BUILD_PPC_ROUTINE_DESCRIPTOR(0, tvect);
835	<	M68kRegisters r;
836	<	Execute68k((uint32)&desc, &r);
1202	>	#if EMUL_TIME_STATS
1203	>	native_exec_time += (clock() - native_exec_start);
1204	>	#endif
1205		}
1206
1207		/*
#	Line 844 | Line 1212 | void ExecuteNative(int selector)
1212
1213		void Execute68k(uint32 pc, M68kRegisters *r)
1214		{
1215	<	current_cpu->execute_68k(pc, r);
1215	>	ppc_cpu->execute_68k(pc, r);
1216		}
1217
1218		/*
#	Line 854 | Line 1222 | void Execute68k(uint32 pc, M68kRegisters
1222
1223		void Execute68kTrap(uint16 trap, M68kRegisters *r)
1224		{
1225	<	uint16 proc[2] = {trap, M68K_RTS};
1226	<	Execute68k((uint32)proc, r);
1225	>	SheepVar proc_var(4);
1226	>	uint32 proc = proc_var.addr();
1227	>	WriteMacInt16(proc, trap);
1228	>	WriteMacInt16(proc + 2, M68K_RTS);
1229	>	Execute68k(proc, r);
1230		}
1231
1232		/*
#	Line 864 | Line 1235 | void Execute68kTrap(uint16 trap, M68kReg
1235
1236		uint32 call_macos(uint32 tvect)
1237		{
1238	<	return current_cpu->execute_macos_code(tvect, 0, NULL);
1238	>	return ppc_cpu->execute_macos_code(tvect, 0, NULL);
1239		}
1240
1241		uint32 call_macos1(uint32 tvect, uint32 arg1)
1242		{
1243		const uint32 args[] = { arg1 };
1244	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1244	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1245		}
1246
1247		uint32 call_macos2(uint32 tvect, uint32 arg1, uint32 arg2)
1248		{
1249		const uint32 args[] = { arg1, arg2 };
1250	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1250	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1251		}
1252
1253		uint32 call_macos3(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3)
1254		{
1255		const uint32 args[] = { arg1, arg2, arg3 };
1256	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1256	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1257		}
1258
1259		uint32 call_macos4(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4)
1260		{
1261		const uint32 args[] = { arg1, arg2, arg3, arg4 };
1262	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1262	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1263		}
1264
1265		uint32 call_macos5(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5)
1266		{
1267		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5 };
1268	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1268	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1269		}
1270
1271		uint32 call_macos6(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6)
1272		{
1273		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6 };
1274	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1274	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1275		}
1276
1277		uint32 call_macos7(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6, uint32 arg7)
1278		{
1279		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6, arg7 };
1280	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
910	<	}
911	<
912	<	/*
913	<	*  Atomic operations
914	<	*/
915	<
916	<	int atomic_add(int *var, int v)
917	<	{
918	<	int ret = *var;
919	<	*var += v;
920	<	return ret;
921	<	}
922	<
923	<	int atomic_and(int *var, int v)
924	<	{
925	<	int ret = *var;
926	<	*var &= v;
927	<	return ret;
928	<	}
929	<
930	<	int atomic_or(int *var, int v)
931	<	{
932	<	int ret = *var;
933	<	*var |= v;
934	<	return ret;
1280	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1281		}
1282
1283		/*
#	Line 940 | Line 1286 | int atomic_or(int *var, int v)
1286
1287		void get_resource(void)
1288		{
1289	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1289	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1290		}
1291
1292		void get_1_resource(void)
1293		{
1294	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1294	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1295		}
1296
1297		void get_ind_resource(void)
1298		{
1299	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1299	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1300		}
1301
1302		void get_1_ind_resource(void)
1303		{
1304	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1304	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1305		}
1306
1307		void r_get_resource(void)
1308		{
1309	<	current_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1309	>	ppc_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1310		}

Diff Legend

–	Removed lines
+	Added lines
<	Changed lines
>	Changed lines