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/* |
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* sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface |
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* |
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* SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig |
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* SheepShaver (C) 1997-2005 Christian Bauer and Marc Hellwig |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License as published by |
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#include <stdio.h> |
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#include <stdlib.h> |
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#ifdef HAVE_MALLOC_H |
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#include <malloc.h> |
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#endif |
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|
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#ifdef USE_SDL_VIDEO |
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#include <SDL_events.h> |
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// PowerPC EmulOp to exit from emulation looop |
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const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1; |
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|
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// Enable interrupt routine safety checks? |
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#define SAFE_INTERRUPT_PPC 1 |
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|
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// Enable Execute68k() safety checks? |
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#define SAFE_EXEC_68K 1 |
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|
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#define INTERRUPTS_IN_NATIVE_MODE 1 |
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|
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// Pointer to Kernel Data |
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static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE; |
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static KernelData * kernel_data; |
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|
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// SIGSEGV handler |
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sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t); |
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void init_decoder(); |
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void execute_sheep(uint32 opcode); |
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|
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// CPU context to preserve on interrupt |
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class interrupt_context { |
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uint32 gpr[32]; |
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uint32 pc; |
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uint32 lr; |
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uint32 ctr; |
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uint32 cr; |
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uint32 xer; |
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sheepshaver_cpu *cpu; |
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const char *where; |
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public: |
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interrupt_context(sheepshaver_cpu *_cpu, const char *_where); |
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~interrupt_context(); |
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}; |
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|
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public: |
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|
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// Constructor |
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// Execute MacOS/PPC code |
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uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args); |
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#if PPC_ENABLE_JIT |
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// Compile one instruction |
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virtual int compile1(codegen_context_t & cg_context); |
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|
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#endif |
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// Resource manager thunk |
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void get_resource(uint32 old_get_resource); |
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|
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// Handle MacOS interrupt |
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void interrupt(uint32 entry); |
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void handle_interrupt(); |
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|
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// Make sure the SIGSEGV handler can access CPU registers |
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friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t); |
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|
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// Memory allocator returning areas aligned on 16-byte boundaries |
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void *operator new(size_t size); |
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void operator delete(void *p); |
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}; |
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|
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// Memory allocator returning areas aligned on 16-byte boundaries |
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void *operator new(size_t size) |
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void *sheepshaver_cpu::operator new(size_t size) |
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{ |
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void *p; |
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return p; |
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} |
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void operator delete(void *p) |
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void sheepshaver_cpu::operator delete(void *p) |
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{ |
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#if defined(HAVE_MEMALIGN) || defined(HAVE_VALLOC) |
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#if defined(__GLIBC__) |
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} |
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// Compile one instruction |
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#if PPC_ENABLE_JIT |
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int sheepshaver_cpu::compile1(codegen_context_t & cg_context) |
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{ |
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#if PPC_ENABLE_JIT |
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const instr_info_t *ii = cg_context.instr_info; |
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if (ii->mnemo != PPC_I(SHEEP)) |
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return COMPILE_FAILURE; |
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} |
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} |
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return status; |
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#endif |
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return COMPILE_FAILURE; |
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} |
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|
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// CPU context to preserve on interrupt |
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sheepshaver_cpu::interrupt_context::interrupt_context(sheepshaver_cpu *_cpu, const char *_where) |
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{ |
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#if SAFE_INTERRUPT_PPC >= 2 |
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cpu = _cpu; |
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where = _where; |
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|
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// Save interrupt context |
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memcpy(&gpr[0], &cpu->gpr(0), sizeof(gpr)); |
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pc = cpu->pc(); |
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lr = cpu->lr(); |
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ctr = cpu->ctr(); |
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cr = cpu->get_cr(); |
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xer = cpu->get_xer(); |
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#endif |
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} |
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|
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sheepshaver_cpu::interrupt_context::~interrupt_context() |
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{ |
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#if SAFE_INTERRUPT_PPC >= 2 |
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// Check whether CPU context was preserved by interrupt |
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if (memcmp(&gpr[0], &cpu->gpr(0), sizeof(gpr)) != 0) { |
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printf("FATAL: %s: interrupt clobbers registers\n", where); |
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for (int i = 0; i < 32; i++) |
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if (gpr[i] != cpu->gpr(i)) |
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printf(" r%d: %08x -> %08x\n", i, gpr[i], cpu->gpr(i)); |
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} |
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if (pc != cpu->pc()) |
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printf("FATAL: %s: interrupt clobbers PC\n", where); |
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if (lr != cpu->lr()) |
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printf("FATAL: %s: interrupt clobbers LR\n", where); |
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if (ctr != cpu->ctr()) |
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printf("FATAL: %s: interrupt clobbers CTR\n", where); |
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if (cr != cpu->get_cr()) |
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printf("FATAL: %s: interrupt clobbers CR\n", where); |
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if (xer != cpu->get_xer()) |
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printf("FATAL: %s: interrupt clobbers XER\n", where); |
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#endif |
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} |
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// Handle MacOS interrupt |
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void sheepshaver_cpu::interrupt(uint32 entry) |
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const clock_t interrupt_start = clock(); |
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#endif |
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|
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#if SAFE_INTERRUPT_PPC |
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static int depth = 0; |
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if (depth != 0) |
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printf("FATAL: sheepshaver_cpu::interrupt() called more than once: %d\n", depth); |
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depth++; |
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#endif |
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|
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// Save program counters and branch registers |
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uint32 saved_pc = pc(); |
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uint32 saved_lr = lr(); |
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#if EMUL_TIME_STATS |
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interrupt_time += (clock() - interrupt_start); |
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#endif |
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|
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#if SAFE_INTERRUPT_PPC |
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depth--; |
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#endif |
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} |
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|
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// Execute 68k routine |
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const uintptr addr = (uintptr)fault_address; |
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#if HAVE_SIGSEGV_SKIP_INSTRUCTION |
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// Ignore writes to ROM |
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if ((addr - ROM_BASE) < ROM_SIZE) |
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if ((addr - (uintptr)ROMBaseHost) < ROM_SIZE) |
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return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
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|
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// Get program counter of target CPU |
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|
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void init_emul_ppc(void) |
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{ |
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// Get pointer to KernelData in host address space |
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kernel_data = (KernelData *)Mac2HostAddr(KERNEL_DATA_BASE); |
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|
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// Initialize main CPU emulator |
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ppc_cpu = new sheepshaver_cpu(); |
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ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000)); |
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#endif |
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} |
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void sheepshaver_cpu::handle_interrupt(void) |
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void HandleInterrupt(powerpc_registers *r) |
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{ |
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#ifdef USE_SDL_VIDEO |
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// We must fill in the events queue in the same thread that did call SDL_SetVideoMode() |
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if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0) |
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return; |
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// Current interrupt nest level |
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static int interrupt_depth = 0; |
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++interrupt_depth; |
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// Increment interrupt counter |
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#if EMUL_TIME_STATS |
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interrupt_count++; |
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#endif |
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|
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// Disable MacOS stack sniffer |
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WriteMacInt32(0x110, 0); |
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|
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// Interrupt action depends on current run mode |
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switch (ReadMacInt32(XLM_RUN_MODE)) { |
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case MODE_68K: |
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// 68k emulator active, trigger 68k interrupt level 1 |
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WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1); |
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set_cr(get_cr() | tswap32(kernel_data->v[0x674 >> 2])); |
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r->cr.set(r->cr.get() | tswap32(kernel_data->v[0x674 >> 2])); |
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break; |
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#if INTERRUPTS_IN_NATIVE_MODE |
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case MODE_NATIVE: |
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// 68k emulator inactive, in nanokernel? |
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if (gpr(1) != KernelDataAddr && interrupt_depth == 1) { |
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interrupt_context ctx(this, "PowerPC mode"); |
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if (r->gpr[1] != KernelDataAddr) { |
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|
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// Prepare for 68k interrupt level 1 |
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WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1); |
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case MODE_EMUL_OP: |
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// 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0 |
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if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) { |
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interrupt_context ctx(this, "68k mode"); |
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#if EMUL_TIME_STATS |
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const clock_t interrupt_start = clock(); |
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#endif |
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M68kRegisters r; |
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uint32 old_r25 = ReadMacInt32(XLM_68K_R25); // Save interrupt level |
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WriteMacInt32(XLM_68K_R25, 0x21); // Execute with interrupt level 1 |
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static const uint8 proc[] = { |
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static const uint8 proc_template[] = { |
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0x3f, 0x3c, 0x00, 0x00, // move.w #$0000,-(sp) (fake format word) |
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0x48, 0x7a, 0x00, 0x0a, // pea @1(pc) (return address) |
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0x40, 0xe7, // move sr,-(sp) (saved SR) |
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0x4e, 0xd0, // jmp (a0) |
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M68K_RTS >> 8, M68K_RTS & 0xff // @1 |
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}; |
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Execute68k((uint32)proc, &r); |
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BUILD_SHEEPSHAVER_PROCEDURE(proc); |
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Execute68k(proc, &r); |
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WriteMacInt32(XLM_68K_R25, old_r25); // Restore interrupt level |
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#else |
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// Only update cursor |
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break; |
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#endif |
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} |
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|
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// We are done with this interrupt |
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--interrupt_depth; |
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} |
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|
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static void get_resource(void); |
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VideoVBL(); |
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break; |
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case NATIVE_VIDEO_DO_DRIVER_IO: |
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gpr(3) = (int32)(int16)VideoDoDriverIO((void *)gpr(3), (void *)gpr(4), |
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(void *)gpr(5), gpr(6), gpr(7)); |
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gpr(3) = (int32)(int16)VideoDoDriverIO(gpr(3), gpr(4), gpr(5), gpr(6), gpr(7)); |
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break; |
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#ifdef WORDS_BIGENDIAN |
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case NATIVE_ETHER_IRQ: |
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EtherIRQ(); |
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break; |
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case NATIVE_ETHER_RSRV: |
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gpr(3) = ether_rsrv((queue_t *)gpr(3)); |
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break; |
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#else |
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case NATIVE_ETHER_INIT: |
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// FIXME: needs more complicated thunks |
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gpr(3) = false; |
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break; |
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#endif |
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case NATIVE_SYNC_HOOK: |
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gpr(3) = NQD_sync_hook(gpr(3)); |
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break; |
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break; |
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} |
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case NATIVE_MAKE_EXECUTABLE: |
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MakeExecutable(0, (void *)gpr(4), gpr(5)); |
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MakeExecutable(0, gpr(4), gpr(5)); |
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break; |
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case NATIVE_CHECK_LOAD_INVOC: |
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check_load_invoc(gpr(3), gpr(4), gpr(5)); |