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root/cebix/SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.48 by gbeauche, 2004-06-26T15:26:18Z vs.
Revision 1.59 by gbeauche, 2005-03-05T18:33:30Z

#	Line 1 | Line 1
1		/*
2		*  sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface
3		*
4	<	*  SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig
4	>	*  SheepShaver (C) 1997-2005 Christian Bauer and Marc Hellwig
5		*
6		*  This program is free software; you can redistribute it and/or modify
7		*  it under the terms of the GNU General Public License as published by
#	Line 42 | Line 42
42
43		#include <stdio.h>
44		#include <stdlib.h>
45	+	#ifdef HAVE_MALLOC_H
46	+	#include <malloc.h>
47	+	#endif
48
49		#ifdef USE_SDL_VIDEO
50		#include <SDL_events.h>
#	Line 90 | Line 93 | extern "C" void check_load_invoc(uint32
93		// PowerPC EmulOp to exit from emulation looop
94		const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1;
95
93	–	// Enable interrupt routine safety checks?
94	–	#define SAFE_INTERRUPT_PPC 1
95	–
96		// Enable Execute68k() safety checks?
97		#define SAFE_EXEC_68K 1
98
#	Line 105 | Line 105 | const uint32 POWERPC_EXEC_RETURN = POWER
105		// Interrupts in native mode?
106		#define INTERRUPTS_IN_NATIVE_MODE 1
107
108	–	// Enable native EMUL_OPs to be run without a mode switch
109	–	#define ENABLE_NATIVE_EMUL_OP 1
110	–
108		// Pointer to Kernel Data
109	<	static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE;
109	>	static KernelData * kernel_data;
110
111		// SIGSEGV handler
112		sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
#	Line 142 | Line 139 | class sheepshaver_cpu
139		void init_decoder();
140		void execute_sheep(uint32 opcode);
141
145	–	// Filter out EMUL_OP routines that only call native code
146	–	bool filter_execute_emul_op(uint32 emul_op);
147	–
148	–	// "Native" EMUL_OP routines
149	–	void execute_emul_op_microseconds();
150	–	void execute_emul_op_idle_time_1();
151	–	void execute_emul_op_idle_time_2();
152	–
153	–	// CPU context to preserve on interrupt
154	–	class interrupt_context {
155	–	uint32 gpr[32];
156	–	uint32 pc;
157	–	uint32 lr;
158	–	uint32 ctr;
159	–	uint32 cr;
160	–	uint32 xer;
161	–	sheepshaver_cpu *cpu;
162	–	const char *where;
163	–	public:
164	–	interrupt_context(sheepshaver_cpu *_cpu, const char *_where);
165	–	~interrupt_context();
166	–	};
167	–
142		public:
143
144		// Constructor
#	Line 191 | Line 165 | public:
165		// Execute MacOS/PPC code
166		uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args);
167
168	+	#if PPC_ENABLE_JIT
169		// Compile one instruction
170		virtual int compile1(codegen_context_t & cg_context);
171	<
171	>	#endif
172		// Resource manager thunk
173		void get_resource(uint32 old_get_resource);
174
175		// Handle MacOS interrupt
176		void interrupt(uint32 entry);
202	–	void handle_interrupt();
177
178		// Make sure the SIGSEGV handler can access CPU registers
179		friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
180	+
181	+	// Memory allocator returning areas aligned on 16-byte boundaries
182	+	void *operator new(size_t size);
183	+	void operator delete(void *p);
184		};
185
186		// Memory allocator returning areas aligned on 16-byte boundaries
187	<	void *operator new(size_t size)
187	>	void *sheepshaver_cpu::operator new(size_t size)
188		{
189		void *p;
190
#	Line 225 | Line 203 | void *operator new(size_t size)
203		return p;
204		}
205
206	<	void operator delete(void *p)
206	>	void sheepshaver_cpu::operator delete(void *p)
207		{
208		#if defined(HAVE_MEMALIGN) || defined(HAVE_VALLOC)
209		#if defined(__GLIBC__)
#	Line 274 | Line 252 | typedef bit_field< 19, 19 > FN_field;
252		typedef bit_field< 20, 25 > NATIVE_OP_field;
253		typedef bit_field< 26, 31 > EMUL_OP_field;
254
277	–	// "Native" EMUL_OP routines
278	–	#define GPR_A(REG) gpr(16 + (REG))
279	–	#define GPR_D(REG) gpr( 8 + (REG))
280	–
281	–	void sheepshaver_cpu::execute_emul_op_microseconds()
282	–	{
283	–	Microseconds(GPR_A(0), GPR_D(0));
284	–	}
285	–
286	–	void sheepshaver_cpu::execute_emul_op_idle_time_1()
287	–	{
288	–	// Sleep if no events pending
289	–	if (ReadMacInt32(0x14c) == 0)
290	–	Delay_usec(16667);
291	–	GPR_A(0) = ReadMacInt32(0x2b6);
292	–	}
293	–
294	–	void sheepshaver_cpu::execute_emul_op_idle_time_2()
295	–	{
296	–	// Sleep if no events pending
297	–	if (ReadMacInt32(0x14c) == 0)
298	–	Delay_usec(16667);
299	–	GPR_D(0) = (uint32)-2;
300	–	}
301	–
302	–	// Filter out EMUL_OP routines that only call native code
303	–	bool sheepshaver_cpu::filter_execute_emul_op(uint32 emul_op)
304	–	{
305	–	switch (emul_op) {
306	–	case OP_MICROSECONDS:
307	–	execute_emul_op_microseconds();
308	–	return true;
309	–	case OP_IDLE_TIME:
310	–	execute_emul_op_idle_time_1();
311	–	return true;
312	–	case OP_IDLE_TIME_2:
313	–	execute_emul_op_idle_time_2();
314	–	return true;
315	–	}
316	–	return false;
317	–	}
318	–
255		// Execute EMUL_OP routine
256		void sheepshaver_cpu::execute_emul_op(uint32 emul_op)
257		{
322	–	#if ENABLE_NATIVE_EMUL_OP
323	–	// First, filter out EMUL_OPs that can be executed without a mode switch
324	–	if (filter_execute_emul_op(emul_op))
325	–	return;
326	–	#endif
327	–
258		M68kRegisters r68;
259		WriteMacInt32(XLM_68K_R25, gpr(25));
260		WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
#	Line 377 | Line 307 | void sheepshaver_cpu::execute_sheep(uint
307		}
308
309		// Compile one instruction
310	+	#if PPC_ENABLE_JIT
311		int sheepshaver_cpu::compile1(codegen_context_t & cg_context)
312		{
382	–	#if PPC_ENABLE_JIT
313		const instr_info_t *ii = cg_context.instr_info;
314		if (ii->mnemo != PPC_I(SHEEP))
315		return COMPILE_FAILURE;
#	Line 506 | Line 436 | int sheepshaver_cpu::compile1(codegen_co
436
437		default: {      // EMUL_OP
438		uint32 emul_op = EMUL_OP_field::extract(opcode) - 3;
509	–	#if ENABLE_NATIVE_EMUL_OP
510	–	typedef void (*emul_op_func_t)(dyngen_cpu_base);
511	–	emul_op_func_t emul_op_func = 0;
512	–	switch (emul_op) {
513	–	case OP_MICROSECONDS:
514	–	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_microseconds).ptr();
515	–	break;
516	–	case OP_IDLE_TIME:
517	–	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_1).ptr();
518	–	break;
519	–	case OP_IDLE_TIME_2:
520	–	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_2).ptr();
521	–	break;
522	–	}
523	–	if (emul_op_func) {
524	–	dg.gen_invoke_CPU(emul_op_func);
525	–	cg_context.done_compile = false;
526	–	status = COMPILE_CODE_OK;
527	–	break;
528	–	}
529	–	#endif
439		#if PPC_REENTRANT_JIT
440		// Try to execute EmulOp trampoline
441		dg.gen_set_PC_im(cg_context.pc + 4);
#	Line 546 | Line 455 | int sheepshaver_cpu::compile1(codegen_co
455		}
456		}
457		return status;
549	–	#endif
550	–	return COMPILE_FAILURE;
458		}
552	–
553	–	// CPU context to preserve on interrupt
554	–	sheepshaver_cpu::interrupt_context::interrupt_context(sheepshaver_cpu *_cpu, const char *_where)
555	–	{
556	–	#if SAFE_INTERRUPT_PPC >= 2
557	–	cpu = _cpu;
558	–	where = _where;
559	–
560	–	// Save interrupt context
561	–	memcpy(&gpr[0], &cpu->gpr(0), sizeof(gpr));
562	–	pc = cpu->pc();
563	–	lr = cpu->lr();
564	–	ctr = cpu->ctr();
565	–	cr = cpu->get_cr();
566	–	xer = cpu->get_xer();
567	–	#endif
568	–	}
569	–
570	–	sheepshaver_cpu::interrupt_context::~interrupt_context()
571	–	{
572	–	#if SAFE_INTERRUPT_PPC >= 2
573	–	// Check whether CPU context was preserved by interrupt
574	–	if (memcmp(&gpr[0], &cpu->gpr(0), sizeof(gpr)) != 0) {
575	–	printf("FATAL: %s: interrupt clobbers registers\n", where);
576	–	for (int i = 0; i < 32; i++)
577	–	if (gpr[i] != cpu->gpr(i))
578	–	printf(" r%d: %08x -> %08x\n", i, gpr[i], cpu->gpr(i));
579	–	}
580	–	if (pc != cpu->pc())
581	–	printf("FATAL: %s: interrupt clobbers PC\n", where);
582	–	if (lr != cpu->lr())
583	–	printf("FATAL: %s: interrupt clobbers LR\n", where);
584	–	if (ctr != cpu->ctr())
585	–	printf("FATAL: %s: interrupt clobbers CTR\n", where);
586	–	if (cr != cpu->get_cr())
587	–	printf("FATAL: %s: interrupt clobbers CR\n", where);
588	–	if (xer != cpu->get_xer())
589	–	printf("FATAL: %s: interrupt clobbers XER\n", where);
459		#endif
591	–	}
460
461		// Handle MacOS interrupt
462		void sheepshaver_cpu::interrupt(uint32 entry)
#	Line 598 | Line 466 | void sheepshaver_cpu::interrupt(uint32 e
466		const clock_t interrupt_start = clock();
467		#endif
468
601	–	#if SAFE_INTERRUPT_PPC
602	–	static int depth = 0;
603	–	if (depth != 0)
604	–	printf("FATAL: sheepshaver_cpu::interrupt() called more than once: %d\n", depth);
605	–	depth++;
606	–	#endif
607	–
469		// Save program counters and branch registers
470		uint32 saved_pc = pc();
471		uint32 saved_lr = lr();
#	Line 658 | Line 519 | void sheepshaver_cpu::interrupt(uint32 e
519		#if EMUL_TIME_STATS
520		interrupt_time += (clock() - interrupt_start);
521		#endif
661	–
662	–	#if SAFE_INTERRUPT_PPC
663	–	depth--;
664	–	#endif
522		}
523
524		// Execute 68k routine
#	Line 892 | Line 749 | sigsegv_return_t sigsegv_handler(sigsegv
749		const uintptr addr = (uintptr)fault_address;
750		#if HAVE_SIGSEGV_SKIP_INSTRUCTION
751		// Ignore writes to ROM
752	<	if ((addr - ROM_BASE) < ROM_SIZE)
752	>	if ((addr - (uintptr)ROMBaseHost) < ROM_SIZE)
753		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
754
755		// Get program counter of target CPU
#	Line 952 | Line 809 | sigsegv_return_t sigsegv_handler(sigsegv
809
810		void init_emul_ppc(void)
811		{
812	+	// Get pointer to KernelData in host address space
813	+	kernel_data = (KernelData *)Mac2HostAddr(KERNEL_DATA_BASE);
814	+
815		// Initialize main CPU emulator
816		ppc_cpu = new sheepshaver_cpu();
817		ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
#	Line 1058 | Line 918 | void TriggerInterrupt(void)
918		#endif
919		}
920
921	<	void sheepshaver_cpu::handle_interrupt(void)
921	>	void HandleInterrupt(powerpc_registers *r)
922		{
923		#ifdef USE_SDL_VIDEO
924		// We must fill in the events queue in the same thread that did call SDL_SetVideoMode()
#	Line 1069 | Line 929 | void sheepshaver_cpu::handle_interrupt(v
929		if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0)
930		return;
931
932	+	// Do nothing if there is no pending interrupt
933	+	if (InterruptFlags == 0)
934	+	return;
935	+
936		// Current interrupt nest level
937		static int interrupt_depth = 0;
938		++interrupt_depth;
#	Line 1076 | Line 940 | void sheepshaver_cpu::handle_interrupt(v
940		interrupt_count++;
941		#endif
942
1079	–	// Disable MacOS stack sniffer
1080	–	WriteMacInt32(0x110, 0);
1081	–
943		// Interrupt action depends on current run mode
944		switch (ReadMacInt32(XLM_RUN_MODE)) {
945		case MODE_68K:
946		// 68k emulator active, trigger 68k interrupt level 1
947		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
948	<	set_cr(get_cr() | tswap32(kernel_data->v[0x674 >> 2]));
948	>	r->cr.set(r->cr.get() | tswap32(kernel_data->v[0x674 >> 2]));
949		break;
950
951		#if INTERRUPTS_IN_NATIVE_MODE
952		case MODE_NATIVE:
953		// 68k emulator inactive, in nanokernel?
954	<	if (gpr(1) != KernelDataAddr && interrupt_depth == 1) {
1094	<	interrupt_context ctx(this, "PowerPC mode");
954	>	if (r->gpr[1] != KernelDataAddr && interrupt_depth == 1) {
955
956		// Prepare for 68k interrupt level 1
957		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
#	Line 1113 | Line 973 | void sheepshaver_cpu::handle_interrupt(v
973		case MODE_EMUL_OP:
974		// 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0
975		if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) {
1116	–	interrupt_context ctx(this, "68k mode");
976		#if EMUL_TIME_STATS
977		const clock_t interrupt_start = clock();
978		#endif
#	Line 1122 | Line 981 | void sheepshaver_cpu::handle_interrupt(v
981		M68kRegisters r;
982		uint32 old_r25 = ReadMacInt32(XLM_68K_R25);     // Save interrupt level
983		WriteMacInt32(XLM_68K_R25, 0x21);                       // Execute with interrupt level 1
984	<	static const uint8 proc[] = {
984	>	static const uint8 proc_template[] = {
985		0x3f, 0x3c, 0x00, 0x00,                 // move.w       #$0000,-(sp)    (fake format word)
986		0x48, 0x7a, 0x00, 0x0a,                 // pea          @1(pc)                  (return address)
987		0x40, 0xe7,                                             // move         sr,-(sp)                (saved SR)
#	Line 1130 | Line 989 | void sheepshaver_cpu::handle_interrupt(v
989		0x4e, 0xd0,                                             // jmp          (a0)
990		M68K_RTS >> 8, M68K_RTS & 0xff  // @1
991		};
992	<	Execute68k((uint32)proc, &r);
992	>	BUILD_SHEEPSHAVER_PROCEDURE(proc);
993	>	Execute68k(proc, &r);
994		WriteMacInt32(XLM_68K_R25, old_r25);            // Restore interrupt level
995		#else
996		// Only update cursor
#	Line 1179 | Line 1039 | void sheepshaver_cpu::execute_native_op(
1039		VideoVBL();
1040		break;
1041		case NATIVE_VIDEO_DO_DRIVER_IO:
1042	<	gpr(3) = (int32)(int16)VideoDoDriverIO((void *)gpr(3), (void *)gpr(4),
1183	<	(void *)gpr(5), gpr(6), gpr(7));
1042	>	gpr(3) = (int32)(int16)VideoDoDriverIO(gpr(3), gpr(4), gpr(5), gpr(6), gpr(7));
1043		break;
1185	–	#ifdef WORDS_BIGENDIAN
1044		case NATIVE_ETHER_IRQ:
1045		EtherIRQ();
1046		break;
#	Line 1204 | Line 1062 | void sheepshaver_cpu::execute_native_op(
1062		case NATIVE_ETHER_RSRV:
1063		gpr(3) = ether_rsrv((queue_t *)gpr(3));
1064		break;
1207	–	#else
1208	–	case NATIVE_ETHER_INIT:
1209	–	// FIXME: needs more complicated thunks
1210	–	gpr(3) = false;
1211	–	break;
1212	–	#endif
1065		case NATIVE_SYNC_HOOK:
1066		gpr(3) = NQD_sync_hook(gpr(3));
1067		break;
#	Line 1265 | Line 1117 | void sheepshaver_cpu::execute_native_op(
1117		break;
1118		}
1119		case NATIVE_MAKE_EXECUTABLE:
1120	<	MakeExecutable(0, (void *)gpr(4), gpr(5));
1120	>	MakeExecutable(0, gpr(4), gpr(5));
1121		break;
1122		case NATIVE_CHECK_LOAD_INVOC:
1123		check_load_invoc(gpr(3), gpr(4), gpr(5));

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