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#include <stdio.h> |
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#include <stdlib.h> |
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#ifdef HAVE_MALLOC_H |
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#include <malloc.h> |
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#endif |
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#ifdef USE_SDL_VIDEO |
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#include <SDL_events.h> |
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// Interrupts in native mode? |
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#define INTERRUPTS_IN_NATIVE_MODE 1 |
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|
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// Enable native EMUL_OPs to be run without a mode switch |
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#define ENABLE_NATIVE_EMUL_OP 1 |
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|
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// Pointer to Kernel Data |
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static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE; |
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static KernelData * kernel_data; |
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|
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// SIGSEGV handler |
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sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t); |
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void init_decoder(); |
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void execute_sheep(uint32 opcode); |
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|
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// Filter out EMUL_OP routines that only call native code |
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bool filter_execute_emul_op(uint32 emul_op); |
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|
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// "Native" EMUL_OP routines |
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void execute_emul_op_microseconds(); |
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void execute_emul_op_idle_time_1(); |
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void execute_emul_op_idle_time_2(); |
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|
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// CPU context to preserve on interrupt |
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class interrupt_context { |
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uint32 gpr[32]; |
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// Execute MacOS/PPC code |
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uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args); |
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#if PPC_ENABLE_JIT |
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// Compile one instruction |
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virtual int compile1(codegen_context_t & cg_context); |
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|
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#endif |
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// Resource manager thunk |
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void get_resource(uint32 old_get_resource); |
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// Make sure the SIGSEGV handler can access CPU registers |
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friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t); |
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|
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// Memory allocator returning areas aligned on 16-byte boundaries |
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void *operator new(size_t size); |
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void operator delete(void *p); |
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}; |
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// Memory allocator returning areas aligned on 16-byte boundaries |
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void *operator new(size_t size) |
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void *sheepshaver_cpu::operator new(size_t size) |
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{ |
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void *p; |
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return p; |
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} |
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void operator delete(void *p) |
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void sheepshaver_cpu::operator delete(void *p) |
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{ |
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#if defined(HAVE_MEMALIGN) || defined(HAVE_VALLOC) |
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#if defined(__GLIBC__) |
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typedef bit_field< 20, 25 > NATIVE_OP_field; |
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typedef bit_field< 26, 31 > EMUL_OP_field; |
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|
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// "Native" EMUL_OP routines |
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#define GPR_A(REG) gpr(16 + (REG)) |
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#define GPR_D(REG) gpr( 8 + (REG)) |
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|
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void sheepshaver_cpu::execute_emul_op_microseconds() |
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{ |
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Microseconds(GPR_A(0), GPR_D(0)); |
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} |
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|
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void sheepshaver_cpu::execute_emul_op_idle_time_1() |
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{ |
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// Sleep if no events pending |
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if (ReadMacInt32(0x14c) == 0) |
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Delay_usec(16667); |
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GPR_A(0) = ReadMacInt32(0x2b6); |
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} |
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|
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void sheepshaver_cpu::execute_emul_op_idle_time_2() |
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{ |
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// Sleep if no events pending |
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if (ReadMacInt32(0x14c) == 0) |
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Delay_usec(16667); |
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GPR_D(0) = (uint32)-2; |
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} |
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|
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// Filter out EMUL_OP routines that only call native code |
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bool sheepshaver_cpu::filter_execute_emul_op(uint32 emul_op) |
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{ |
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switch (emul_op) { |
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case OP_MICROSECONDS: |
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execute_emul_op_microseconds(); |
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return true; |
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case OP_IDLE_TIME: |
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execute_emul_op_idle_time_1(); |
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return true; |
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case OP_IDLE_TIME_2: |
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execute_emul_op_idle_time_2(); |
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return true; |
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} |
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return false; |
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} |
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|
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// Execute EMUL_OP routine |
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void sheepshaver_cpu::execute_emul_op(uint32 emul_op) |
276 |
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{ |
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#if ENABLE_NATIVE_EMUL_OP |
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// First, filter out EMUL_OPs that can be executed without a mode switch |
324 |
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if (filter_execute_emul_op(emul_op)) |
325 |
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return; |
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#endif |
327 |
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|
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M68kRegisters r68; |
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WriteMacInt32(XLM_68K_R25, gpr(25)); |
279 |
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WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP); |
326 |
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} |
327 |
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|
328 |
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// Compile one instruction |
329 |
+ |
#if PPC_ENABLE_JIT |
330 |
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int sheepshaver_cpu::compile1(codegen_context_t & cg_context) |
331 |
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{ |
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#if PPC_ENABLE_JIT |
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const instr_info_t *ii = cg_context.instr_info; |
333 |
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if (ii->mnemo != PPC_I(SHEEP)) |
334 |
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return COMPILE_FAILURE; |
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|
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default: { // EMUL_OP |
457 |
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uint32 emul_op = EMUL_OP_field::extract(opcode) - 3; |
509 |
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#if ENABLE_NATIVE_EMUL_OP |
510 |
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typedef void (*emul_op_func_t)(dyngen_cpu_base); |
511 |
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emul_op_func_t emul_op_func = 0; |
512 |
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switch (emul_op) { |
513 |
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case OP_MICROSECONDS: |
514 |
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emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_microseconds).ptr(); |
515 |
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break; |
516 |
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case OP_IDLE_TIME: |
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emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_1).ptr(); |
518 |
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break; |
519 |
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case OP_IDLE_TIME_2: |
520 |
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emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_2).ptr(); |
521 |
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break; |
522 |
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} |
523 |
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if (emul_op_func) { |
524 |
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dg.gen_invoke_CPU(emul_op_func); |
525 |
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cg_context.done_compile = false; |
526 |
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status = COMPILE_CODE_OK; |
527 |
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break; |
528 |
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} |
529 |
– |
#endif |
458 |
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#if PPC_REENTRANT_JIT |
459 |
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// Try to execute EmulOp trampoline |
460 |
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dg.gen_set_PC_im(cg_context.pc + 4); |
474 |
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} |
475 |
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} |
476 |
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return status; |
549 |
– |
#endif |
550 |
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return COMPILE_FAILURE; |
477 |
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} |
478 |
+ |
#endif |
479 |
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|
480 |
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// CPU context to preserve on interrupt |
481 |
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sheepshaver_cpu::interrupt_context::interrupt_context(sheepshaver_cpu *_cpu, const char *_where) |
819 |
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const uintptr addr = (uintptr)fault_address; |
820 |
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#if HAVE_SIGSEGV_SKIP_INSTRUCTION |
821 |
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// Ignore writes to ROM |
822 |
< |
if ((addr - ROM_BASE) < ROM_SIZE) |
822 |
> |
if ((addr - (uintptr)ROMBaseHost) < ROM_SIZE) |
823 |
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return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
824 |
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|
825 |
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// Get program counter of target CPU |
879 |
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|
880 |
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void init_emul_ppc(void) |
881 |
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{ |
882 |
+ |
// Get pointer to KernelData in host address space |
883 |
+ |
kernel_data = (KernelData *)Mac2HostAddr(KERNEL_DATA_BASE); |
884 |
+ |
|
885 |
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// Initialize main CPU emulator |
886 |
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ppc_cpu = new sheepshaver_cpu(); |
887 |
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ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000)); |
1052 |
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M68kRegisters r; |
1053 |
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uint32 old_r25 = ReadMacInt32(XLM_68K_R25); // Save interrupt level |
1054 |
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WriteMacInt32(XLM_68K_R25, 0x21); // Execute with interrupt level 1 |
1055 |
< |
static const uint8 proc[] = { |
1055 |
> |
static const uint8 proc_template[] = { |
1056 |
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0x3f, 0x3c, 0x00, 0x00, // move.w #$0000,-(sp) (fake format word) |
1057 |
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0x48, 0x7a, 0x00, 0x0a, // pea @1(pc) (return address) |
1058 |
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0x40, 0xe7, // move sr,-(sp) (saved SR) |
1060 |
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0x4e, 0xd0, // jmp (a0) |
1061 |
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M68K_RTS >> 8, M68K_RTS & 0xff // @1 |
1062 |
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}; |
1063 |
< |
Execute68k((uint32)proc, &r); |
1063 |
> |
BUILD_SHEEPSHAVER_PROCEDURE(proc); |
1064 |
> |
Execute68k(proc, &r); |
1065 |
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WriteMacInt32(XLM_68K_R25, old_r25); // Restore interrupt level |
1066 |
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#else |
1067 |
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// Only update cursor |
1110 |
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VideoVBL(); |
1111 |
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break; |
1112 |
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case NATIVE_VIDEO_DO_DRIVER_IO: |
1113 |
< |
gpr(3) = (int32)(int16)VideoDoDriverIO((void *)gpr(3), (void *)gpr(4), |
1183 |
< |
(void *)gpr(5), gpr(6), gpr(7)); |
1113 |
> |
gpr(3) = (int32)(int16)VideoDoDriverIO(gpr(3), gpr(4), gpr(5), gpr(6), gpr(7)); |
1114 |
|
break; |
1185 |
– |
#ifdef WORDS_BIGENDIAN |
1115 |
|
case NATIVE_ETHER_IRQ: |
1116 |
|
EtherIRQ(); |
1117 |
|
break; |
1133 |
|
case NATIVE_ETHER_RSRV: |
1134 |
|
gpr(3) = ether_rsrv((queue_t *)gpr(3)); |
1135 |
|
break; |
1207 |
– |
#else |
1208 |
– |
case NATIVE_ETHER_INIT: |
1209 |
– |
// FIXME: needs more complicated thunks |
1210 |
– |
gpr(3) = false; |
1211 |
– |
break; |
1212 |
– |
#endif |
1136 |
|
case NATIVE_SYNC_HOOK: |
1137 |
|
gpr(3) = NQD_sync_hook(gpr(3)); |
1138 |
|
break; |
1188 |
|
break; |
1189 |
|
} |
1190 |
|
case NATIVE_MAKE_EXECUTABLE: |
1191 |
< |
MakeExecutable(0, (void *)gpr(4), gpr(5)); |
1191 |
> |
MakeExecutable(0, gpr(4), gpr(5)); |
1192 |
|
break; |
1193 |
|
case NATIVE_CHECK_LOAD_INVOC: |
1194 |
|
check_load_invoc(gpr(3), gpr(4), gpr(5)); |