43 |
|
#include <stdio.h> |
44 |
|
#include <stdlib.h> |
45 |
|
|
46 |
+ |
#ifdef USE_SDL_VIDEO |
47 |
+ |
#include <SDL_events.h> |
48 |
+ |
#endif |
49 |
+ |
|
50 |
|
#if ENABLE_MON |
51 |
|
#include "mon.h" |
52 |
|
#include "mon_disass.h" |
56 |
|
#include "debug.h" |
57 |
|
|
58 |
|
// Emulation time statistics |
59 |
< |
#define EMUL_TIME_STATS 1 |
59 |
> |
#ifndef EMUL_TIME_STATS |
60 |
> |
#define EMUL_TIME_STATS 0 |
61 |
> |
#endif |
62 |
|
|
63 |
|
#if EMUL_TIME_STATS |
64 |
|
static clock_t emul_start_time; |
65 |
< |
static uint32 interrupt_count = 0; |
65 |
> |
static uint32 interrupt_count = 0, ppc_interrupt_count = 0; |
66 |
|
static clock_t interrupt_time = 0; |
67 |
|
static uint32 exec68k_count = 0; |
68 |
|
static clock_t exec68k_time = 0; |
90 |
|
// PowerPC EmulOp to exit from emulation looop |
91 |
|
const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1; |
92 |
|
|
87 |
– |
// Enable multicore (main/interrupts) cpu emulation? |
88 |
– |
#define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0) |
89 |
– |
|
93 |
|
// Enable interrupt routine safety checks? |
94 |
|
#define SAFE_INTERRUPT_PPC 1 |
95 |
|
|
112 |
|
static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE; |
113 |
|
|
114 |
|
// SIGSEGV handler |
115 |
< |
static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t); |
115 |
> |
sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t); |
116 |
|
|
117 |
|
#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT |
118 |
|
// Special trampolines for EmulOp and NativeOp |
150 |
|
void execute_emul_op_idle_time_1(); |
151 |
|
void execute_emul_op_idle_time_2(); |
152 |
|
|
153 |
+ |
// CPU context to preserve on interrupt |
154 |
+ |
class interrupt_context { |
155 |
+ |
uint32 gpr[32]; |
156 |
+ |
uint32 pc; |
157 |
+ |
uint32 lr; |
158 |
+ |
uint32 ctr; |
159 |
+ |
uint32 cr; |
160 |
+ |
uint32 xer; |
161 |
+ |
sheepshaver_cpu *cpu; |
162 |
+ |
const char *where; |
163 |
+ |
public: |
164 |
+ |
interrupt_context(sheepshaver_cpu *_cpu, const char *_where); |
165 |
+ |
~interrupt_context(); |
166 |
+ |
}; |
167 |
+ |
|
168 |
|
public: |
169 |
|
|
170 |
|
// Constructor |
450 |
|
status = COMPILE_CODE_OK; |
451 |
|
break; |
452 |
|
#endif |
435 |
– |
case NATIVE_DISABLE_INTERRUPT: |
436 |
– |
dg.gen_invoke(DisableInterrupt); |
437 |
– |
status = COMPILE_CODE_OK; |
438 |
– |
break; |
439 |
– |
case NATIVE_ENABLE_INTERRUPT: |
440 |
– |
dg.gen_invoke(EnableInterrupt); |
441 |
– |
status = COMPILE_CODE_OK; |
442 |
– |
break; |
453 |
|
case NATIVE_BITBLT: |
454 |
|
dg.gen_load_T0_GPR(3); |
455 |
|
dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt); |
467 |
|
break; |
468 |
|
} |
469 |
|
// Could we fully translate this NativeOp? |
470 |
< |
if (FN_field::test(opcode)) { |
471 |
< |
if (status != COMPILE_FAILURE) { |
470 |
> |
if (status == COMPILE_CODE_OK) { |
471 |
> |
if (!FN_field::test(opcode)) |
472 |
> |
cg_context.done_compile = false; |
473 |
> |
else { |
474 |
|
dg.gen_load_A0_LR(); |
475 |
|
dg.gen_set_PC_A0(); |
476 |
+ |
cg_context.done_compile = true; |
477 |
|
} |
465 |
– |
cg_context.done_compile = true; |
466 |
– |
break; |
467 |
– |
} |
468 |
– |
else if (status != COMPILE_FAILURE) { |
469 |
– |
cg_context.done_compile = false; |
478 |
|
break; |
479 |
|
} |
480 |
|
#if PPC_REENTRANT_JIT |
481 |
|
// Try to execute NativeOp trampoline |
482 |
< |
dg.gen_set_PC_im(cg_context.pc + 4); |
482 |
> |
if (!FN_field::test(opcode)) |
483 |
> |
dg.gen_set_PC_im(cg_context.pc + 4); |
484 |
> |
else { |
485 |
> |
dg.gen_load_A0_LR(); |
486 |
> |
dg.gen_set_PC_A0(); |
487 |
> |
} |
488 |
|
dg.gen_mov_32_T0_im(selector); |
489 |
|
dg.gen_jmp(native_op_trampoline); |
490 |
|
cg_context.done_compile = true; |
492 |
|
break; |
493 |
|
#endif |
494 |
|
// Invoke NativeOp handler |
495 |
< |
typedef void (*func_t)(dyngen_cpu_base, uint32); |
496 |
< |
func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr(); |
497 |
< |
dg.gen_invoke_CPU_im(func, selector); |
498 |
< |
cg_context.done_compile = false; |
499 |
< |
status = COMPILE_CODE_OK; |
495 |
> |
if (!FN_field::test(opcode)) { |
496 |
> |
typedef void (*func_t)(dyngen_cpu_base, uint32); |
497 |
> |
func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr(); |
498 |
> |
dg.gen_invoke_CPU_im(func, selector); |
499 |
> |
cg_context.done_compile = false; |
500 |
> |
status = COMPILE_CODE_OK; |
501 |
> |
} |
502 |
> |
// Otherwise, let it generate a call to execute_sheep() which |
503 |
> |
// will cause necessary updates to the program counter |
504 |
|
break; |
505 |
|
} |
506 |
|
|
550 |
|
return COMPILE_FAILURE; |
551 |
|
} |
552 |
|
|
553 |
+ |
// CPU context to preserve on interrupt |
554 |
+ |
sheepshaver_cpu::interrupt_context::interrupt_context(sheepshaver_cpu *_cpu, const char *_where) |
555 |
+ |
{ |
556 |
+ |
#if SAFE_INTERRUPT_PPC >= 2 |
557 |
+ |
cpu = _cpu; |
558 |
+ |
where = _where; |
559 |
+ |
|
560 |
+ |
// Save interrupt context |
561 |
+ |
memcpy(&gpr[0], &cpu->gpr(0), sizeof(gpr)); |
562 |
+ |
pc = cpu->pc(); |
563 |
+ |
lr = cpu->lr(); |
564 |
+ |
ctr = cpu->ctr(); |
565 |
+ |
cr = cpu->get_cr(); |
566 |
+ |
xer = cpu->get_xer(); |
567 |
+ |
#endif |
568 |
+ |
} |
569 |
+ |
|
570 |
+ |
sheepshaver_cpu::interrupt_context::~interrupt_context() |
571 |
+ |
{ |
572 |
+ |
#if SAFE_INTERRUPT_PPC >= 2 |
573 |
+ |
// Check whether CPU context was preserved by interrupt |
574 |
+ |
if (memcmp(&gpr[0], &cpu->gpr(0), sizeof(gpr)) != 0) { |
575 |
+ |
printf("FATAL: %s: interrupt clobbers registers\n", where); |
576 |
+ |
for (int i = 0; i < 32; i++) |
577 |
+ |
if (gpr[i] != cpu->gpr(i)) |
578 |
+ |
printf(" r%d: %08x -> %08x\n", i, gpr[i], cpu->gpr(i)); |
579 |
+ |
} |
580 |
+ |
if (pc != cpu->pc()) |
581 |
+ |
printf("FATAL: %s: interrupt clobbers PC\n", where); |
582 |
+ |
if (lr != cpu->lr()) |
583 |
+ |
printf("FATAL: %s: interrupt clobbers LR\n", where); |
584 |
+ |
if (ctr != cpu->ctr()) |
585 |
+ |
printf("FATAL: %s: interrupt clobbers CTR\n", where); |
586 |
+ |
if (cr != cpu->get_cr()) |
587 |
+ |
printf("FATAL: %s: interrupt clobbers CR\n", where); |
588 |
+ |
if (xer != cpu->get_xer()) |
589 |
+ |
printf("FATAL: %s: interrupt clobbers XER\n", where); |
590 |
+ |
#endif |
591 |
+ |
} |
592 |
+ |
|
593 |
|
// Handle MacOS interrupt |
594 |
|
void sheepshaver_cpu::interrupt(uint32 entry) |
595 |
|
{ |
596 |
|
#if EMUL_TIME_STATS |
597 |
< |
interrupt_count++; |
597 |
> |
ppc_interrupt_count++; |
598 |
|
const clock_t interrupt_start = clock(); |
599 |
|
#endif |
600 |
|
|
604 |
|
printf("FATAL: sheepshaver_cpu::interrupt() called more than once: %d\n", depth); |
605 |
|
depth++; |
606 |
|
#endif |
550 |
– |
#if SAFE_INTERRUPT_PPC >= 2 |
551 |
– |
uint32 saved_regs[32]; |
552 |
– |
memcpy(&saved_regs[0], &gpr(0), sizeof(saved_regs)); |
553 |
– |
#endif |
607 |
|
|
555 |
– |
#if !MULTICORE_CPU |
608 |
|
// Save program counters and branch registers |
609 |
|
uint32 saved_pc = pc(); |
610 |
|
uint32 saved_lr = lr(); |
611 |
|
uint32 saved_ctr= ctr(); |
612 |
|
uint32 saved_sp = gpr(1); |
561 |
– |
#endif |
613 |
|
|
614 |
|
// Initialize stack pointer to SheepShaver alternate stack base |
615 |
|
gpr(1) = SignalStackBase() - 64; |
649 |
|
// Enter nanokernel |
650 |
|
execute(entry); |
651 |
|
|
601 |
– |
#if !MULTICORE_CPU |
652 |
|
// Restore program counters and branch registers |
653 |
|
pc() = saved_pc; |
654 |
|
lr() = saved_lr; |
655 |
|
ctr()= saved_ctr; |
656 |
|
gpr(1) = saved_sp; |
607 |
– |
#endif |
657 |
|
|
658 |
|
#if EMUL_TIME_STATS |
659 |
|
interrupt_time += (clock() - interrupt_start); |
660 |
|
#endif |
661 |
|
|
613 |
– |
#if SAFE_INTERRUPT_PPC >= 2 |
614 |
– |
if (memcmp(&saved_regs[0], &gpr(0), sizeof(saved_regs)) != 0) |
615 |
– |
printf("FATAL: dirty PowerPC registers\n"); |
616 |
– |
#endif |
662 |
|
#if SAFE_INTERRUPT_PPC |
663 |
|
depth--; |
664 |
|
#endif |
855 |
|
* SheepShaver CPU engine interface |
856 |
|
**/ |
857 |
|
|
858 |
< |
static sheepshaver_cpu *main_cpu = NULL; // CPU emulator to handle usual control flow |
859 |
< |
static sheepshaver_cpu *interrupt_cpu = NULL; // CPU emulator to handle interrupts |
815 |
< |
static sheepshaver_cpu *current_cpu = NULL; // Current CPU emulator context |
858 |
> |
// PowerPC CPU emulator |
859 |
> |
static sheepshaver_cpu *ppc_cpu = NULL; |
860 |
|
|
861 |
|
void FlushCodeCache(uintptr start, uintptr end) |
862 |
|
{ |
863 |
|
D(bug("FlushCodeCache(%08x, %08x)\n", start, end)); |
864 |
< |
main_cpu->invalidate_cache_range(start, end); |
821 |
< |
#if MULTICORE_CPU |
822 |
< |
interrupt_cpu->invalidate_cache_range(start, end); |
823 |
< |
#endif |
824 |
< |
} |
825 |
< |
|
826 |
< |
static inline void cpu_push(sheepshaver_cpu *new_cpu) |
827 |
< |
{ |
828 |
< |
#if MULTICORE_CPU |
829 |
< |
current_cpu = new_cpu; |
830 |
< |
#endif |
831 |
< |
} |
832 |
< |
|
833 |
< |
static inline void cpu_pop() |
834 |
< |
{ |
835 |
< |
#if MULTICORE_CPU |
836 |
< |
current_cpu = main_cpu; |
837 |
< |
#endif |
864 |
> |
ppc_cpu->invalidate_cache_range(start, end); |
865 |
|
} |
866 |
|
|
867 |
|
// Dump PPC registers |
868 |
|
static void dump_registers(void) |
869 |
|
{ |
870 |
< |
current_cpu->dump_registers(); |
870 |
> |
ppc_cpu->dump_registers(); |
871 |
|
} |
872 |
|
|
873 |
|
// Dump log |
874 |
|
static void dump_log(void) |
875 |
|
{ |
876 |
< |
current_cpu->dump_log(); |
876 |
> |
ppc_cpu->dump_log(); |
877 |
|
} |
878 |
|
|
879 |
|
/* |
880 |
|
* Initialize CPU emulation |
881 |
|
*/ |
882 |
|
|
883 |
< |
static sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction) |
883 |
> |
sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction) |
884 |
|
{ |
885 |
|
#if ENABLE_VOSF |
886 |
|
// Handle screen fault |
896 |
|
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
897 |
|
|
898 |
|
// Get program counter of target CPU |
899 |
< |
sheepshaver_cpu * const cpu = current_cpu; |
899 |
> |
sheepshaver_cpu * const cpu = ppc_cpu; |
900 |
|
const uint32 pc = cpu->pc(); |
901 |
|
|
902 |
|
// Fault in Mac ROM or RAM? |
903 |
< |
bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize)); |
903 |
> |
bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize)) || (pc >= DR_CACHE_BASE && pc < (DR_CACHE_BASE + DR_CACHE_SIZE)); |
904 |
|
if (mac_fault) { |
905 |
|
|
906 |
|
// "VM settings" during MacOS 8 installation |
920 |
|
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
921 |
|
else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000)) |
922 |
|
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
923 |
+ |
|
924 |
+ |
// MacOS 8.6 serial drivers on startup (with DR Cache and OldWorld ROM) |
925 |
+ |
else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(16) == 0xf3012002 || cpu->gpr(16) == 0xf3012000)) |
926 |
+ |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
927 |
+ |
else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000)) |
928 |
+ |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
929 |
|
|
930 |
|
// Ignore writes to the zero page |
931 |
|
else if ((uint32)(addr - SheepMem::ZeroPage()) < (uint32)SheepMem::PageSize()) |
942 |
|
printf("SIGSEGV\n"); |
943 |
|
printf(" pc %p\n", fault_instruction); |
944 |
|
printf(" ea %p\n", fault_address); |
912 |
– |
printf(" cpu %s\n", current_cpu == main_cpu ? "main" : "interrupts"); |
945 |
|
dump_registers(); |
946 |
< |
current_cpu->dump_log(); |
946 |
> |
ppc_cpu->dump_log(); |
947 |
|
enter_mon(); |
948 |
|
QuitEmulator(); |
949 |
|
|
953 |
|
void init_emul_ppc(void) |
954 |
|
{ |
955 |
|
// Initialize main CPU emulator |
956 |
< |
main_cpu = new sheepshaver_cpu(); |
957 |
< |
main_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000)); |
958 |
< |
main_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000)); |
956 |
> |
ppc_cpu = new sheepshaver_cpu(); |
957 |
> |
ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000)); |
958 |
> |
ppc_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000)); |
959 |
|
WriteMacInt32(XLM_RUN_MODE, MODE_68K); |
960 |
|
|
929 |
– |
#if MULTICORE_CPU |
930 |
– |
// Initialize alternate CPU emulator to handle interrupts |
931 |
– |
interrupt_cpu = new sheepshaver_cpu(); |
932 |
– |
#endif |
933 |
– |
|
934 |
– |
// Install the handler for SIGSEGV |
935 |
– |
sigsegv_install_handler(sigsegv_handler); |
936 |
– |
|
961 |
|
#if ENABLE_MON |
962 |
|
// Install "regs" command in cxmon |
963 |
|
mon_add_command("regs", dump_registers, "regs Dump PowerPC registers\n"); |
983 |
|
printf("Total emulation time : %.1f sec\n", double(emul_time) / double(CLOCKS_PER_SEC)); |
984 |
|
printf("Total interrupt count: %d (%2.1f Hz)\n", interrupt_count, |
985 |
|
(double(interrupt_count) * CLOCKS_PER_SEC) / double(emul_time)); |
986 |
+ |
printf("Total ppc interrupt count: %d (%2.1f %%)\n", ppc_interrupt_count, |
987 |
+ |
(double(ppc_interrupt_count) * 100.0) / double(interrupt_count)); |
988 |
|
|
989 |
|
#define PRINT_STATS(LABEL, VAR_PREFIX) do { \ |
990 |
|
printf("Total " LABEL " count : %d\n", VAR_PREFIX##_count); \ |
1001 |
|
printf("\n"); |
1002 |
|
#endif |
1003 |
|
|
1004 |
< |
delete main_cpu; |
979 |
< |
#if MULTICORE_CPU |
980 |
< |
delete interrupt_cpu; |
981 |
< |
#endif |
1004 |
> |
delete ppc_cpu; |
1005 |
|
} |
1006 |
|
|
1007 |
|
#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT |
1036 |
|
|
1037 |
|
void emul_ppc(uint32 entry) |
1038 |
|
{ |
1016 |
– |
current_cpu = main_cpu; |
1039 |
|
#if 0 |
1040 |
< |
current_cpu->start_log(); |
1040 |
> |
ppc_cpu->start_log(); |
1041 |
|
#endif |
1042 |
|
// start emulation loop and enable code translation or caching |
1043 |
< |
current_cpu->execute(entry); |
1043 |
> |
ppc_cpu->execute(entry); |
1044 |
|
} |
1045 |
|
|
1046 |
|
/* |
1047 |
|
* Handle PowerPC interrupt |
1048 |
|
*/ |
1049 |
|
|
1028 |
– |
#if ASYNC_IRQ |
1029 |
– |
void HandleInterrupt(void) |
1030 |
– |
{ |
1031 |
– |
main_cpu->handle_interrupt(); |
1032 |
– |
} |
1033 |
– |
#else |
1050 |
|
void TriggerInterrupt(void) |
1051 |
|
{ |
1052 |
|
#if 0 |
1053 |
|
WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1); |
1054 |
|
#else |
1055 |
|
// Trigger interrupt to main cpu only |
1056 |
< |
if (main_cpu) |
1057 |
< |
main_cpu->trigger_interrupt(); |
1056 |
> |
if (ppc_cpu) |
1057 |
> |
ppc_cpu->trigger_interrupt(); |
1058 |
|
#endif |
1059 |
|
} |
1044 |
– |
#endif |
1060 |
|
|
1061 |
|
void sheepshaver_cpu::handle_interrupt(void) |
1062 |
|
{ |
1063 |
+ |
#ifdef USE_SDL_VIDEO |
1064 |
+ |
// We must fill in the events queue in the same thread that did call SDL_SetVideoMode() |
1065 |
+ |
SDL_PumpEvents(); |
1066 |
+ |
#endif |
1067 |
+ |
|
1068 |
|
// Do nothing if interrupts are disabled |
1069 |
< |
if (*(int32 *)XLM_IRQ_NEST > 0) |
1069 |
> |
if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0) |
1070 |
|
return; |
1071 |
|
|
1072 |
< |
// Do nothing if there is no interrupt pending |
1073 |
< |
if (InterruptFlags == 0) |
1074 |
< |
return; |
1072 |
> |
// Current interrupt nest level |
1073 |
> |
static int interrupt_depth = 0; |
1074 |
> |
++interrupt_depth; |
1075 |
> |
#if EMUL_TIME_STATS |
1076 |
> |
interrupt_count++; |
1077 |
> |
#endif |
1078 |
|
|
1079 |
|
// Disable MacOS stack sniffer |
1080 |
|
WriteMacInt32(0x110, 0); |
1083 |
|
switch (ReadMacInt32(XLM_RUN_MODE)) { |
1084 |
|
case MODE_68K: |
1085 |
|
// 68k emulator active, trigger 68k interrupt level 1 |
1063 |
– |
assert(current_cpu == main_cpu); |
1086 |
|
WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1); |
1087 |
|
set_cr(get_cr() | tswap32(kernel_data->v[0x674 >> 2])); |
1088 |
|
break; |
1090 |
|
#if INTERRUPTS_IN_NATIVE_MODE |
1091 |
|
case MODE_NATIVE: |
1092 |
|
// 68k emulator inactive, in nanokernel? |
1093 |
< |
assert(current_cpu == main_cpu); |
1094 |
< |
if (gpr(1) != KernelDataAddr) { |
1093 |
> |
if (gpr(1) != KernelDataAddr && interrupt_depth == 1) { |
1094 |
> |
interrupt_context ctx(this, "PowerPC mode"); |
1095 |
> |
|
1096 |
|
// Prepare for 68k interrupt level 1 |
1097 |
|
WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1); |
1098 |
|
WriteMacInt32(tswap32(kernel_data->v[0x658 >> 2]) + 0xdc, |
1101 |
|
|
1102 |
|
// Execute nanokernel interrupt routine (this will activate the 68k emulator) |
1103 |
|
DisableInterrupt(); |
1081 |
– |
cpu_push(interrupt_cpu); |
1104 |
|
if (ROMType == ROMTYPE_NEWWORLD) |
1105 |
< |
current_cpu->interrupt(ROM_BASE + 0x312b1c); |
1105 |
> |
ppc_cpu->interrupt(ROM_BASE + 0x312b1c); |
1106 |
|
else |
1107 |
< |
current_cpu->interrupt(ROM_BASE + 0x312a3c); |
1086 |
< |
cpu_pop(); |
1107 |
> |
ppc_cpu->interrupt(ROM_BASE + 0x312a3c); |
1108 |
|
} |
1109 |
|
break; |
1110 |
|
#endif |
1113 |
|
case MODE_EMUL_OP: |
1114 |
|
// 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0 |
1115 |
|
if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) { |
1116 |
+ |
interrupt_context ctx(this, "68k mode"); |
1117 |
+ |
#if EMUL_TIME_STATS |
1118 |
+ |
const clock_t interrupt_start = clock(); |
1119 |
+ |
#endif |
1120 |
|
#if 1 |
1121 |
|
// Execute full 68k interrupt routine |
1122 |
|
M68kRegisters r; |
1142 |
|
} |
1143 |
|
} |
1144 |
|
#endif |
1145 |
+ |
#if EMUL_TIME_STATS |
1146 |
+ |
interrupt_time += (clock() - interrupt_start); |
1147 |
+ |
#endif |
1148 |
|
} |
1149 |
|
break; |
1150 |
|
#endif |
1151 |
|
} |
1152 |
+ |
|
1153 |
+ |
// We are done with this interrupt |
1154 |
+ |
--interrupt_depth; |
1155 |
|
} |
1156 |
|
|
1157 |
|
static void get_resource(void); |
1264 |
|
get_resource_callbacks[selector - NATIVE_GET_RESOURCE](); |
1265 |
|
break; |
1266 |
|
} |
1236 |
– |
case NATIVE_DISABLE_INTERRUPT: |
1237 |
– |
DisableInterrupt(); |
1238 |
– |
break; |
1239 |
– |
case NATIVE_ENABLE_INTERRUPT: |
1240 |
– |
EnableInterrupt(); |
1241 |
– |
break; |
1267 |
|
case NATIVE_MAKE_EXECUTABLE: |
1268 |
|
MakeExecutable(0, (void *)gpr(4), gpr(5)); |
1269 |
|
break; |
1289 |
|
|
1290 |
|
void Execute68k(uint32 pc, M68kRegisters *r) |
1291 |
|
{ |
1292 |
< |
current_cpu->execute_68k(pc, r); |
1292 |
> |
ppc_cpu->execute_68k(pc, r); |
1293 |
|
} |
1294 |
|
|
1295 |
|
/* |
1312 |
|
|
1313 |
|
uint32 call_macos(uint32 tvect) |
1314 |
|
{ |
1315 |
< |
return current_cpu->execute_macos_code(tvect, 0, NULL); |
1315 |
> |
return ppc_cpu->execute_macos_code(tvect, 0, NULL); |
1316 |
|
} |
1317 |
|
|
1318 |
|
uint32 call_macos1(uint32 tvect, uint32 arg1) |
1319 |
|
{ |
1320 |
|
const uint32 args[] = { arg1 }; |
1321 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1321 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1322 |
|
} |
1323 |
|
|
1324 |
|
uint32 call_macos2(uint32 tvect, uint32 arg1, uint32 arg2) |
1325 |
|
{ |
1326 |
|
const uint32 args[] = { arg1, arg2 }; |
1327 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1327 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1328 |
|
} |
1329 |
|
|
1330 |
|
uint32 call_macos3(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3) |
1331 |
|
{ |
1332 |
|
const uint32 args[] = { arg1, arg2, arg3 }; |
1333 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1333 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1334 |
|
} |
1335 |
|
|
1336 |
|
uint32 call_macos4(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4) |
1337 |
|
{ |
1338 |
|
const uint32 args[] = { arg1, arg2, arg3, arg4 }; |
1339 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1339 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1340 |
|
} |
1341 |
|
|
1342 |
|
uint32 call_macos5(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5) |
1343 |
|
{ |
1344 |
|
const uint32 args[] = { arg1, arg2, arg3, arg4, arg5 }; |
1345 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1345 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1346 |
|
} |
1347 |
|
|
1348 |
|
uint32 call_macos6(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6) |
1349 |
|
{ |
1350 |
|
const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6 }; |
1351 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1351 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1352 |
|
} |
1353 |
|
|
1354 |
|
uint32 call_macos7(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6, uint32 arg7) |
1355 |
|
{ |
1356 |
|
const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6, arg7 }; |
1357 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1357 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1358 |
|
} |
1359 |
|
|
1360 |
|
/* |
1363 |
|
|
1364 |
|
void get_resource(void) |
1365 |
|
{ |
1366 |
< |
current_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE)); |
1366 |
> |
ppc_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE)); |
1367 |
|
} |
1368 |
|
|
1369 |
|
void get_1_resource(void) |
1370 |
|
{ |
1371 |
< |
current_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE)); |
1371 |
> |
ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE)); |
1372 |
|
} |
1373 |
|
|
1374 |
|
void get_ind_resource(void) |
1375 |
|
{ |
1376 |
< |
current_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE)); |
1376 |
> |
ppc_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE)); |
1377 |
|
} |
1378 |
|
|
1379 |
|
void get_1_ind_resource(void) |
1380 |
|
{ |
1381 |
< |
current_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE)); |
1381 |
> |
ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE)); |
1382 |
|
} |
1383 |
|
|
1384 |
|
void r_get_resource(void) |
1385 |
|
{ |
1386 |
< |
current_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE)); |
1386 |
> |
ppc_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE)); |
1387 |
|
} |