ViewVC Help

View File | Revision Log | Show Annotations | Revision Graph | Root Listing

root/cebix/SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.45 by gbeauche, 2004-06-22T14:18:35Z vs.
Revision 1.74 by gbeauche, 2007-12-30T09:18:40Z

#	Line 1 | Line 1
1		/*
2		*  sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface
3		*
4	<	*  SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig
4	>	*  SheepShaver (C) 1997-2005 Christian Bauer and Marc Hellwig
5		*
6		*  This program is free software; you can redistribute it and/or modify
7		*  it under the terms of the GNU General Public License as published by
#	Line 42 | Line 42
42
43		#include <stdio.h>
44		#include <stdlib.h>
45	+	#ifdef HAVE_MALLOC_H
46	+	#include <malloc.h>
47	+	#endif
48	+
49	+	#ifdef USE_SDL_VIDEO
50	+	#include <SDL_events.h>
51	+	#endif
52
53		#if ENABLE_MON
54		#include "mon.h"
#	Line 82 | Line 89 | extern uintptr SignalStackBase();
89
90		// From rsrc_patches.cpp
91		extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
92	+	extern "C" void named_check_load_invoc(uint32 type, uint32 name, uint32 h);
93
94		// PowerPC EmulOp to exit from emulation looop
95		const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1;
96
89	–	// Enable interrupt routine safety checks?
90	–	#define SAFE_INTERRUPT_PPC 1
91	–
97		// Enable Execute68k() safety checks?
98		#define SAFE_EXEC_68K 1
99
#	Line 101 | Line 106 | const uint32 POWERPC_EXEC_RETURN = POWER
106		// Interrupts in native mode?
107		#define INTERRUPTS_IN_NATIVE_MODE 1
108
104	–	// Enable native EMUL_OPs to be run without a mode switch
105	–	#define ENABLE_NATIVE_EMUL_OP 1
106	–
109		// Pointer to Kernel Data
110	<	static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE;
110	>	static KernelData * kernel_data;
111
112		// SIGSEGV handler
113	<	static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
113	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
114
115		#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
116		// Special trampolines for EmulOp and NativeOp
#	Line 116 | Line 118 | static uint8 *emul_op_trampoline;
118		static uint8 *native_op_trampoline;
119		#endif
120
119	–	// JIT Compiler enabled?
120	–	static inline bool enable_jit_p()
121	–	{
122	–	return PrefsFindBool("jit");
123	–	}
124	–
121
122		/**
123		*              PowerPC emulator glue with special 'sheep' opcodes
#	Line 138 | Line 134 | class sheepshaver_cpu
134		void init_decoder();
135		void execute_sheep(uint32 opcode);
136
141	–	// Filter out EMUL_OP routines that only call native code
142	–	bool filter_execute_emul_op(uint32 emul_op);
143	–
144	–	// "Native" EMUL_OP routines
145	–	void execute_emul_op_microseconds();
146	–	void execute_emul_op_idle_time_1();
147	–	void execute_emul_op_idle_time_2();
148	–
149	–	// CPU context to preserve on interrupt
150	–	class interrupt_context {
151	–	uint32 gpr[32];
152	–	uint32 pc;
153	–	uint32 lr;
154	–	uint32 ctr;
155	–	uint32 cr;
156	–	uint32 xer;
157	–	sheepshaver_cpu *cpu;
158	–	const char *where;
159	–	public:
160	–	interrupt_context(sheepshaver_cpu *_cpu, const char *_where);
161	–	~interrupt_context();
162	–	};
163	–
137		public:
138
139		// Constructor
#	Line 187 | Line 160 | public:
160		// Execute MacOS/PPC code
161		uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args);
162
163	+	#if PPC_ENABLE_JIT
164		// Compile one instruction
165		virtual int compile1(codegen_context_t & cg_context);
166	<
166	>	#endif
167		// Resource manager thunk
168		void get_resource(uint32 old_get_resource);
169
170		// Handle MacOS interrupt
171		void interrupt(uint32 entry);
198	–	void handle_interrupt();
172
173		// Make sure the SIGSEGV handler can access CPU registers
174	<	friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
174	>	friend sigsegv_return_t sigsegv_handler(sigsegv_info_t *sip);
175		};
176
204	–	// Memory allocator returning areas aligned on 16-byte boundaries
205	–	void *operator new(size_t size)
206	–	{
207	–	void *p;
208	–
209	–	#if defined(HAVE_POSIX_MEMALIGN)
210	–	if (posix_memalign(&p, 16, size) != 0)
211	–	throw std::bad_alloc();
212	–	#elif defined(HAVE_MEMALIGN)
213	–	p = memalign(16, size);
214	–	#elif defined(HAVE_VALLOC)
215	–	p = valloc(size); // page-aligned!
216	–	#else
217	–	/* XXX: handle padding ourselves */
218	–	p = malloc(size);
219	–	#endif
220	–
221	–	return p;
222	–	}
223	–
224	–	void operator delete(void *p)
225	–	{
226	–	#if defined(HAVE_MEMALIGN) || defined(HAVE_VALLOC)
227	–	#if defined(__GLIBC__)
228	–	// this is known to work only with GNU libc
229	–	free(p);
230	–	#endif
231	–	#else
232	–	free(p);
233	–	#endif
234	–	}
235	–
177		sheepshaver_cpu::sheepshaver_cpu()
237	–	: powerpc_cpu(enable_jit_p())
178		{
179		init_decoder();
180	+
181	+	#if PPC_ENABLE_JIT
182	+	if (PrefsFindBool("jit"))
183	+	enable_jit();
184	+	#endif
185		}
186
187		void sheepshaver_cpu::init_decoder()
#	Line 244 | Line 189 | void sheepshaver_cpu::init_decoder()
189		static const instr_info_t sheep_ii_table[] = {
190		{ "sheep",
191		(execute_pmf)&sheepshaver_cpu::execute_sheep,
247	–	NULL,
192		PPC_I(SHEEP),
193		D_form, 6, 0, CFLOW_JUMP | CFLOW_TRAP
194		}
#	Line 270 | Line 214 | typedef bit_field< 19, 19 > FN_field;
214		typedef bit_field< 20, 25 > NATIVE_OP_field;
215		typedef bit_field< 26, 31 > EMUL_OP_field;
216
273	–	// "Native" EMUL_OP routines
274	–	#define GPR_A(REG) gpr(16 + (REG))
275	–	#define GPR_D(REG) gpr( 8 + (REG))
276	–
277	–	void sheepshaver_cpu::execute_emul_op_microseconds()
278	–	{
279	–	Microseconds(GPR_A(0), GPR_D(0));
280	–	}
281	–
282	–	void sheepshaver_cpu::execute_emul_op_idle_time_1()
283	–	{
284	–	// Sleep if no events pending
285	–	if (ReadMacInt32(0x14c) == 0)
286	–	Delay_usec(16667);
287	–	GPR_A(0) = ReadMacInt32(0x2b6);
288	–	}
289	–
290	–	void sheepshaver_cpu::execute_emul_op_idle_time_2()
291	–	{
292	–	// Sleep if no events pending
293	–	if (ReadMacInt32(0x14c) == 0)
294	–	Delay_usec(16667);
295	–	GPR_D(0) = (uint32)-2;
296	–	}
297	–
298	–	// Filter out EMUL_OP routines that only call native code
299	–	bool sheepshaver_cpu::filter_execute_emul_op(uint32 emul_op)
300	–	{
301	–	switch (emul_op) {
302	–	case OP_MICROSECONDS:
303	–	execute_emul_op_microseconds();
304	–	return true;
305	–	case OP_IDLE_TIME:
306	–	execute_emul_op_idle_time_1();
307	–	return true;
308	–	case OP_IDLE_TIME_2:
309	–	execute_emul_op_idle_time_2();
310	–	return true;
311	–	}
312	–	return false;
313	–	}
314	–
217		// Execute EMUL_OP routine
218		void sheepshaver_cpu::execute_emul_op(uint32 emul_op)
219		{
318	–	#if ENABLE_NATIVE_EMUL_OP
319	–	// First, filter out EMUL_OPs that can be executed without a mode switch
320	–	if (filter_execute_emul_op(emul_op))
321	–	return;
322	–	#endif
323	–
220		M68kRegisters r68;
221		WriteMacInt32(XLM_68K_R25, gpr(25));
222		WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
#	Line 329 | Line 225 | void sheepshaver_cpu::execute_emul_op(ui
225		for (int i = 0; i < 7; i++)
226		r68.a[i] = gpr(16 + i);
227		r68.a[7] = gpr(1);
228	<	uint32 saved_cr = get_cr() & CR_field<2>::mask();
228	>	uint32 saved_cr = get_cr() & 0xff9fffff; // mask_operand::compute(11, 8)
229		uint32 saved_xer = get_xer();
230		EmulOp(&r68, gpr(24), emul_op);
231		set_cr(saved_cr);
#	Line 373 | Line 269 | void sheepshaver_cpu::execute_sheep(uint
269		}
270
271		// Compile one instruction
272	+	#if PPC_ENABLE_JIT
273		int sheepshaver_cpu::compile1(codegen_context_t & cg_context)
274		{
378	–	#if PPC_ENABLE_JIT
275		const instr_info_t *ii = cg_context.instr_info;
276		if (ii->mnemo != PPC_I(SHEEP))
277		return COMPILE_FAILURE;
#	Line 437 | Line 333 | int sheepshaver_cpu::compile1(codegen_co
333		status = COMPILE_CODE_OK;
334		break;
335		}
336	+	#endif
337		case NATIVE_CHECK_LOAD_INVOC:
338		dg.gen_load_T0_GPR(3);
339		dg.gen_load_T1_GPR(4);
#	Line 445 | Line 342 | int sheepshaver_cpu::compile1(codegen_co
342		dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))check_load_invoc);
343		status = COMPILE_CODE_OK;
344		break;
345	<	#endif
346	<	case NATIVE_DISABLE_INTERRUPT:
347	<	dg.gen_invoke(DisableInterrupt);
345	>	case NATIVE_NAMED_CHECK_LOAD_INVOC:
346	>	dg.gen_load_T0_GPR(3);
347	>	dg.gen_load_T1_GPR(4);
348	>	dg.gen_load_T2_GPR(5);
349	>	dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))named_check_load_invoc);
350	>	status = COMPILE_CODE_OK;
351	>	break;
352	>	case NATIVE_NQD_SYNC_HOOK:
353	>	dg.gen_load_T0_GPR(3);
354	>	dg.gen_invoke_T0_ret_T0((uint32 (*)(uint32))NQD_sync_hook);
355	>	dg.gen_store_T0_GPR(3);
356	>	status = COMPILE_CODE_OK;
357	>	break;
358	>	case NATIVE_NQD_BITBLT_HOOK:
359	>	dg.gen_load_T0_GPR(3);
360	>	dg.gen_invoke_T0_ret_T0((uint32 (*)(uint32))NQD_bitblt_hook);
361	>	dg.gen_store_T0_GPR(3);
362		status = COMPILE_CODE_OK;
363		break;
364	<	case NATIVE_ENABLE_INTERRUPT:
365	<	dg.gen_invoke(EnableInterrupt);
364	>	case NATIVE_NQD_FILLRECT_HOOK:
365	>	dg.gen_load_T0_GPR(3);
366	>	dg.gen_invoke_T0_ret_T0((uint32 (*)(uint32))NQD_fillrect_hook);
367	>	dg.gen_store_T0_GPR(3);
368	>	status = COMPILE_CODE_OK;
369	>	break;
370	>	case NATIVE_NQD_UNKNOWN_HOOK:
371	>	dg.gen_load_T0_GPR(3);
372	>	dg.gen_invoke_T0_ret_T0((uint32 (*)(uint32))NQD_unknown_hook);
373	>	dg.gen_store_T0_GPR(3);
374		status = COMPILE_CODE_OK;
375		break;
376	<	case NATIVE_BITBLT:
376	>	case NATIVE_NQD_BITBLT:
377		dg.gen_load_T0_GPR(3);
378		dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt);
379		status = COMPILE_CODE_OK;
380		break;
381	<	case NATIVE_INVRECT:
381	>	case NATIVE_NQD_INVRECT:
382		dg.gen_load_T0_GPR(3);
383		dg.gen_invoke_T0((void (*)(uint32))NQD_invrect);
384		status = COMPILE_CODE_OK;
385		break;
386	<	case NATIVE_FILLRECT:
386	>	case NATIVE_NQD_FILLRECT:
387		dg.gen_load_T0_GPR(3);
388		dg.gen_invoke_T0((void (*)(uint32))NQD_fillrect);
389		status = COMPILE_CODE_OK;
#	Line 475 | Line 394 | int sheepshaver_cpu::compile1(codegen_co
394		if (!FN_field::test(opcode))
395		cg_context.done_compile = false;
396		else {
397	<	dg.gen_load_A0_LR();
398	<	dg.gen_set_PC_A0();
397	>	dg.gen_load_T0_LR_aligned();
398	>	dg.gen_set_PC_T0();
399		cg_context.done_compile = true;
400		}
401		break;
#	Line 486 | Line 405 | int sheepshaver_cpu::compile1(codegen_co
405		if (!FN_field::test(opcode))
406		dg.gen_set_PC_im(cg_context.pc + 4);
407		else {
408	<	dg.gen_load_A0_LR();
409	<	dg.gen_set_PC_A0();
408	>	dg.gen_load_T0_LR_aligned();
409	>	dg.gen_set_PC_T0();
410		}
411		dg.gen_mov_32_T0_im(selector);
412		dg.gen_jmp(native_op_trampoline);
#	Line 510 | Line 429 | int sheepshaver_cpu::compile1(codegen_co
429
430		default: {      // EMUL_OP
431		uint32 emul_op = EMUL_OP_field::extract(opcode) - 3;
513	–	#if ENABLE_NATIVE_EMUL_OP
514	–	typedef void (*emul_op_func_t)(dyngen_cpu_base);
515	–	emul_op_func_t emul_op_func = 0;
516	–	switch (emul_op) {
517	–	case OP_MICROSECONDS:
518	–	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_microseconds).ptr();
519	–	break;
520	–	case OP_IDLE_TIME:
521	–	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_1).ptr();
522	–	break;
523	–	case OP_IDLE_TIME_2:
524	–	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_2).ptr();
525	–	break;
526	–	}
527	–	if (emul_op_func) {
528	–	dg.gen_invoke_CPU(emul_op_func);
529	–	cg_context.done_compile = false;
530	–	status = COMPILE_CODE_OK;
531	–	break;
532	–	}
533	–	#endif
432		#if PPC_REENTRANT_JIT
433		// Try to execute EmulOp trampoline
434		dg.gen_set_PC_im(cg_context.pc + 4);
#	Line 550 | Line 448 | int sheepshaver_cpu::compile1(codegen_co
448		}
449		}
450		return status;
553	–	#endif
554	–	return COMPILE_FAILURE;
555	–	}
556	–
557	–	// CPU context to preserve on interrupt
558	–	sheepshaver_cpu::interrupt_context::interrupt_context(sheepshaver_cpu *_cpu, const char *_where)
559	–	{
560	–	#if SAFE_INTERRUPT_PPC >= 2
561	–	cpu = _cpu;
562	–	where = _where;
563	–
564	–	// Save interrupt context
565	–	memcpy(&gpr[0], &cpu->gpr(0), sizeof(gpr));
566	–	pc = cpu->pc();
567	–	lr = cpu->lr();
568	–	ctr = cpu->ctr();
569	–	cr = cpu->get_cr();
570	–	xer = cpu->get_xer();
571	–	#endif
451		}
573	–
574	–	sheepshaver_cpu::interrupt_context::~interrupt_context()
575	–	{
576	–	#if SAFE_INTERRUPT_PPC >= 2
577	–	// Check whether CPU context was preserved by interrupt
578	–	if (memcmp(&gpr[0], &cpu->gpr(0), sizeof(gpr)) != 0) {
579	–	printf("FATAL: %s: interrupt clobbers registers\n", where);
580	–	for (int i = 0; i < 32; i++)
581	–	if (gpr[i] != cpu->gpr(i))
582	–	printf(" r%d: %08x -> %08x\n", i, gpr[i], cpu->gpr(i));
583	–	}
584	–	if (pc != cpu->pc())
585	–	printf("FATAL: %s: interrupt clobbers PC\n", where);
586	–	if (lr != cpu->lr())
587	–	printf("FATAL: %s: interrupt clobbers LR\n", where);
588	–	if (ctr != cpu->ctr())
589	–	printf("FATAL: %s: interrupt clobbers CTR\n", where);
590	–	if (cr != cpu->get_cr())
591	–	printf("FATAL: %s: interrupt clobbers CR\n", where);
592	–	if (xer != cpu->get_xer())
593	–	printf("FATAL: %s: interrupt clobbers XER\n", where);
452		#endif
595	–	}
453
454		// Handle MacOS interrupt
455		void sheepshaver_cpu::interrupt(uint32 entry)
#	Line 602 | Line 459 | void sheepshaver_cpu::interrupt(uint32 e
459		const clock_t interrupt_start = clock();
460		#endif
461
605	–	#if SAFE_INTERRUPT_PPC
606	–	static int depth = 0;
607	–	if (depth != 0)
608	–	printf("FATAL: sheepshaver_cpu::interrupt() called more than once: %d\n", depth);
609	–	depth++;
610	–	#endif
611	–
462		// Save program counters and branch registers
463		uint32 saved_pc = pc();
464		uint32 saved_lr = lr();
#	Line 662 | Line 512 | void sheepshaver_cpu::interrupt(uint32 e
512		#if EMUL_TIME_STATS
513		interrupt_time += (clock() - interrupt_start);
514		#endif
665	–
666	–	#if SAFE_INTERRUPT_PPC
667	–	depth--;
668	–	#endif
515		}
516
517		// Execute 68k routine
#	Line 884 | Line 730 | static void dump_log(void)
730		*  Initialize CPU emulation
731		*/
732
733	<	static sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
733	>	sigsegv_return_t sigsegv_handler(sigsegv_info_t *sip)
734		{
735		#if ENABLE_VOSF
736		// Handle screen fault
737	<	extern bool Screen_fault_handler(sigsegv_address_t, sigsegv_address_t);
738	<	if (Screen_fault_handler(fault_address, fault_instruction))
737	>	extern bool Screen_fault_handler(sigsegv_info_t *sip);
738	>	if (Screen_fault_handler(sip))
739		return SIGSEGV_RETURN_SUCCESS;
740		#endif
741
742	<	const uintptr addr = (uintptr)fault_address;
742	>	const uintptr addr = (uintptr)sigsegv_get_fault_address(sip);
743		#if HAVE_SIGSEGV_SKIP_INSTRUCTION
744		// Ignore writes to ROM
745	<	if ((addr - ROM_BASE) < ROM_SIZE)
745	>	if ((addr - (uintptr)ROMBaseHost) < ROM_SIZE)
746		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
747
748		// Get program counter of target CPU
#	Line 943 | Line 789 | static sigsegv_return_t sigsegv_handler(
789		#error "FIXME: You don't have the capability to skip instruction within signal handlers"
790		#endif
791
792	<	printf("SIGSEGV\n");
793	<	printf("  pc %p\n", fault_instruction);
794	<	printf("  ea %p\n", fault_address);
792	>	fprintf(stderr, "SIGSEGV\n");
793	>	fprintf(stderr, "  pc %p\n", sigsegv_get_fault_instruction_address(sip));
794	>	fprintf(stderr, "  ea %p\n", sigsegv_get_fault_address(sip));
795		dump_registers();
796		ppc_cpu->dump_log();
797		enter_mon();
#	Line 956 | Line 802 | static sigsegv_return_t sigsegv_handler(
802
803		void init_emul_ppc(void)
804		{
805	+	// Get pointer to KernelData in host address space
806	+	kernel_data = (KernelData *)Mac2HostAddr(KERNEL_DATA_BASE);
807	+
808		// Initialize main CPU emulator
809		ppc_cpu = new sheepshaver_cpu();
810		ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
811		ppc_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
812		WriteMacInt32(XLM_RUN_MODE, MODE_68K);
813
965	–	// Install the handler for SIGSEGV
966	–	sigsegv_install_handler(sigsegv_handler);
967	–
814		#if ENABLE_MON
815		// Install "regs" command in cxmon
816		mon_add_command("regs", dump_registers, "regs                     Dump PowerPC registers\n");
#	Line 1009 | Line 855 | void exit_emul_ppc(void)
855		#endif
856
857		delete ppc_cpu;
858	+	ppc_cpu = NULL;
859		}
860
861		#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
#	Line 1056 | Line 903 | void emul_ppc(uint32 entry)
903
904		void TriggerInterrupt(void)
905		{
906	+	idle_resume();
907		#if 0
908		WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1);
909		#else
#	Line 1065 | Line 913 | void TriggerInterrupt(void)
913		#endif
914		}
915
916	<	void sheepshaver_cpu::handle_interrupt(void)
916	>	void HandleInterrupt(powerpc_registers *r)
917		{
918	+	#ifdef USE_SDL_VIDEO
919	+	// We must fill in the events queue in the same thread that did call SDL_SetVideoMode()
920	+	SDL_PumpEvents();
921	+	#endif
922	+
923		// Do nothing if interrupts are disabled
924	<	if (*(int32 *)XLM_IRQ_NEST > 0)
924	>	if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0)
925		return;
926
927	<	// Current interrupt nest level
1075	<	static int interrupt_depth = 0;
1076	<	++interrupt_depth;
927	>	// Update interrupt count
928		#if EMUL_TIME_STATS
929		interrupt_count++;
930		#endif
931
1081	–	// Disable MacOS stack sniffer
1082	–	WriteMacInt32(0x110, 0);
1083	–
932		// Interrupt action depends on current run mode
933		switch (ReadMacInt32(XLM_RUN_MODE)) {
934		case MODE_68K:
935		// 68k emulator active, trigger 68k interrupt level 1
936		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
937	<	set_cr(get_cr() | tswap32(kernel_data->v[0x674 >> 2]));
937	>	r->cr.set(r->cr.get() | tswap32(kernel_data->v[0x674 >> 2]));
938		break;
939
940		#if INTERRUPTS_IN_NATIVE_MODE
941		case MODE_NATIVE:
942		// 68k emulator inactive, in nanokernel?
943	<	if (gpr(1) != KernelDataAddr && interrupt_depth == 1) {
1096	<	interrupt_context ctx(this, "PowerPC mode");
943	>	if (r->gpr[1] != KernelDataAddr) {
944
945		// Prepare for 68k interrupt level 1
946		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
#	Line 1115 | Line 962 | void sheepshaver_cpu::handle_interrupt(v
962		case MODE_EMUL_OP:
963		// 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0
964		if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) {
1118	–	interrupt_context ctx(this, "68k mode");
965		#if EMUL_TIME_STATS
966		const clock_t interrupt_start = clock();
967		#endif
#	Line 1124 | Line 970 | void sheepshaver_cpu::handle_interrupt(v
970		M68kRegisters r;
971		uint32 old_r25 = ReadMacInt32(XLM_68K_R25);     // Save interrupt level
972		WriteMacInt32(XLM_68K_R25, 0x21);                       // Execute with interrupt level 1
973	<	static const uint8 proc[] = {
973	>	static const uint8 proc_template[] = {
974		0x3f, 0x3c, 0x00, 0x00,                 // move.w       #$0000,-(sp)    (fake format word)
975		0x48, 0x7a, 0x00, 0x0a,                 // pea          @1(pc)                  (return address)
976		0x40, 0xe7,                                             // move         sr,-(sp)                (saved SR)
#	Line 1132 | Line 978 | void sheepshaver_cpu::handle_interrupt(v
978		0x4e, 0xd0,                                             // jmp          (a0)
979		M68K_RTS >> 8, M68K_RTS & 0xff  // @1
980		};
981	<	Execute68k((uint32)proc, &r);
981	>	BUILD_SHEEPSHAVER_PROCEDURE(proc);
982	>	Execute68k(proc, &r);
983		WriteMacInt32(XLM_68K_R25, old_r25);            // Restore interrupt level
984		#else
985		// Only update cursor
#	Line 1151 | Line 998 | void sheepshaver_cpu::handle_interrupt(v
998		break;
999		#endif
1000		}
1154	–
1155	–	// We are done with this interrupt
1156	–	--interrupt_depth;
1001		}
1002
1159	–	static void get_resource(void);
1160	–	static void get_1_resource(void);
1161	–	static void get_ind_resource(void);
1162	–	static void get_1_ind_resource(void);
1163	–	static void r_get_resource(void);
1164	–
1003		// Execute NATIVE_OP routine
1004		void sheepshaver_cpu::execute_native_op(uint32 selector)
1005		{
#	Line 1181 | Line 1019 | void sheepshaver_cpu::execute_native_op(
1019		VideoVBL();
1020		break;
1021		case NATIVE_VIDEO_DO_DRIVER_IO:
1022	<	gpr(3) = (int32)(int16)VideoDoDriverIO((void *)gpr(3), (void *)gpr(4),
1023	<	(void *)gpr(5), gpr(6), gpr(7));
1022	>	gpr(3) = (int32)(int16)VideoDoDriverIO(gpr(3), gpr(4), gpr(5), gpr(6), gpr(7));
1023	>	break;
1024	>	case NATIVE_ETHER_AO_GET_HWADDR:
1025	>	AO_get_ethernet_address(gpr(3));
1026	>	break;
1027	>	case NATIVE_ETHER_AO_ADD_MULTI:
1028	>	AO_enable_multicast(gpr(3));
1029	>	break;
1030	>	case NATIVE_ETHER_AO_DEL_MULTI:
1031	>	AO_disable_multicast(gpr(3));
1032	>	break;
1033	>	case NATIVE_ETHER_AO_SEND_PACKET:
1034	>	AO_transmit_packet(gpr(3));
1035		break;
1187	–	#ifdef WORDS_BIGENDIAN
1036		case NATIVE_ETHER_IRQ:
1037		EtherIRQ();
1038		break;
#	Line 1206 | Line 1054 | void sheepshaver_cpu::execute_native_op(
1054		case NATIVE_ETHER_RSRV:
1055		gpr(3) = ether_rsrv((queue_t *)gpr(3));
1056		break;
1057	<	#else
1210	<	case NATIVE_ETHER_INIT:
1211	<	// FIXME: needs more complicated thunks
1212	<	gpr(3) = false;
1213	<	break;
1214	<	#endif
1215	<	case NATIVE_SYNC_HOOK:
1057	>	case NATIVE_NQD_SYNC_HOOK:
1058		gpr(3) = NQD_sync_hook(gpr(3));
1059		break;
1060	<	case NATIVE_BITBLT_HOOK:
1060	>	case NATIVE_NQD_UNKNOWN_HOOK:
1061	>	gpr(3) = NQD_unknown_hook(gpr(3));
1062	>	break;
1063	>	case NATIVE_NQD_BITBLT_HOOK:
1064		gpr(3) = NQD_bitblt_hook(gpr(3));
1065		break;
1066	<	case NATIVE_BITBLT:
1066	>	case NATIVE_NQD_BITBLT:
1067		NQD_bitblt(gpr(3));
1068		break;
1069	<	case NATIVE_FILLRECT_HOOK:
1069	>	case NATIVE_NQD_FILLRECT_HOOK:
1070		gpr(3) = NQD_fillrect_hook(gpr(3));
1071		break;
1072	<	case NATIVE_INVRECT:
1072	>	case NATIVE_NQD_INVRECT:
1073		NQD_invrect(gpr(3));
1074		break;
1075	<	case NATIVE_FILLRECT:
1075	>	case NATIVE_NQD_FILLRECT:
1076		NQD_fillrect(gpr(3));
1077		break;
1078		case NATIVE_SERIAL_NOTHING:
#	Line 1251 | Line 1096 | void sheepshaver_cpu::execute_native_op(
1096		break;
1097		}
1098		case NATIVE_GET_RESOURCE:
1099	+	get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1100	+	break;
1101		case NATIVE_GET_1_RESOURCE:
1102	+	get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1103	+	break;
1104		case NATIVE_GET_IND_RESOURCE:
1105	<	case NATIVE_GET_1_IND_RESOURCE:
1257	<	case NATIVE_R_GET_RESOURCE: {
1258	<	typedef void (*GetResourceCallback)(void);
1259	<	static const GetResourceCallback get_resource_callbacks[] = {
1260	<	::get_resource,
1261	<	::get_1_resource,
1262	<	::get_ind_resource,
1263	<	::get_1_ind_resource,
1264	<	::r_get_resource
1265	<	};
1266	<	get_resource_callbacks[selector - NATIVE_GET_RESOURCE]();
1105	>	get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1106		break;
1107	<	}
1108	<	case NATIVE_DISABLE_INTERRUPT:
1270	<	DisableInterrupt();
1107	>	case NATIVE_GET_1_IND_RESOURCE:
1108	>	get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1109		break;
1110	<	case NATIVE_ENABLE_INTERRUPT:
1111	<	EnableInterrupt();
1110	>	case NATIVE_R_GET_RESOURCE:
1111	>	get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1112		break;
1113		case NATIVE_MAKE_EXECUTABLE:
1114	<	MakeExecutable(0, (void *)gpr(4), gpr(5));
1114	>	MakeExecutable(0, gpr(4), gpr(5));
1115		break;
1116		case NATIVE_CHECK_LOAD_INVOC:
1117		check_load_invoc(gpr(3), gpr(4), gpr(5));
1118		break;
1119	+	case NATIVE_NAMED_CHECK_LOAD_INVOC:
1120	+	named_check_load_invoc(gpr(3), gpr(4), gpr(5));
1121	+	break;
1122		default:
1123		printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector);
1124		QuitEmulator();
#	Line 1364 | Line 1205 | uint32 call_macos7(uint32 tvect, uint32
1205		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6, arg7 };
1206		return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1207		}
1367	–
1368	–	/*
1369	–	*  Resource Manager thunks
1370	–	*/
1371	–
1372	–	void get_resource(void)
1373	–	{
1374	–	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1375	–	}
1376	–
1377	–	void get_1_resource(void)
1378	–	{
1379	–	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1380	–	}
1381	–
1382	–	void get_ind_resource(void)
1383	–	{
1384	–	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1385	–	}
1386	–
1387	–	void get_1_ind_resource(void)
1388	–	{
1389	–	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1390	–	}
1391	–
1392	–	void r_get_resource(void)
1393	–	{
1394	–	ppc_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1395	–	}

Diff Legend

–	Removed lines
+	Added lines
<	Changed lines
>	Changed lines