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root/cebix/SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.45 by gbeauche, 2004-06-22T14:18:35Z vs.
Revision 1.68 by gbeauche, 2006-05-03T21:45:14Z

#	Line 1 | Line 1
1		/*
2		*  sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface
3		*
4	<	*  SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig
4	>	*  SheepShaver (C) 1997-2005 Christian Bauer and Marc Hellwig
5		*
6		*  This program is free software; you can redistribute it and/or modify
7		*  it under the terms of the GNU General Public License as published by
#	Line 42 | Line 42
42
43		#include <stdio.h>
44		#include <stdlib.h>
45	+	#ifdef HAVE_MALLOC_H
46	+	#include <malloc.h>
47	+	#endif
48	+
49	+	#ifdef USE_SDL_VIDEO
50	+	#include <SDL_events.h>
51	+	#endif
52
53		#if ENABLE_MON
54		#include "mon.h"
#	Line 82 | Line 89 | extern uintptr SignalStackBase();
89
90		// From rsrc_patches.cpp
91		extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
92	+	extern "C" void named_check_load_invoc(uint32 type, uint32 name, uint32 h);
93
94		// PowerPC EmulOp to exit from emulation looop
95		const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1;
96
89	–	// Enable interrupt routine safety checks?
90	–	#define SAFE_INTERRUPT_PPC 1
91	–
97		// Enable Execute68k() safety checks?
98		#define SAFE_EXEC_68K 1
99
#	Line 101 | Line 106 | const uint32 POWERPC_EXEC_RETURN = POWER
106		// Interrupts in native mode?
107		#define INTERRUPTS_IN_NATIVE_MODE 1
108
104	–	// Enable native EMUL_OPs to be run without a mode switch
105	–	#define ENABLE_NATIVE_EMUL_OP 1
106	–
109		// Pointer to Kernel Data
110	<	static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE;
110	>	static KernelData * kernel_data;
111
112		// SIGSEGV handler
113	<	static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
113	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
114
115		#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
116		// Special trampolines for EmulOp and NativeOp
#	Line 138 | Line 140 | class sheepshaver_cpu
140		void init_decoder();
141		void execute_sheep(uint32 opcode);
142
141	–	// Filter out EMUL_OP routines that only call native code
142	–	bool filter_execute_emul_op(uint32 emul_op);
143	–
144	–	// "Native" EMUL_OP routines
145	–	void execute_emul_op_microseconds();
146	–	void execute_emul_op_idle_time_1();
147	–	void execute_emul_op_idle_time_2();
148	–
149	–	// CPU context to preserve on interrupt
150	–	class interrupt_context {
151	–	uint32 gpr[32];
152	–	uint32 pc;
153	–	uint32 lr;
154	–	uint32 ctr;
155	–	uint32 cr;
156	–	uint32 xer;
157	–	sheepshaver_cpu *cpu;
158	–	const char *where;
159	–	public:
160	–	interrupt_context(sheepshaver_cpu *_cpu, const char *_where);
161	–	~interrupt_context();
162	–	};
163	–
143		public:
144
145		// Constructor
#	Line 187 | Line 166 | public:
166		// Execute MacOS/PPC code
167		uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args);
168
169	+	#if PPC_ENABLE_JIT
170		// Compile one instruction
171		virtual int compile1(codegen_context_t & cg_context);
172	<
172	>	#endif
173		// Resource manager thunk
174		void get_resource(uint32 old_get_resource);
175
176		// Handle MacOS interrupt
177		void interrupt(uint32 entry);
198	–	void handle_interrupt();
178
179		// Make sure the SIGSEGV handler can access CPU registers
180		friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
181		};
182
204	–	// Memory allocator returning areas aligned on 16-byte boundaries
205	–	void *operator new(size_t size)
206	–	{
207	–	void *p;
208	–
209	–	#if defined(HAVE_POSIX_MEMALIGN)
210	–	if (posix_memalign(&p, 16, size) != 0)
211	–	throw std::bad_alloc();
212	–	#elif defined(HAVE_MEMALIGN)
213	–	p = memalign(16, size);
214	–	#elif defined(HAVE_VALLOC)
215	–	p = valloc(size); // page-aligned!
216	–	#else
217	–	/* XXX: handle padding ourselves */
218	–	p = malloc(size);
219	–	#endif
220	–
221	–	return p;
222	–	}
223	–
224	–	void operator delete(void *p)
225	–	{
226	–	#if defined(HAVE_MEMALIGN) || defined(HAVE_VALLOC)
227	–	#if defined(__GLIBC__)
228	–	// this is known to work only with GNU libc
229	–	free(p);
230	–	#endif
231	–	#else
232	–	free(p);
233	–	#endif
234	–	}
235	–
183		sheepshaver_cpu::sheepshaver_cpu()
184		: powerpc_cpu(enable_jit_p())
185		{
#	Line 270 | Line 217 | typedef bit_field< 19, 19 > FN_field;
217		typedef bit_field< 20, 25 > NATIVE_OP_field;
218		typedef bit_field< 26, 31 > EMUL_OP_field;
219
273	–	// "Native" EMUL_OP routines
274	–	#define GPR_A(REG) gpr(16 + (REG))
275	–	#define GPR_D(REG) gpr( 8 + (REG))
276	–
277	–	void sheepshaver_cpu::execute_emul_op_microseconds()
278	–	{
279	–	Microseconds(GPR_A(0), GPR_D(0));
280	–	}
281	–
282	–	void sheepshaver_cpu::execute_emul_op_idle_time_1()
283	–	{
284	–	// Sleep if no events pending
285	–	if (ReadMacInt32(0x14c) == 0)
286	–	Delay_usec(16667);
287	–	GPR_A(0) = ReadMacInt32(0x2b6);
288	–	}
289	–
290	–	void sheepshaver_cpu::execute_emul_op_idle_time_2()
291	–	{
292	–	// Sleep if no events pending
293	–	if (ReadMacInt32(0x14c) == 0)
294	–	Delay_usec(16667);
295	–	GPR_D(0) = (uint32)-2;
296	–	}
297	–
298	–	// Filter out EMUL_OP routines that only call native code
299	–	bool sheepshaver_cpu::filter_execute_emul_op(uint32 emul_op)
300	–	{
301	–	switch (emul_op) {
302	–	case OP_MICROSECONDS:
303	–	execute_emul_op_microseconds();
304	–	return true;
305	–	case OP_IDLE_TIME:
306	–	execute_emul_op_idle_time_1();
307	–	return true;
308	–	case OP_IDLE_TIME_2:
309	–	execute_emul_op_idle_time_2();
310	–	return true;
311	–	}
312	–	return false;
313	–	}
314	–
220		// Execute EMUL_OP routine
221		void sheepshaver_cpu::execute_emul_op(uint32 emul_op)
222		{
318	–	#if ENABLE_NATIVE_EMUL_OP
319	–	// First, filter out EMUL_OPs that can be executed without a mode switch
320	–	if (filter_execute_emul_op(emul_op))
321	–	return;
322	–	#endif
323	–
223		M68kRegisters r68;
224		WriteMacInt32(XLM_68K_R25, gpr(25));
225		WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
#	Line 329 | Line 228 | void sheepshaver_cpu::execute_emul_op(ui
228		for (int i = 0; i < 7; i++)
229		r68.a[i] = gpr(16 + i);
230		r68.a[7] = gpr(1);
231	<	uint32 saved_cr = get_cr() & CR_field<2>::mask();
231	>	uint32 saved_cr = get_cr() & 0xff9fffff; // mask_operand::compute(11, 8)
232		uint32 saved_xer = get_xer();
233		EmulOp(&r68, gpr(24), emul_op);
234		set_cr(saved_cr);
#	Line 373 | Line 272 | void sheepshaver_cpu::execute_sheep(uint
272		}
273
274		// Compile one instruction
275	+	#if PPC_ENABLE_JIT
276		int sheepshaver_cpu::compile1(codegen_context_t & cg_context)
277		{
378	–	#if PPC_ENABLE_JIT
278		const instr_info_t *ii = cg_context.instr_info;
279		if (ii->mnemo != PPC_I(SHEEP))
280		return COMPILE_FAILURE;
#	Line 445 | Line 344 | int sheepshaver_cpu::compile1(codegen_co
344		dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))check_load_invoc);
345		status = COMPILE_CODE_OK;
346		break;
347	<	#endif
348	<	case NATIVE_DISABLE_INTERRUPT:
349	<	dg.gen_invoke(DisableInterrupt);
350	<	status = COMPILE_CODE_OK;
351	<	break;
453	<	case NATIVE_ENABLE_INTERRUPT:
454	<	dg.gen_invoke(EnableInterrupt);
347	>	case NATIVE_NAMED_CHECK_LOAD_INVOC:
348	>	dg.gen_load_T0_GPR(3);
349	>	dg.gen_load_T1_GPR(4);
350	>	dg.gen_load_T2_GPR(5);
351	>	dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))named_check_load_invoc);
352		status = COMPILE_CODE_OK;
353		break;
354	+	#endif
355		case NATIVE_BITBLT:
356		dg.gen_load_T0_GPR(3);
357		dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt);
#	Line 510 | Line 408 | int sheepshaver_cpu::compile1(codegen_co
408
409		default: {      // EMUL_OP
410		uint32 emul_op = EMUL_OP_field::extract(opcode) - 3;
513	–	#if ENABLE_NATIVE_EMUL_OP
514	–	typedef void (*emul_op_func_t)(dyngen_cpu_base);
515	–	emul_op_func_t emul_op_func = 0;
516	–	switch (emul_op) {
517	–	case OP_MICROSECONDS:
518	–	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_microseconds).ptr();
519	–	break;
520	–	case OP_IDLE_TIME:
521	–	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_1).ptr();
522	–	break;
523	–	case OP_IDLE_TIME_2:
524	–	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_2).ptr();
525	–	break;
526	–	}
527	–	if (emul_op_func) {
528	–	dg.gen_invoke_CPU(emul_op_func);
529	–	cg_context.done_compile = false;
530	–	status = COMPILE_CODE_OK;
531	–	break;
532	–	}
533	–	#endif
411		#if PPC_REENTRANT_JIT
412		// Try to execute EmulOp trampoline
413		dg.gen_set_PC_im(cg_context.pc + 4);
#	Line 550 | Line 427 | int sheepshaver_cpu::compile1(codegen_co
427		}
428		}
429		return status;
553	–	#endif
554	–	return COMPILE_FAILURE;
555	–	}
556	–
557	–	// CPU context to preserve on interrupt
558	–	sheepshaver_cpu::interrupt_context::interrupt_context(sheepshaver_cpu *_cpu, const char *_where)
559	–	{
560	–	#if SAFE_INTERRUPT_PPC >= 2
561	–	cpu = _cpu;
562	–	where = _where;
563	–
564	–	// Save interrupt context
565	–	memcpy(&gpr[0], &cpu->gpr(0), sizeof(gpr));
566	–	pc = cpu->pc();
567	–	lr = cpu->lr();
568	–	ctr = cpu->ctr();
569	–	cr = cpu->get_cr();
570	–	xer = cpu->get_xer();
571	–	#endif
430		}
573	–
574	–	sheepshaver_cpu::interrupt_context::~interrupt_context()
575	–	{
576	–	#if SAFE_INTERRUPT_PPC >= 2
577	–	// Check whether CPU context was preserved by interrupt
578	–	if (memcmp(&gpr[0], &cpu->gpr(0), sizeof(gpr)) != 0) {
579	–	printf("FATAL: %s: interrupt clobbers registers\n", where);
580	–	for (int i = 0; i < 32; i++)
581	–	if (gpr[i] != cpu->gpr(i))
582	–	printf(" r%d: %08x -> %08x\n", i, gpr[i], cpu->gpr(i));
583	–	}
584	–	if (pc != cpu->pc())
585	–	printf("FATAL: %s: interrupt clobbers PC\n", where);
586	–	if (lr != cpu->lr())
587	–	printf("FATAL: %s: interrupt clobbers LR\n", where);
588	–	if (ctr != cpu->ctr())
589	–	printf("FATAL: %s: interrupt clobbers CTR\n", where);
590	–	if (cr != cpu->get_cr())
591	–	printf("FATAL: %s: interrupt clobbers CR\n", where);
592	–	if (xer != cpu->get_xer())
593	–	printf("FATAL: %s: interrupt clobbers XER\n", where);
431		#endif
595	–	}
432
433		// Handle MacOS interrupt
434		void sheepshaver_cpu::interrupt(uint32 entry)
#	Line 602 | Line 438 | void sheepshaver_cpu::interrupt(uint32 e
438		const clock_t interrupt_start = clock();
439		#endif
440
605	–	#if SAFE_INTERRUPT_PPC
606	–	static int depth = 0;
607	–	if (depth != 0)
608	–	printf("FATAL: sheepshaver_cpu::interrupt() called more than once: %d\n", depth);
609	–	depth++;
610	–	#endif
611	–
441		// Save program counters and branch registers
442		uint32 saved_pc = pc();
443		uint32 saved_lr = lr();
#	Line 662 | Line 491 | void sheepshaver_cpu::interrupt(uint32 e
491		#if EMUL_TIME_STATS
492		interrupt_time += (clock() - interrupt_start);
493		#endif
665	–
666	–	#if SAFE_INTERRUPT_PPC
667	–	depth--;
668	–	#endif
494		}
495
496		// Execute 68k routine
#	Line 884 | Line 709 | static void dump_log(void)
709		*  Initialize CPU emulation
710		*/
711
712	<	static sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
712	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
713		{
714		#if ENABLE_VOSF
715		// Handle screen fault
#	Line 896 | Line 721 | static sigsegv_return_t sigsegv_handler(
721		const uintptr addr = (uintptr)fault_address;
722		#if HAVE_SIGSEGV_SKIP_INSTRUCTION
723		// Ignore writes to ROM
724	<	if ((addr - ROM_BASE) < ROM_SIZE)
724	>	if ((addr - (uintptr)ROMBaseHost) < ROM_SIZE)
725		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
726
727		// Get program counter of target CPU
#	Line 943 | Line 768 | static sigsegv_return_t sigsegv_handler(
768		#error "FIXME: You don't have the capability to skip instruction within signal handlers"
769		#endif
770
771	<	printf("SIGSEGV\n");
772	<	printf("  pc %p\n", fault_instruction);
773	<	printf("  ea %p\n", fault_address);
771	>	fprintf(stderr, "SIGSEGV\n");
772	>	fprintf(stderr, "  pc %p\n", fault_instruction);
773	>	fprintf(stderr, "  ea %p\n", fault_address);
774		dump_registers();
775		ppc_cpu->dump_log();
776		enter_mon();
#	Line 956 | Line 781 | static sigsegv_return_t sigsegv_handler(
781
782		void init_emul_ppc(void)
783		{
784	+	// Get pointer to KernelData in host address space
785	+	kernel_data = (KernelData *)Mac2HostAddr(KERNEL_DATA_BASE);
786	+
787		// Initialize main CPU emulator
788		ppc_cpu = new sheepshaver_cpu();
789		ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
790		ppc_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
791		WriteMacInt32(XLM_RUN_MODE, MODE_68K);
792
965	–	// Install the handler for SIGSEGV
966	–	sigsegv_install_handler(sigsegv_handler);
967	–
793		#if ENABLE_MON
794		// Install "regs" command in cxmon
795		mon_add_command("regs", dump_registers, "regs                     Dump PowerPC registers\n");
#	Line 1009 | Line 834 | void exit_emul_ppc(void)
834		#endif
835
836		delete ppc_cpu;
837	+	ppc_cpu = NULL;
838		}
839
840		#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
#	Line 1056 | Line 882 | void emul_ppc(uint32 entry)
882
883		void TriggerInterrupt(void)
884		{
885	+	idle_resume();
886		#if 0
887		WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1);
888		#else
#	Line 1065 | Line 892 | void TriggerInterrupt(void)
892		#endif
893		}
894
895	<	void sheepshaver_cpu::handle_interrupt(void)
895	>	void HandleInterrupt(powerpc_registers *r)
896		{
897	+	#ifdef USE_SDL_VIDEO
898	+	// We must fill in the events queue in the same thread that did call SDL_SetVideoMode()
899	+	SDL_PumpEvents();
900	+	#endif
901	+
902		// Do nothing if interrupts are disabled
903	<	if (*(int32 *)XLM_IRQ_NEST > 0)
903	>	if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0)
904		return;
905
906	<	// Current interrupt nest level
1075	<	static int interrupt_depth = 0;
1076	<	++interrupt_depth;
906	>	// Update interrupt count
907		#if EMUL_TIME_STATS
908		interrupt_count++;
909		#endif
910
1081	–	// Disable MacOS stack sniffer
1082	–	WriteMacInt32(0x110, 0);
1083	–
911		// Interrupt action depends on current run mode
912		switch (ReadMacInt32(XLM_RUN_MODE)) {
913		case MODE_68K:
914		// 68k emulator active, trigger 68k interrupt level 1
915		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
916	<	set_cr(get_cr() | tswap32(kernel_data->v[0x674 >> 2]));
916	>	r->cr.set(r->cr.get() | tswap32(kernel_data->v[0x674 >> 2]));
917		break;
918
919		#if INTERRUPTS_IN_NATIVE_MODE
920		case MODE_NATIVE:
921		// 68k emulator inactive, in nanokernel?
922	<	if (gpr(1) != KernelDataAddr && interrupt_depth == 1) {
1096	<	interrupt_context ctx(this, "PowerPC mode");
922	>	if (r->gpr[1] != KernelDataAddr) {
923
924		// Prepare for 68k interrupt level 1
925		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
#	Line 1115 | Line 941 | void sheepshaver_cpu::handle_interrupt(v
941		case MODE_EMUL_OP:
942		// 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0
943		if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) {
1118	–	interrupt_context ctx(this, "68k mode");
944		#if EMUL_TIME_STATS
945		const clock_t interrupt_start = clock();
946		#endif
#	Line 1124 | Line 949 | void sheepshaver_cpu::handle_interrupt(v
949		M68kRegisters r;
950		uint32 old_r25 = ReadMacInt32(XLM_68K_R25);     // Save interrupt level
951		WriteMacInt32(XLM_68K_R25, 0x21);                       // Execute with interrupt level 1
952	<	static const uint8 proc[] = {
952	>	static const uint8 proc_template[] = {
953		0x3f, 0x3c, 0x00, 0x00,                 // move.w       #$0000,-(sp)    (fake format word)
954		0x48, 0x7a, 0x00, 0x0a,                 // pea          @1(pc)                  (return address)
955		0x40, 0xe7,                                             // move         sr,-(sp)                (saved SR)
#	Line 1132 | Line 957 | void sheepshaver_cpu::handle_interrupt(v
957		0x4e, 0xd0,                                             // jmp          (a0)
958		M68K_RTS >> 8, M68K_RTS & 0xff  // @1
959		};
960	<	Execute68k((uint32)proc, &r);
960	>	BUILD_SHEEPSHAVER_PROCEDURE(proc);
961	>	Execute68k(proc, &r);
962		WriteMacInt32(XLM_68K_R25, old_r25);            // Restore interrupt level
963		#else
964		// Only update cursor
#	Line 1151 | Line 977 | void sheepshaver_cpu::handle_interrupt(v
977		break;
978		#endif
979		}
1154	–
1155	–	// We are done with this interrupt
1156	–	--interrupt_depth;
980		}
981
1159	–	static void get_resource(void);
1160	–	static void get_1_resource(void);
1161	–	static void get_ind_resource(void);
1162	–	static void get_1_ind_resource(void);
1163	–	static void r_get_resource(void);
1164	–
982		// Execute NATIVE_OP routine
983		void sheepshaver_cpu::execute_native_op(uint32 selector)
984		{
#	Line 1181 | Line 998 | void sheepshaver_cpu::execute_native_op(
998		VideoVBL();
999		break;
1000		case NATIVE_VIDEO_DO_DRIVER_IO:
1001	<	gpr(3) = (int32)(int16)VideoDoDriverIO((void *)gpr(3), (void *)gpr(4),
1002	<	(void *)gpr(5), gpr(6), gpr(7));
1001	>	gpr(3) = (int32)(int16)VideoDoDriverIO(gpr(3), gpr(4), gpr(5), gpr(6), gpr(7));
1002	>	break;
1003	>	case NATIVE_ETHER_AO_GET_HWADDR:
1004	>	AO_get_ethernet_address(gpr(3));
1005	>	break;
1006	>	case NATIVE_ETHER_AO_ADD_MULTI:
1007	>	AO_enable_multicast(gpr(3));
1008	>	break;
1009	>	case NATIVE_ETHER_AO_DEL_MULTI:
1010	>	AO_disable_multicast(gpr(3));
1011	>	break;
1012	>	case NATIVE_ETHER_AO_SEND_PACKET:
1013	>	AO_transmit_packet(gpr(3));
1014		break;
1187	–	#ifdef WORDS_BIGENDIAN
1015		case NATIVE_ETHER_IRQ:
1016		EtherIRQ();
1017		break;
#	Line 1206 | Line 1033 | void sheepshaver_cpu::execute_native_op(
1033		case NATIVE_ETHER_RSRV:
1034		gpr(3) = ether_rsrv((queue_t *)gpr(3));
1035		break;
1209	–	#else
1210	–	case NATIVE_ETHER_INIT:
1211	–	// FIXME: needs more complicated thunks
1212	–	gpr(3) = false;
1213	–	break;
1214	–	#endif
1036		case NATIVE_SYNC_HOOK:
1037		gpr(3) = NQD_sync_hook(gpr(3));
1038		break;
#	Line 1251 | Line 1072 | void sheepshaver_cpu::execute_native_op(
1072		break;
1073		}
1074		case NATIVE_GET_RESOURCE:
1075	+	get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1076	+	break;
1077		case NATIVE_GET_1_RESOURCE:
1078	+	get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1079	+	break;
1080		case NATIVE_GET_IND_RESOURCE:
1081	<	case NATIVE_GET_1_IND_RESOURCE:
1257	<	case NATIVE_R_GET_RESOURCE: {
1258	<	typedef void (*GetResourceCallback)(void);
1259	<	static const GetResourceCallback get_resource_callbacks[] = {
1260	<	::get_resource,
1261	<	::get_1_resource,
1262	<	::get_ind_resource,
1263	<	::get_1_ind_resource,
1264	<	::r_get_resource
1265	<	};
1266	<	get_resource_callbacks[selector - NATIVE_GET_RESOURCE]();
1081	>	get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1082		break;
1083	<	}
1084	<	case NATIVE_DISABLE_INTERRUPT:
1270	<	DisableInterrupt();
1083	>	case NATIVE_GET_1_IND_RESOURCE:
1084	>	get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1085		break;
1086	<	case NATIVE_ENABLE_INTERRUPT:
1087	<	EnableInterrupt();
1086	>	case NATIVE_R_GET_RESOURCE:
1087	>	get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1088		break;
1089		case NATIVE_MAKE_EXECUTABLE:
1090	<	MakeExecutable(0, (void *)gpr(4), gpr(5));
1090	>	MakeExecutable(0, gpr(4), gpr(5));
1091		break;
1092		case NATIVE_CHECK_LOAD_INVOC:
1093		check_load_invoc(gpr(3), gpr(4), gpr(5));
1094		break;
1095	+	case NATIVE_NAMED_CHECK_LOAD_INVOC:
1096	+	named_check_load_invoc(gpr(3), gpr(4), gpr(5));
1097	+	break;
1098		default:
1099		printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector);
1100		QuitEmulator();
#	Line 1364 | Line 1181 | uint32 call_macos7(uint32 tvect, uint32
1181		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6, arg7 };
1182		return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1183		}
1367	–
1368	–	/*
1369	–	*  Resource Manager thunks
1370	–	*/
1371	–
1372	–	void get_resource(void)
1373	–	{
1374	–	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1375	–	}
1376	–
1377	–	void get_1_resource(void)
1378	–	{
1379	–	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1380	–	}
1381	–
1382	–	void get_ind_resource(void)
1383	–	{
1384	–	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1385	–	}
1386	–
1387	–	void get_1_ind_resource(void)
1388	–	{
1389	–	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1390	–	}
1391	–
1392	–	void r_get_resource(void)
1393	–	{
1394	–	ppc_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1395	–	}

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