[ViewVC] Diff of: cebix/SheepShaver/src/kpx_cpu/sheepshaver

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.45 by gbeauche, 2004-06-22T14:18:35Z vs.
Revision 1.54 by gbeauche, 2004-11-25T00:21:09Z

#	Line 42 \| Line 42
42
43		#include <stdio.h>
44		#include <stdlib.h>
45	+	#ifdef HAVE_MALLOC_H
46	+	#include <malloc.h>
47	+	#endif
48	+
49	+	#ifdef USE_SDL_VIDEO
50	+	#include <SDL_events.h>
51	+	#endif
52
53		#if ENABLE_MON
54		#include "mon.h"
#	Line 101 \| Line 108 \| const uint32 POWERPC_EXEC_RETURN = POWER
108		// Interrupts in native mode?
109		#define INTERRUPTS_IN_NATIVE_MODE 1
110
104	–	// Enable native EMUL_OPs to be run without a mode switch
105	–	#define ENABLE_NATIVE_EMUL_OP 1
106	–
111		// Pointer to Kernel Data
112	<	static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE;
112	>	static KernelData * kernel_data;
113
114		// SIGSEGV handler
115	<	static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
115	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
116
117		#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
118		// Special trampolines for EmulOp and NativeOp
#	Line 138 \| Line 142 \| class sheepshaver_cpu
142		void init_decoder();
143		void execute_sheep(uint32 opcode);
144
141	–	// Filter out EMUL_OP routines that only call native code
142	–	bool filter_execute_emul_op(uint32 emul_op);
143	–
144	–	// "Native" EMUL_OP routines
145	–	void execute_emul_op_microseconds();
146	–	void execute_emul_op_idle_time_1();
147	–	void execute_emul_op_idle_time_2();
148	–
145		// CPU context to preserve on interrupt
146		class interrupt_context {
147		uint32 gpr[32];
#	Line 187 \| Line 183 \| public:
183		// Execute MacOS/PPC code
184		uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args);
185
186	+	#if PPC_ENABLE_JIT
187		// Compile one instruction
188		virtual int compile1(codegen_context_t & cg_context);
189	<
189	>	#endif
190		// Resource manager thunk
191		void get_resource(uint32 old_get_resource);
192
#	Line 199 \| Line 196 \| public:
196
197		// Make sure the SIGSEGV handler can access CPU registers
198		friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
199	+
200	+	// Memory allocator returning areas aligned on 16-byte boundaries
201	+	void *operator new(size_t size);
202	+	void operator delete(void *p);
203		};
204
205		// Memory allocator returning areas aligned on 16-byte boundaries
206	<	void *operator new(size_t size)
206	>	void *sheepshaver_cpu::operator new(size_t size)
207		{
208		void *p;
209
#	Line 221 \| Line 222 \| *void operator new(size_t size)**
222		return p;
223		}
224
225	<	void operator delete(void *p)
225	>	void sheepshaver_cpu::operator delete(void *p)
226		{
227		#if defined(HAVE_MEMALIGN) \|\| defined(HAVE_VALLOC)
228		#if defined(__GLIBC__)
#	Line 270 \| Line 271 \| typedef bit_field< 19, 19 > FN_field;
271		typedef bit_field< 20, 25 > NATIVE_OP_field;
272		typedef bit_field< 26, 31 > EMUL_OP_field;
273
273	–	// "Native" EMUL_OP routines
274	–	#define GPR_A(REG) gpr(16 + (REG))
275	–	#define GPR_D(REG) gpr( 8 + (REG))
276	–
277	–	void sheepshaver_cpu::execute_emul_op_microseconds()
278	–	{
279	–	Microseconds(GPR_A(0), GPR_D(0));
280	–	}
281	–
282	–	void sheepshaver_cpu::execute_emul_op_idle_time_1()
283	–	{
284	–	// Sleep if no events pending
285	–	if (ReadMacInt32(0x14c) == 0)
286	–	Delay_usec(16667);
287	–	GPR_A(0) = ReadMacInt32(0x2b6);
288	–	}
289	–
290	–	void sheepshaver_cpu::execute_emul_op_idle_time_2()
291	–	{
292	–	// Sleep if no events pending
293	–	if (ReadMacInt32(0x14c) == 0)
294	–	Delay_usec(16667);
295	–	GPR_D(0) = (uint32)-2;
296	–	}
297	–
298	–	// Filter out EMUL_OP routines that only call native code
299	–	bool sheepshaver_cpu::filter_execute_emul_op(uint32 emul_op)
300	–	{
301	–	switch (emul_op) {
302	–	case OP_MICROSECONDS:
303	–	execute_emul_op_microseconds();
304	–	return true;
305	–	case OP_IDLE_TIME:
306	–	execute_emul_op_idle_time_1();
307	–	return true;
308	–	case OP_IDLE_TIME_2:
309	–	execute_emul_op_idle_time_2();
310	–	return true;
311	–	}
312	–	return false;
313	–	}
314	–
274		// Execute EMUL_OP routine
275		void sheepshaver_cpu::execute_emul_op(uint32 emul_op)
276		{
318	–	#if ENABLE_NATIVE_EMUL_OP
319	–	// First, filter out EMUL_OPs that can be executed without a mode switch
320	–	if (filter_execute_emul_op(emul_op))
321	–	return;
322	–	#endif
323	–
277		M68kRegisters r68;
278		WriteMacInt32(XLM_68K_R25, gpr(25));
279		WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
#	Line 373 \| Line 326 \| void sheepshaver_cpu::execute_sheep(uint
326		}
327
328		// Compile one instruction
329	+	#if PPC_ENABLE_JIT
330		int sheepshaver_cpu::compile1(codegen_context_t & cg_context)
331		{
378	–	#if PPC_ENABLE_JIT
332		const instr_info_t *ii = cg_context.instr_info;
333		if (ii->mnemo != PPC_I(SHEEP))
334		return COMPILE_FAILURE;
#	Line 446 \| Line 399 \| int sheepshaver_cpu::compile1(codegen_co
399		status = COMPILE_CODE_OK;
400		break;
401		#endif
449	–	case NATIVE_DISABLE_INTERRUPT:
450	–	dg.gen_invoke(DisableInterrupt);
451	–	status = COMPILE_CODE_OK;
452	–	break;
453	–	case NATIVE_ENABLE_INTERRUPT:
454	–	dg.gen_invoke(EnableInterrupt);
455	–	status = COMPILE_CODE_OK;
456	–	break;
402		case NATIVE_BITBLT:
403		dg.gen_load_T0_GPR(3);
404		dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt);
#	Line 510 \| Line 455 \| int sheepshaver_cpu::compile1(codegen_co
455
456		default: { // EMUL_OP
457		uint32 emul_op = EMUL_OP_field::extract(opcode) - 3;
513	–	#if ENABLE_NATIVE_EMUL_OP
514	–	typedef void (*emul_op_func_t)(dyngen_cpu_base);
515	–	emul_op_func_t emul_op_func = 0;
516	–	switch (emul_op) {
517	–	case OP_MICROSECONDS:
518	–	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_microseconds).ptr();
519	–	break;
520	–	case OP_IDLE_TIME:
521	–	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_1).ptr();
522	–	break;
523	–	case OP_IDLE_TIME_2:
524	–	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_2).ptr();
525	–	break;
526	–	}
527	–	if (emul_op_func) {
528	–	dg.gen_invoke_CPU(emul_op_func);
529	–	cg_context.done_compile = false;
530	–	status = COMPILE_CODE_OK;
531	–	break;
532	–	}
533	–	#endif
458		#if PPC_REENTRANT_JIT
459		// Try to execute EmulOp trampoline
460		dg.gen_set_PC_im(cg_context.pc + 4);
#	Line 550 \| Line 474 \| int sheepshaver_cpu::compile1(codegen_co
474		}
475		}
476		return status;
553	–	#endif
554	–	return COMPILE_FAILURE;
477		}
478	+	#endif
479
480		// CPU context to preserve on interrupt
481		sheepshaver_cpu::interrupt_context::interrupt_context(sheepshaver_cpu _cpu, const char _where)
#	Line 884 \| Line 807 \| static void dump_log(void)
807		* Initialize CPU emulation
808		*/
809
810	<	static sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
810	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
811		{
812		#if ENABLE_VOSF
813		// Handle screen fault
#	Line 896 \| Line 819 \| static sigsegv_return_t sigsegv_handler(
819		const uintptr addr = (uintptr)fault_address;
820		#if HAVE_SIGSEGV_SKIP_INSTRUCTION
821		// Ignore writes to ROM
822	<	if ((addr - ROM_BASE) < ROM_SIZE)
822	>	if ((addr - (uintptr)ROMBaseHost) < ROM_SIZE)
823		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
824
825		// Get program counter of target CPU
#	Line 956 \| Line 879 \| static sigsegv_return_t sigsegv_handler(
879
880		void init_emul_ppc(void)
881		{
882	+	// Get pointer to KernelData in host address space
883	+	kernel_data = (KernelData *)Mac2HostAddr(KERNEL_DATA_BASE);
884	+
885		// Initialize main CPU emulator
886		ppc_cpu = new sheepshaver_cpu();
887		ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
888		ppc_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
889		WriteMacInt32(XLM_RUN_MODE, MODE_68K);
890
965	–	// Install the handler for SIGSEGV
966	–	sigsegv_install_handler(sigsegv_handler);
967	–
891		#if ENABLE_MON
892		// Install "regs" command in cxmon
893		mon_add_command("regs", dump_registers, "regs Dump PowerPC registers\n");
#	Line 1067 \| Line 990 \| void TriggerInterrupt(void)
990
991		void sheepshaver_cpu::handle_interrupt(void)
992		{
993	+	#ifdef USE_SDL_VIDEO
994	+	// We must fill in the events queue in the same thread that did call SDL_SetVideoMode()
995	+	SDL_PumpEvents();
996	+	#endif
997	+
998		// Do nothing if interrupts are disabled
999	<	if ((int32 )XLM_IRQ_NEST > 0)
999	>	if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0)
1000		return;
1001
1002		// Current interrupt nest level
#	Line 1124 \| Line 1052 \| void sheepshaver_cpu::handle_interrupt(v
1052		M68kRegisters r;
1053		uint32 old_r25 = ReadMacInt32(XLM_68K_R25); // Save interrupt level
1054		WriteMacInt32(XLM_68K_R25, 0x21); // Execute with interrupt level 1
1055	<	static const uint8 proc[] = {
1055	>	static const uint8 proc_template[] = {
1056		0x3f, 0x3c, 0x00, 0x00, // move.w #$0000,-(sp) (fake format word)
1057		0x48, 0x7a, 0x00, 0x0a, // pea @1(pc) (return address)
1058		0x40, 0xe7, // move sr,-(sp) (saved SR)
#	Line 1132 \| Line 1060 \| void sheepshaver_cpu::handle_interrupt(v
1060		0x4e, 0xd0, // jmp (a0)
1061		M68K_RTS >> 8, M68K_RTS & 0xff // @1
1062		};
1063	<	Execute68k((uint32)proc, &r);
1063	>	BUILD_SHEEPSHAVER_PROCEDURE(proc);
1064	>	Execute68k(proc, &r);
1065		WriteMacInt32(XLM_68K_R25, old_r25); // Restore interrupt level
1066		#else
1067		// Only update cursor
#	Line 1181 \| Line 1110 \| void sheepshaver_cpu::execute_native_op(
1110		VideoVBL();
1111		break;
1112		case NATIVE_VIDEO_DO_DRIVER_IO:
1113	<	gpr(3) = (int32)(int16)VideoDoDriverIO((void )gpr(3), (void )gpr(4),
1185	<	(void *)gpr(5), gpr(6), gpr(7));
1113	>	gpr(3) = (int32)(int16)VideoDoDriverIO(gpr(3), gpr(4), gpr(5), gpr(6), gpr(7));
1114		break;
1115		#ifdef WORDS_BIGENDIAN
1116		case NATIVE_ETHER_IRQ:
#	Line 1266 \| Line 1194 \| void sheepshaver_cpu::execute_native_op(
1194		get_resource_callbacks[selector - NATIVE_GET_RESOURCE]();
1195		break;
1196		}
1269	–	case NATIVE_DISABLE_INTERRUPT:
1270	–	DisableInterrupt();
1271	–	break;
1272	–	case NATIVE_ENABLE_INTERRUPT:
1273	–	EnableInterrupt();
1274	–	break;
1197		case NATIVE_MAKE_EXECUTABLE:
1198	<	MakeExecutable(0, (void *)gpr(4), gpr(5));
1198	>	MakeExecutable(0, gpr(4), gpr(5));
1199		break;
1200		case NATIVE_CHECK_LOAD_INVOC:
1201		check_load_invoc(gpr(3), gpr(4), gpr(5));

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Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents): Revision 1.45 by gbeauche, 2004-06-22T14:18:35Z vs. Revision 1.54 by gbeauche, 2004-11-25T00:21:09Z

Diff Legend

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.45 by gbeauche, 2004-06-22T14:18:35Z vs.
Revision 1.54 by gbeauche, 2004-11-25T00:21:09Z