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root/cebix/SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.44 by gbeauche, 2004-06-05T07:09:38Z vs.
Revision 1.60 by gbeauche, 2005-03-17T23:40:01Z

#	Line 1 | Line 1
1		/*
2		*  sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface
3		*
4	<	*  SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig
4	>	*  SheepShaver (C) 1997-2005 Christian Bauer and Marc Hellwig
5		*
6		*  This program is free software; you can redistribute it and/or modify
7		*  it under the terms of the GNU General Public License as published by
#	Line 42 | Line 42
42
43		#include <stdio.h>
44		#include <stdlib.h>
45	+	#ifdef HAVE_MALLOC_H
46	+	#include <malloc.h>
47	+	#endif
48	+
49	+	#ifdef USE_SDL_VIDEO
50	+	#include <SDL_events.h>
51	+	#endif
52
53		#if ENABLE_MON
54		#include "mon.h"
#	Line 86 | Line 93 | extern "C" void check_load_invoc(uint32
93		// PowerPC EmulOp to exit from emulation looop
94		const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1;
95
89	–	// Enable interrupt routine safety checks?
90	–	#define SAFE_INTERRUPT_PPC 1
91	–
96		// Enable Execute68k() safety checks?
97		#define SAFE_EXEC_68K 1
98
#	Line 101 | Line 105 | const uint32 POWERPC_EXEC_RETURN = POWER
105		// Interrupts in native mode?
106		#define INTERRUPTS_IN_NATIVE_MODE 1
107
104	–	// Enable native EMUL_OPs to be run without a mode switch
105	–	#define ENABLE_NATIVE_EMUL_OP 1
106	–
108		// Pointer to Kernel Data
109	<	static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE;
109	>	static KernelData * kernel_data;
110
111		// SIGSEGV handler
112	<	static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
112	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
113
114		#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
115		// Special trampolines for EmulOp and NativeOp
#	Line 138 | Line 139 | class sheepshaver_cpu
139		void init_decoder();
140		void execute_sheep(uint32 opcode);
141
141	–	// Filter out EMUL_OP routines that only call native code
142	–	bool filter_execute_emul_op(uint32 emul_op);
143	–
144	–	// "Native" EMUL_OP routines
145	–	void execute_emul_op_microseconds();
146	–	void execute_emul_op_idle_time_1();
147	–	void execute_emul_op_idle_time_2();
148	–
149	–	// CPU context to preserve on interrupt
150	–	class interrupt_context {
151	–	uint32 gpr[32];
152	–	uint32 pc;
153	–	uint32 lr;
154	–	uint32 ctr;
155	–	uint32 cr;
156	–	uint32 xer;
157	–	sheepshaver_cpu *cpu;
158	–	const char *where;
159	–	public:
160	–	interrupt_context(sheepshaver_cpu *_cpu, const char *_where);
161	–	~interrupt_context();
162	–	};
163	–
142		public:
143
144		// Constructor
#	Line 187 | Line 165 | public:
165		// Execute MacOS/PPC code
166		uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args);
167
168	+	#if PPC_ENABLE_JIT
169		// Compile one instruction
170		virtual int compile1(codegen_context_t & cg_context);
171	<
171	>	#endif
172		// Resource manager thunk
173		void get_resource(uint32 old_get_resource);
174
175		// Handle MacOS interrupt
176		void interrupt(uint32 entry);
198	–	void handle_interrupt();
177
178		// Make sure the SIGSEGV handler can access CPU registers
179		friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
180	+
181	+	// Memory allocator returning areas aligned on 16-byte boundaries
182	+	void *operator new(size_t size);
183	+	void operator delete(void *p);
184		};
185
186		// Memory allocator returning areas aligned on 16-byte boundaries
187	<	void *operator new(size_t size)
187	>	void *sheepshaver_cpu::operator new(size_t size)
188		{
189		void *p;
190
#	Line 221 | Line 203 | void *operator new(size_t size)
203		return p;
204		}
205
206	<	void operator delete(void *p)
206	>	void sheepshaver_cpu::operator delete(void *p)
207		{
208		#if defined(HAVE_MEMALIGN) || defined(HAVE_VALLOC)
209		#if defined(__GLIBC__)
#	Line 270 | Line 252 | typedef bit_field< 19, 19 > FN_field;
252		typedef bit_field< 20, 25 > NATIVE_OP_field;
253		typedef bit_field< 26, 31 > EMUL_OP_field;
254
273	–	// "Native" EMUL_OP routines
274	–	#define GPR_A(REG) gpr(16 + (REG))
275	–	#define GPR_D(REG) gpr( 8 + (REG))
276	–
277	–	void sheepshaver_cpu::execute_emul_op_microseconds()
278	–	{
279	–	Microseconds(GPR_A(0), GPR_D(0));
280	–	}
281	–
282	–	void sheepshaver_cpu::execute_emul_op_idle_time_1()
283	–	{
284	–	// Sleep if no events pending
285	–	if (ReadMacInt32(0x14c) == 0)
286	–	Delay_usec(16667);
287	–	GPR_A(0) = ReadMacInt32(0x2b6);
288	–	}
289	–
290	–	void sheepshaver_cpu::execute_emul_op_idle_time_2()
291	–	{
292	–	// Sleep if no events pending
293	–	if (ReadMacInt32(0x14c) == 0)
294	–	Delay_usec(16667);
295	–	GPR_D(0) = (uint32)-2;
296	–	}
297	–
298	–	// Filter out EMUL_OP routines that only call native code
299	–	bool sheepshaver_cpu::filter_execute_emul_op(uint32 emul_op)
300	–	{
301	–	switch (emul_op) {
302	–	case OP_MICROSECONDS:
303	–	execute_emul_op_microseconds();
304	–	return true;
305	–	case OP_IDLE_TIME:
306	–	execute_emul_op_idle_time_1();
307	–	return true;
308	–	case OP_IDLE_TIME_2:
309	–	execute_emul_op_idle_time_2();
310	–	return true;
311	–	}
312	–	return false;
313	–	}
314	–
255		// Execute EMUL_OP routine
256		void sheepshaver_cpu::execute_emul_op(uint32 emul_op)
257		{
318	–	#if ENABLE_NATIVE_EMUL_OP
319	–	// First, filter out EMUL_OPs that can be executed without a mode switch
320	–	if (filter_execute_emul_op(emul_op))
321	–	return;
322	–	#endif
323	–
258		M68kRegisters r68;
259		WriteMacInt32(XLM_68K_R25, gpr(25));
260		WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
#	Line 373 | Line 307 | void sheepshaver_cpu::execute_sheep(uint
307		}
308
309		// Compile one instruction
310	+	#if PPC_ENABLE_JIT
311		int sheepshaver_cpu::compile1(codegen_context_t & cg_context)
312		{
378	–	#if PPC_ENABLE_JIT
313		const instr_info_t *ii = cg_context.instr_info;
314		if (ii->mnemo != PPC_I(SHEEP))
315		return COMPILE_FAILURE;
#	Line 446 | Line 380 | int sheepshaver_cpu::compile1(codegen_co
380		status = COMPILE_CODE_OK;
381		break;
382		#endif
449	–	case NATIVE_DISABLE_INTERRUPT:
450	–	dg.gen_invoke(DisableInterrupt);
451	–	status = COMPILE_CODE_OK;
452	–	break;
453	–	case NATIVE_ENABLE_INTERRUPT:
454	–	dg.gen_invoke(EnableInterrupt);
455	–	status = COMPILE_CODE_OK;
456	–	break;
383		case NATIVE_BITBLT:
384		dg.gen_load_T0_GPR(3);
385		dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt);
#	Line 510 | Line 436 | int sheepshaver_cpu::compile1(codegen_co
436
437		default: {      // EMUL_OP
438		uint32 emul_op = EMUL_OP_field::extract(opcode) - 3;
513	–	#if ENABLE_NATIVE_EMUL_OP
514	–	typedef void (*emul_op_func_t)(dyngen_cpu_base);
515	–	emul_op_func_t emul_op_func = 0;
516	–	switch (emul_op) {
517	–	case OP_MICROSECONDS:
518	–	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_microseconds).ptr();
519	–	break;
520	–	case OP_IDLE_TIME:
521	–	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_1).ptr();
522	–	break;
523	–	case OP_IDLE_TIME_2:
524	–	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_2).ptr();
525	–	break;
526	–	}
527	–	if (emul_op_func) {
528	–	dg.gen_invoke_CPU(emul_op_func);
529	–	cg_context.done_compile = false;
530	–	status = COMPILE_CODE_OK;
531	–	break;
532	–	}
533	–	#endif
439		#if PPC_REENTRANT_JIT
440		// Try to execute EmulOp trampoline
441		dg.gen_set_PC_im(cg_context.pc + 4);
#	Line 550 | Line 455 | int sheepshaver_cpu::compile1(codegen_co
455		}
456		}
457		return status;
553	–	#endif
554	–	return COMPILE_FAILURE;
555	–	}
556	–
557	–	// CPU context to preserve on interrupt
558	–	sheepshaver_cpu::interrupt_context::interrupt_context(sheepshaver_cpu *_cpu, const char *_where)
559	–	{
560	–	#if SAFE_INTERRUPT_PPC >= 2
561	–	cpu = _cpu;
562	–	where = _where;
563	–
564	–	// Save interrupt context
565	–	memcpy(&gpr[0], &cpu->gpr(0), sizeof(gpr));
566	–	pc = cpu->pc();
567	–	lr = cpu->lr();
568	–	ctr = cpu->ctr();
569	–	cr = cpu->get_cr();
570	–	xer = cpu->get_xer();
571	–	#endif
458		}
573	–
574	–	sheepshaver_cpu::interrupt_context::~interrupt_context()
575	–	{
576	–	#if SAFE_INTERRUPT_PPC >= 2
577	–	// Check whether CPU context was preserved by interrupt
578	–	if (memcmp(&gpr[0], &cpu->gpr(0), sizeof(gpr)) != 0) {
579	–	printf("FATAL: %s: interrupt clobbers registers\n", where);
580	–	for (int i = 0; i < 32; i++)
581	–	if (gpr[i] != cpu->gpr(i))
582	–	printf(" r%d: %08x -> %08x\n", i, gpr[i], cpu->gpr(i));
583	–	}
584	–	if (pc != cpu->pc())
585	–	printf("FATAL: %s: interrupt clobbers PC\n", where);
586	–	if (lr != cpu->lr())
587	–	printf("FATAL: %s: interrupt clobbers LR\n", where);
588	–	if (ctr != cpu->ctr())
589	–	printf("FATAL: %s: interrupt clobbers CTR\n", where);
590	–	if (cr != cpu->get_cr())
591	–	printf("FATAL: %s: interrupt clobbers CR\n", where);
592	–	if (xer != cpu->get_xer())
593	–	printf("FATAL: %s: interrupt clobbers XER\n", where);
459		#endif
595	–	}
460
461		// Handle MacOS interrupt
462		void sheepshaver_cpu::interrupt(uint32 entry)
#	Line 602 | Line 466 | void sheepshaver_cpu::interrupt(uint32 e
466		const clock_t interrupt_start = clock();
467		#endif
468
605	–	#if SAFE_INTERRUPT_PPC
606	–	static int depth = 0;
607	–	if (depth != 0)
608	–	printf("FATAL: sheepshaver_cpu::interrupt() called more than once: %d\n", depth);
609	–	depth++;
610	–	#endif
611	–
469		// Save program counters and branch registers
470		uint32 saved_pc = pc();
471		uint32 saved_lr = lr();
#	Line 662 | Line 519 | void sheepshaver_cpu::interrupt(uint32 e
519		#if EMUL_TIME_STATS
520		interrupt_time += (clock() - interrupt_start);
521		#endif
665	–
666	–	#if SAFE_INTERRUPT_PPC
667	–	depth--;
668	–	#endif
522		}
523
524		// Execute 68k routine
#	Line 884 | Line 737 | static void dump_log(void)
737		*  Initialize CPU emulation
738		*/
739
740	<	static sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
740	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
741		{
742		#if ENABLE_VOSF
743		// Handle screen fault
#	Line 896 | Line 749 | static sigsegv_return_t sigsegv_handler(
749		const uintptr addr = (uintptr)fault_address;
750		#if HAVE_SIGSEGV_SKIP_INSTRUCTION
751		// Ignore writes to ROM
752	<	if ((addr - ROM_BASE) < ROM_SIZE)
752	>	if ((addr - (uintptr)ROMBaseHost) < ROM_SIZE)
753		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
754
755		// Get program counter of target CPU
#	Line 943 | Line 796 | static sigsegv_return_t sigsegv_handler(
796		#error "FIXME: You don't have the capability to skip instruction within signal handlers"
797		#endif
798
799	<	printf("SIGSEGV\n");
800	<	printf("  pc %p\n", fault_instruction);
801	<	printf("  ea %p\n", fault_address);
799	>	fprintf(stderr, "SIGSEGV\n");
800	>	fprintf(stderr, "  pc %p\n", fault_instruction);
801	>	fprintf(stderr, "  ea %p\n", fault_address);
802		dump_registers();
803		ppc_cpu->dump_log();
804		enter_mon();
#	Line 956 | Line 809 | static sigsegv_return_t sigsegv_handler(
809
810		void init_emul_ppc(void)
811		{
812	+	// Get pointer to KernelData in host address space
813	+	kernel_data = (KernelData *)Mac2HostAddr(KERNEL_DATA_BASE);
814	+
815		// Initialize main CPU emulator
816		ppc_cpu = new sheepshaver_cpu();
817		ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
818		ppc_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
819		WriteMacInt32(XLM_RUN_MODE, MODE_68K);
820
965	–	// Install the handler for SIGSEGV
966	–	sigsegv_install_handler(sigsegv_handler);
967	–
821		#if ENABLE_MON
822		// Install "regs" command in cxmon
823		mon_add_command("regs", dump_registers, "regs                     Dump PowerPC registers\n");
#	Line 1065 | Line 918 | void TriggerInterrupt(void)
918		#endif
919		}
920
921	<	void sheepshaver_cpu::handle_interrupt(void)
921	>	void HandleInterrupt(powerpc_registers *r)
922		{
923	+	#ifdef USE_SDL_VIDEO
924	+	// We must fill in the events queue in the same thread that did call SDL_SetVideoMode()
925	+	SDL_PumpEvents();
926	+	#endif
927	+
928		// Do nothing if interrupts are disabled
929	<	if (*(int32 *)XLM_IRQ_NEST > 0)
929	>	if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0)
930		return;
931
932	<	// Do nothing if there is no interrupt pending
932	>	// Do nothing if there is no pending interrupt
933		if (InterruptFlags == 0)
934		return;
935
#	Line 1082 | Line 940 | void sheepshaver_cpu::handle_interrupt(v
940		interrupt_count++;
941		#endif
942
1085	–	// Disable MacOS stack sniffer
1086	–	WriteMacInt32(0x110, 0);
1087	–
943		// Interrupt action depends on current run mode
944		switch (ReadMacInt32(XLM_RUN_MODE)) {
945		case MODE_68K:
946		// 68k emulator active, trigger 68k interrupt level 1
947		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
948	<	set_cr(get_cr() | tswap32(kernel_data->v[0x674 >> 2]));
948	>	r->cr.set(r->cr.get() | tswap32(kernel_data->v[0x674 >> 2]));
949		break;
950
951		#if INTERRUPTS_IN_NATIVE_MODE
952		case MODE_NATIVE:
953		// 68k emulator inactive, in nanokernel?
954	<	if (gpr(1) != KernelDataAddr && interrupt_depth == 1) {
1100	<	interrupt_context ctx(this, "PowerPC mode");
954	>	if (r->gpr[1] != KernelDataAddr && interrupt_depth == 1) {
955
956		// Prepare for 68k interrupt level 1
957		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
#	Line 1119 | Line 973 | void sheepshaver_cpu::handle_interrupt(v
973		case MODE_EMUL_OP:
974		// 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0
975		if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) {
1122	–	interrupt_context ctx(this, "68k mode");
976		#if EMUL_TIME_STATS
977		const clock_t interrupt_start = clock();
978		#endif
#	Line 1128 | Line 981 | void sheepshaver_cpu::handle_interrupt(v
981		M68kRegisters r;
982		uint32 old_r25 = ReadMacInt32(XLM_68K_R25);     // Save interrupt level
983		WriteMacInt32(XLM_68K_R25, 0x21);                       // Execute with interrupt level 1
984	<	static const uint8 proc[] = {
984	>	static const uint8 proc_template[] = {
985		0x3f, 0x3c, 0x00, 0x00,                 // move.w       #$0000,-(sp)    (fake format word)
986		0x48, 0x7a, 0x00, 0x0a,                 // pea          @1(pc)                  (return address)
987		0x40, 0xe7,                                             // move         sr,-(sp)                (saved SR)
#	Line 1136 | Line 989 | void sheepshaver_cpu::handle_interrupt(v
989		0x4e, 0xd0,                                             // jmp          (a0)
990		M68K_RTS >> 8, M68K_RTS & 0xff  // @1
991		};
992	<	Execute68k((uint32)proc, &r);
992	>	BUILD_SHEEPSHAVER_PROCEDURE(proc);
993	>	Execute68k(proc, &r);
994		WriteMacInt32(XLM_68K_R25, old_r25);            // Restore interrupt level
995		#else
996		// Only update cursor
#	Line 1185 | Line 1039 | void sheepshaver_cpu::execute_native_op(
1039		VideoVBL();
1040		break;
1041		case NATIVE_VIDEO_DO_DRIVER_IO:
1042	<	gpr(3) = (int32)(int16)VideoDoDriverIO((void *)gpr(3), (void *)gpr(4),
1189	<	(void *)gpr(5), gpr(6), gpr(7));
1042	>	gpr(3) = (int32)(int16)VideoDoDriverIO(gpr(3), gpr(4), gpr(5), gpr(6), gpr(7));
1043		break;
1191	–	#ifdef WORDS_BIGENDIAN
1044		case NATIVE_ETHER_IRQ:
1045		EtherIRQ();
1046		break;
#	Line 1210 | Line 1062 | void sheepshaver_cpu::execute_native_op(
1062		case NATIVE_ETHER_RSRV:
1063		gpr(3) = ether_rsrv((queue_t *)gpr(3));
1064		break;
1213	–	#else
1214	–	case NATIVE_ETHER_INIT:
1215	–	// FIXME: needs more complicated thunks
1216	–	gpr(3) = false;
1217	–	break;
1218	–	#endif
1065		case NATIVE_SYNC_HOOK:
1066		gpr(3) = NQD_sync_hook(gpr(3));
1067		break;
#	Line 1270 | Line 1116 | void sheepshaver_cpu::execute_native_op(
1116		get_resource_callbacks[selector - NATIVE_GET_RESOURCE]();
1117		break;
1118		}
1273	–	case NATIVE_DISABLE_INTERRUPT:
1274	–	DisableInterrupt();
1275	–	break;
1276	–	case NATIVE_ENABLE_INTERRUPT:
1277	–	EnableInterrupt();
1278	–	break;
1119		case NATIVE_MAKE_EXECUTABLE:
1120	<	MakeExecutable(0, (void *)gpr(4), gpr(5));
1120	>	MakeExecutable(0, gpr(4), gpr(5));
1121		break;
1122		case NATIVE_CHECK_LOAD_INVOC:
1123		check_load_invoc(gpr(3), gpr(4), gpr(5));

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