84 |
|
// PowerPC EmulOp to exit from emulation looop |
85 |
|
const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1; |
86 |
|
|
87 |
– |
// Enable multicore (main/interrupts) cpu emulation? |
88 |
– |
#define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0) |
89 |
– |
|
87 |
|
// Enable interrupt routine safety checks? |
88 |
|
#define SAFE_INTERRUPT_PPC 1 |
89 |
|
|
469 |
|
break; |
470 |
|
} |
471 |
|
// Could we fully translate this NativeOp? |
472 |
< |
if (FN_field::test(opcode)) { |
473 |
< |
if (status != COMPILE_FAILURE) { |
472 |
> |
if (status == COMPILE_CODE_OK) { |
473 |
> |
if (!FN_field::test(opcode)) |
474 |
> |
cg_context.done_compile = false; |
475 |
> |
else { |
476 |
|
dg.gen_load_A0_LR(); |
477 |
|
dg.gen_set_PC_A0(); |
478 |
+ |
cg_context.done_compile = true; |
479 |
|
} |
480 |
– |
cg_context.done_compile = true; |
481 |
– |
break; |
482 |
– |
} |
483 |
– |
else if (status != COMPILE_FAILURE) { |
484 |
– |
cg_context.done_compile = false; |
480 |
|
break; |
481 |
|
} |
482 |
|
#if PPC_REENTRANT_JIT |
483 |
|
// Try to execute NativeOp trampoline |
484 |
< |
dg.gen_set_PC_im(cg_context.pc + 4); |
484 |
> |
if (!FN_field::test(opcode)) |
485 |
> |
dg.gen_set_PC_im(cg_context.pc + 4); |
486 |
> |
else { |
487 |
> |
dg.gen_load_A0_LR(); |
488 |
> |
dg.gen_set_PC_A0(); |
489 |
> |
} |
490 |
|
dg.gen_mov_32_T0_im(selector); |
491 |
|
dg.gen_jmp(native_op_trampoline); |
492 |
|
cg_context.done_compile = true; |
494 |
|
break; |
495 |
|
#endif |
496 |
|
// Invoke NativeOp handler |
497 |
< |
typedef void (*func_t)(dyngen_cpu_base, uint32); |
498 |
< |
func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr(); |
499 |
< |
dg.gen_invoke_CPU_im(func, selector); |
500 |
< |
cg_context.done_compile = false; |
501 |
< |
status = COMPILE_CODE_OK; |
497 |
> |
if (!FN_field::test(opcode)) { |
498 |
> |
typedef void (*func_t)(dyngen_cpu_base, uint32); |
499 |
> |
func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr(); |
500 |
> |
dg.gen_invoke_CPU_im(func, selector); |
501 |
> |
cg_context.done_compile = false; |
502 |
> |
status = COMPILE_CODE_OK; |
503 |
> |
} |
504 |
> |
// Otherwise, let it generate a call to execute_sheep() which |
505 |
> |
// will cause necessary updates to the program counter |
506 |
|
break; |
507 |
|
} |
508 |
|
|
607 |
|
depth++; |
608 |
|
#endif |
609 |
|
|
606 |
– |
#if !MULTICORE_CPU |
610 |
|
// Save program counters and branch registers |
611 |
|
uint32 saved_pc = pc(); |
612 |
|
uint32 saved_lr = lr(); |
613 |
|
uint32 saved_ctr= ctr(); |
614 |
|
uint32 saved_sp = gpr(1); |
612 |
– |
#endif |
615 |
|
|
616 |
|
// Initialize stack pointer to SheepShaver alternate stack base |
617 |
|
gpr(1) = SignalStackBase() - 64; |
651 |
|
// Enter nanokernel |
652 |
|
execute(entry); |
653 |
|
|
652 |
– |
#if !MULTICORE_CPU |
654 |
|
// Restore program counters and branch registers |
655 |
|
pc() = saved_pc; |
656 |
|
lr() = saved_lr; |
657 |
|
ctr()= saved_ctr; |
658 |
|
gpr(1) = saved_sp; |
658 |
– |
#endif |
659 |
|
|
660 |
|
#if EMUL_TIME_STATS |
661 |
|
interrupt_time += (clock() - interrupt_start); |
857 |
|
* SheepShaver CPU engine interface |
858 |
|
**/ |
859 |
|
|
860 |
< |
static sheepshaver_cpu *main_cpu = NULL; // CPU emulator to handle usual control flow |
861 |
< |
static sheepshaver_cpu *interrupt_cpu = NULL; // CPU emulator to handle interrupts |
862 |
< |
static sheepshaver_cpu *current_cpu = NULL; // Current CPU emulator context |
860 |
> |
// PowerPC CPU emulator |
861 |
> |
static sheepshaver_cpu *ppc_cpu = NULL; |
862 |
|
|
863 |
|
void FlushCodeCache(uintptr start, uintptr end) |
864 |
|
{ |
865 |
|
D(bug("FlushCodeCache(%08x, %08x)\n", start, end)); |
866 |
< |
main_cpu->invalidate_cache_range(start, end); |
868 |
< |
#if MULTICORE_CPU |
869 |
< |
interrupt_cpu->invalidate_cache_range(start, end); |
870 |
< |
#endif |
871 |
< |
} |
872 |
< |
|
873 |
< |
static inline void cpu_push(sheepshaver_cpu *new_cpu) |
874 |
< |
{ |
875 |
< |
#if MULTICORE_CPU |
876 |
< |
current_cpu = new_cpu; |
877 |
< |
#endif |
878 |
< |
} |
879 |
< |
|
880 |
< |
static inline void cpu_pop() |
881 |
< |
{ |
882 |
< |
#if MULTICORE_CPU |
883 |
< |
current_cpu = main_cpu; |
884 |
< |
#endif |
866 |
> |
ppc_cpu->invalidate_cache_range(start, end); |
867 |
|
} |
868 |
|
|
869 |
|
// Dump PPC registers |
870 |
|
static void dump_registers(void) |
871 |
|
{ |
872 |
< |
current_cpu->dump_registers(); |
872 |
> |
ppc_cpu->dump_registers(); |
873 |
|
} |
874 |
|
|
875 |
|
// Dump log |
876 |
|
static void dump_log(void) |
877 |
|
{ |
878 |
< |
current_cpu->dump_log(); |
878 |
> |
ppc_cpu->dump_log(); |
879 |
|
} |
880 |
|
|
881 |
|
/* |
898 |
|
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
899 |
|
|
900 |
|
// Get program counter of target CPU |
901 |
< |
sheepshaver_cpu * const cpu = current_cpu; |
901 |
> |
sheepshaver_cpu * const cpu = ppc_cpu; |
902 |
|
const uint32 pc = cpu->pc(); |
903 |
|
|
904 |
|
// Fault in Mac ROM or RAM? |
905 |
< |
bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize)); |
905 |
> |
bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize)) || (pc >= DR_CACHE_BASE && pc < (DR_CACHE_BASE + DR_CACHE_SIZE)); |
906 |
|
if (mac_fault) { |
907 |
|
|
908 |
|
// "VM settings" during MacOS 8 installation |
922 |
|
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
923 |
|
else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000)) |
924 |
|
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
925 |
+ |
|
926 |
+ |
// MacOS 8.6 serial drivers on startup (with DR Cache and OldWorld ROM) |
927 |
+ |
else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(16) == 0xf3012002 || cpu->gpr(16) == 0xf3012000)) |
928 |
+ |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
929 |
+ |
else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000)) |
930 |
+ |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
931 |
|
|
932 |
|
// Ignore writes to the zero page |
933 |
|
else if ((uint32)(addr - SheepMem::ZeroPage()) < (uint32)SheepMem::PageSize()) |
944 |
|
printf("SIGSEGV\n"); |
945 |
|
printf(" pc %p\n", fault_instruction); |
946 |
|
printf(" ea %p\n", fault_address); |
959 |
– |
printf(" cpu %s\n", current_cpu == main_cpu ? "main" : "interrupts"); |
947 |
|
dump_registers(); |
948 |
< |
current_cpu->dump_log(); |
948 |
> |
ppc_cpu->dump_log(); |
949 |
|
enter_mon(); |
950 |
|
QuitEmulator(); |
951 |
|
|
955 |
|
void init_emul_ppc(void) |
956 |
|
{ |
957 |
|
// Initialize main CPU emulator |
958 |
< |
main_cpu = new sheepshaver_cpu(); |
959 |
< |
main_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000)); |
960 |
< |
main_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000)); |
958 |
> |
ppc_cpu = new sheepshaver_cpu(); |
959 |
> |
ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000)); |
960 |
> |
ppc_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000)); |
961 |
|
WriteMacInt32(XLM_RUN_MODE, MODE_68K); |
962 |
|
|
976 |
– |
#if MULTICORE_CPU |
977 |
– |
// Initialize alternate CPU emulator to handle interrupts |
978 |
– |
interrupt_cpu = new sheepshaver_cpu(); |
979 |
– |
#endif |
980 |
– |
|
963 |
|
// Install the handler for SIGSEGV |
964 |
|
sigsegv_install_handler(sigsegv_handler); |
965 |
|
|
1004 |
|
printf("\n"); |
1005 |
|
#endif |
1006 |
|
|
1007 |
< |
delete main_cpu; |
1026 |
< |
#if MULTICORE_CPU |
1027 |
< |
delete interrupt_cpu; |
1028 |
< |
#endif |
1007 |
> |
delete ppc_cpu; |
1008 |
|
} |
1009 |
|
|
1010 |
|
#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT |
1039 |
|
|
1040 |
|
void emul_ppc(uint32 entry) |
1041 |
|
{ |
1063 |
– |
current_cpu = main_cpu; |
1042 |
|
#if 0 |
1043 |
< |
current_cpu->start_log(); |
1043 |
> |
ppc_cpu->start_log(); |
1044 |
|
#endif |
1045 |
|
// start emulation loop and enable code translation or caching |
1046 |
< |
current_cpu->execute(entry); |
1046 |
> |
ppc_cpu->execute(entry); |
1047 |
|
} |
1048 |
|
|
1049 |
|
/* |
1050 |
|
* Handle PowerPC interrupt |
1051 |
|
*/ |
1052 |
|
|
1075 |
– |
#if ASYNC_IRQ |
1076 |
– |
void HandleInterrupt(void) |
1077 |
– |
{ |
1078 |
– |
main_cpu->handle_interrupt(); |
1079 |
– |
} |
1080 |
– |
#else |
1053 |
|
void TriggerInterrupt(void) |
1054 |
|
{ |
1055 |
|
#if 0 |
1056 |
|
WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1); |
1057 |
|
#else |
1058 |
|
// Trigger interrupt to main cpu only |
1059 |
< |
if (main_cpu) |
1060 |
< |
main_cpu->trigger_interrupt(); |
1059 |
> |
if (ppc_cpu) |
1060 |
> |
ppc_cpu->trigger_interrupt(); |
1061 |
|
#endif |
1062 |
|
} |
1091 |
– |
#endif |
1063 |
|
|
1064 |
|
void sheepshaver_cpu::handle_interrupt(void) |
1065 |
|
{ |
1082 |
|
switch (ReadMacInt32(XLM_RUN_MODE)) { |
1083 |
|
case MODE_68K: |
1084 |
|
// 68k emulator active, trigger 68k interrupt level 1 |
1114 |
– |
assert(current_cpu == main_cpu); |
1085 |
|
WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1); |
1086 |
|
set_cr(get_cr() | tswap32(kernel_data->v[0x674 >> 2])); |
1087 |
|
break; |
1089 |
|
#if INTERRUPTS_IN_NATIVE_MODE |
1090 |
|
case MODE_NATIVE: |
1091 |
|
// 68k emulator inactive, in nanokernel? |
1122 |
– |
assert(current_cpu == main_cpu); |
1092 |
|
if (gpr(1) != KernelDataAddr && interrupt_depth == 1) { |
1093 |
|
interrupt_context ctx(this, "PowerPC mode"); |
1094 |
|
|
1100 |
|
|
1101 |
|
// Execute nanokernel interrupt routine (this will activate the 68k emulator) |
1102 |
|
DisableInterrupt(); |
1134 |
– |
cpu_push(interrupt_cpu); |
1103 |
|
if (ROMType == ROMTYPE_NEWWORLD) |
1104 |
< |
current_cpu->interrupt(ROM_BASE + 0x312b1c); |
1104 |
> |
ppc_cpu->interrupt(ROM_BASE + 0x312b1c); |
1105 |
|
else |
1106 |
< |
current_cpu->interrupt(ROM_BASE + 0x312a3c); |
1139 |
< |
cpu_pop(); |
1106 |
> |
ppc_cpu->interrupt(ROM_BASE + 0x312a3c); |
1107 |
|
} |
1108 |
|
break; |
1109 |
|
#endif |
1288 |
|
|
1289 |
|
void Execute68k(uint32 pc, M68kRegisters *r) |
1290 |
|
{ |
1291 |
< |
current_cpu->execute_68k(pc, r); |
1291 |
> |
ppc_cpu->execute_68k(pc, r); |
1292 |
|
} |
1293 |
|
|
1294 |
|
/* |
1311 |
|
|
1312 |
|
uint32 call_macos(uint32 tvect) |
1313 |
|
{ |
1314 |
< |
return current_cpu->execute_macos_code(tvect, 0, NULL); |
1314 |
> |
return ppc_cpu->execute_macos_code(tvect, 0, NULL); |
1315 |
|
} |
1316 |
|
|
1317 |
|
uint32 call_macos1(uint32 tvect, uint32 arg1) |
1318 |
|
{ |
1319 |
|
const uint32 args[] = { arg1 }; |
1320 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1320 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1321 |
|
} |
1322 |
|
|
1323 |
|
uint32 call_macos2(uint32 tvect, uint32 arg1, uint32 arg2) |
1324 |
|
{ |
1325 |
|
const uint32 args[] = { arg1, arg2 }; |
1326 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1326 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1327 |
|
} |
1328 |
|
|
1329 |
|
uint32 call_macos3(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3) |
1330 |
|
{ |
1331 |
|
const uint32 args[] = { arg1, arg2, arg3 }; |
1332 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1332 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1333 |
|
} |
1334 |
|
|
1335 |
|
uint32 call_macos4(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4) |
1336 |
|
{ |
1337 |
|
const uint32 args[] = { arg1, arg2, arg3, arg4 }; |
1338 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1338 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1339 |
|
} |
1340 |
|
|
1341 |
|
uint32 call_macos5(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5) |
1342 |
|
{ |
1343 |
|
const uint32 args[] = { arg1, arg2, arg3, arg4, arg5 }; |
1344 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1344 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1345 |
|
} |
1346 |
|
|
1347 |
|
uint32 call_macos6(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6) |
1348 |
|
{ |
1349 |
|
const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6 }; |
1350 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1350 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1351 |
|
} |
1352 |
|
|
1353 |
|
uint32 call_macos7(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6, uint32 arg7) |
1354 |
|
{ |
1355 |
|
const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6, arg7 }; |
1356 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1356 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1357 |
|
} |
1358 |
|
|
1359 |
|
/* |
1362 |
|
|
1363 |
|
void get_resource(void) |
1364 |
|
{ |
1365 |
< |
current_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE)); |
1365 |
> |
ppc_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE)); |
1366 |
|
} |
1367 |
|
|
1368 |
|
void get_1_resource(void) |
1369 |
|
{ |
1370 |
< |
current_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE)); |
1370 |
> |
ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE)); |
1371 |
|
} |
1372 |
|
|
1373 |
|
void get_ind_resource(void) |
1374 |
|
{ |
1375 |
< |
current_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE)); |
1375 |
> |
ppc_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE)); |
1376 |
|
} |
1377 |
|
|
1378 |
|
void get_1_ind_resource(void) |
1379 |
|
{ |
1380 |
< |
current_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE)); |
1380 |
> |
ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE)); |
1381 |
|
} |
1382 |
|
|
1383 |
|
void r_get_resource(void) |
1384 |
|
{ |
1385 |
< |
current_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE)); |
1385 |
> |
ppc_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE)); |
1386 |
|
} |