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root/cebix/SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.39 by gbeauche, 2004-05-20T11:05:30Z vs.
Revision 1.69 by gbeauche, 2006-05-13T17:12:18Z

#	Line 1 | Line 1
1		/*
2		*  sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface
3		*
4	<	*  SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig
4	>	*  SheepShaver (C) 1997-2005 Christian Bauer and Marc Hellwig
5		*
6		*  This program is free software; you can redistribute it and/or modify
7		*  it under the terms of the GNU General Public License as published by
#	Line 42 | Line 42
42
43		#include <stdio.h>
44		#include <stdlib.h>
45	+	#ifdef HAVE_MALLOC_H
46	+	#include <malloc.h>
47	+	#endif
48	+
49	+	#ifdef USE_SDL_VIDEO
50	+	#include <SDL_events.h>
51	+	#endif
52
53		#if ENABLE_MON
54		#include "mon.h"
#	Line 52 | Line 59
59		#include "debug.h"
60
61		// Emulation time statistics
62	<	#define EMUL_TIME_STATS 1
62	>	#ifndef EMUL_TIME_STATS
63	>	#define EMUL_TIME_STATS 0
64	>	#endif
65
66		#if EMUL_TIME_STATS
67		static clock_t emul_start_time;
68	<	static uint32 interrupt_count = 0;
68	>	static uint32 interrupt_count = 0, ppc_interrupt_count = 0;
69		static clock_t interrupt_time = 0;
70		static uint32 exec68k_count = 0;
71		static clock_t exec68k_time = 0;
#	Line 80 | Line 89 | extern uintptr SignalStackBase();
89
90		// From rsrc_patches.cpp
91		extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
92	+	extern "C" void named_check_load_invoc(uint32 type, uint32 name, uint32 h);
93
94		// PowerPC EmulOp to exit from emulation looop
95		const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1;
96
87	–	// Enable multicore (main/interrupts) cpu emulation?
88	–	#define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0)
89	–
90	–	// Enable interrupt routine safety checks?
91	–	#define SAFE_INTERRUPT_PPC 1
92	–
97		// Enable Execute68k() safety checks?
98		#define SAFE_EXEC_68K 1
99
#	Line 102 | Line 106 | const uint32 POWERPC_EXEC_RETURN = POWER
106		// Interrupts in native mode?
107		#define INTERRUPTS_IN_NATIVE_MODE 1
108
105	–	// Enable native EMUL_OPs to be run without a mode switch
106	–	#define ENABLE_NATIVE_EMUL_OP 1
107	–
109		// Pointer to Kernel Data
110	<	static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE;
110	>	static KernelData * kernel_data;
111
112		// SIGSEGV handler
113	<	static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
113	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
114
115		#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
116		// Special trampolines for EmulOp and NativeOp
#	Line 139 | Line 140 | class sheepshaver_cpu
140		void init_decoder();
141		void execute_sheep(uint32 opcode);
142
142	–	// Filter out EMUL_OP routines that only call native code
143	–	bool filter_execute_emul_op(uint32 emul_op);
144	–
145	–	// "Native" EMUL_OP routines
146	–	void execute_emul_op_microseconds();
147	–	void execute_emul_op_idle_time_1();
148	–	void execute_emul_op_idle_time_2();
149	–
150	–	// CPU context to preserve on interrupt
151	–	class interrupt_context {
152	–	uint32 gpr[32];
153	–	uint32 pc;
154	–	uint32 lr;
155	–	uint32 ctr;
156	–	uint32 cr;
157	–	uint32 xer;
158	–	sheepshaver_cpu *cpu;
159	–	const char *where;
160	–	public:
161	–	interrupt_context(sheepshaver_cpu *_cpu, const char *_where);
162	–	~interrupt_context();
163	–	};
164	–
143		public:
144
145		// Constructor
#	Line 188 | Line 166 | public:
166		// Execute MacOS/PPC code
167		uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args);
168
169	+	#if PPC_ENABLE_JIT
170		// Compile one instruction
171		virtual int compile1(codegen_context_t & cg_context);
172	<
172	>	#endif
173		// Resource manager thunk
174		void get_resource(uint32 old_get_resource);
175
176		// Handle MacOS interrupt
177		void interrupt(uint32 entry);
199	–	void handle_interrupt();
178
179		// Make sure the SIGSEGV handler can access CPU registers
180		friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
181		};
182
205	–	// Memory allocator returning areas aligned on 16-byte boundaries
206	–	void *operator new(size_t size)
207	–	{
208	–	void *p;
209	–
210	–	#if defined(HAVE_POSIX_MEMALIGN)
211	–	if (posix_memalign(&p, 16, size) != 0)
212	–	throw std::bad_alloc();
213	–	#elif defined(HAVE_MEMALIGN)
214	–	p = memalign(16, size);
215	–	#elif defined(HAVE_VALLOC)
216	–	p = valloc(size); // page-aligned!
217	–	#else
218	–	/* XXX: handle padding ourselves */
219	–	p = malloc(size);
220	–	#endif
221	–
222	–	return p;
223	–	}
224	–
225	–	void operator delete(void *p)
226	–	{
227	–	#if defined(HAVE_MEMALIGN) || defined(HAVE_VALLOC)
228	–	#if defined(__GLIBC__)
229	–	// this is known to work only with GNU libc
230	–	free(p);
231	–	#endif
232	–	#else
233	–	free(p);
234	–	#endif
235	–	}
236	–
183		sheepshaver_cpu::sheepshaver_cpu()
184		: powerpc_cpu(enable_jit_p())
185		{
#	Line 271 | Line 217 | typedef bit_field< 19, 19 > FN_field;
217		typedef bit_field< 20, 25 > NATIVE_OP_field;
218		typedef bit_field< 26, 31 > EMUL_OP_field;
219
274	–	// "Native" EMUL_OP routines
275	–	#define GPR_A(REG) gpr(16 + (REG))
276	–	#define GPR_D(REG) gpr( 8 + (REG))
277	–
278	–	void sheepshaver_cpu::execute_emul_op_microseconds()
279	–	{
280	–	Microseconds(GPR_A(0), GPR_D(0));
281	–	}
282	–
283	–	void sheepshaver_cpu::execute_emul_op_idle_time_1()
284	–	{
285	–	// Sleep if no events pending
286	–	if (ReadMacInt32(0x14c) == 0)
287	–	Delay_usec(16667);
288	–	GPR_A(0) = ReadMacInt32(0x2b6);
289	–	}
290	–
291	–	void sheepshaver_cpu::execute_emul_op_idle_time_2()
292	–	{
293	–	// Sleep if no events pending
294	–	if (ReadMacInt32(0x14c) == 0)
295	–	Delay_usec(16667);
296	–	GPR_D(0) = (uint32)-2;
297	–	}
298	–
299	–	// Filter out EMUL_OP routines that only call native code
300	–	bool sheepshaver_cpu::filter_execute_emul_op(uint32 emul_op)
301	–	{
302	–	switch (emul_op) {
303	–	case OP_MICROSECONDS:
304	–	execute_emul_op_microseconds();
305	–	return true;
306	–	case OP_IDLE_TIME:
307	–	execute_emul_op_idle_time_1();
308	–	return true;
309	–	case OP_IDLE_TIME_2:
310	–	execute_emul_op_idle_time_2();
311	–	return true;
312	–	}
313	–	return false;
314	–	}
315	–
220		// Execute EMUL_OP routine
221		void sheepshaver_cpu::execute_emul_op(uint32 emul_op)
222		{
319	–	#if ENABLE_NATIVE_EMUL_OP
320	–	// First, filter out EMUL_OPs that can be executed without a mode switch
321	–	if (filter_execute_emul_op(emul_op))
322	–	return;
323	–	#endif
324	–
223		M68kRegisters r68;
224		WriteMacInt32(XLM_68K_R25, gpr(25));
225		WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
#	Line 330 | Line 228 | void sheepshaver_cpu::execute_emul_op(ui
228		for (int i = 0; i < 7; i++)
229		r68.a[i] = gpr(16 + i);
230		r68.a[7] = gpr(1);
231	<	uint32 saved_cr = get_cr() & CR_field<2>::mask();
231	>	uint32 saved_cr = get_cr() & 0xff9fffff; // mask_operand::compute(11, 8)
232		uint32 saved_xer = get_xer();
233		EmulOp(&r68, gpr(24), emul_op);
234		set_cr(saved_cr);
#	Line 374 | Line 272 | void sheepshaver_cpu::execute_sheep(uint
272		}
273
274		// Compile one instruction
275	+	#if PPC_ENABLE_JIT
276		int sheepshaver_cpu::compile1(codegen_context_t & cg_context)
277		{
379	–	#if PPC_ENABLE_JIT
278		const instr_info_t *ii = cg_context.instr_info;
279		if (ii->mnemo != PPC_I(SHEEP))
280		return COMPILE_FAILURE;
#	Line 446 | Line 344 | int sheepshaver_cpu::compile1(codegen_co
344		dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))check_load_invoc);
345		status = COMPILE_CODE_OK;
346		break;
347	<	#endif
348	<	case NATIVE_DISABLE_INTERRUPT:
349	<	dg.gen_invoke(DisableInterrupt);
350	<	status = COMPILE_CODE_OK;
351	<	break;
454	<	case NATIVE_ENABLE_INTERRUPT:
455	<	dg.gen_invoke(EnableInterrupt);
347	>	case NATIVE_NAMED_CHECK_LOAD_INVOC:
348	>	dg.gen_load_T0_GPR(3);
349	>	dg.gen_load_T1_GPR(4);
350	>	dg.gen_load_T2_GPR(5);
351	>	dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))named_check_load_invoc);
352		status = COMPILE_CODE_OK;
353		break;
354	<	case NATIVE_BITBLT:
354	>	#endif
355	>	case NATIVE_NQD_BITBLT:
356		dg.gen_load_T0_GPR(3);
357		dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt);
358		status = COMPILE_CODE_OK;
359		break;
360	<	case NATIVE_INVRECT:
360	>	case NATIVE_NQD_INVRECT:
361		dg.gen_load_T0_GPR(3);
362		dg.gen_invoke_T0((void (*)(uint32))NQD_invrect);
363		status = COMPILE_CODE_OK;
364		break;
365	<	case NATIVE_FILLRECT:
365	>	case NATIVE_NQD_FILLRECT:
366		dg.gen_load_T0_GPR(3);
367		dg.gen_invoke_T0((void (*)(uint32))NQD_fillrect);
368		status = COMPILE_CODE_OK;
369		break;
370		}
371		// Could we fully translate this NativeOp?
372	<	if (FN_field::test(opcode)) {
373	<	if (status != COMPILE_FAILURE) {
372	>	if (status == COMPILE_CODE_OK) {
373	>	if (!FN_field::test(opcode))
374	>	cg_context.done_compile = false;
375	>	else {
376		dg.gen_load_A0_LR();
377		dg.gen_set_PC_A0();
378	+	cg_context.done_compile = true;
379		}
480	–	cg_context.done_compile = true;
481	–	break;
482	–	}
483	–	else if (status != COMPILE_FAILURE) {
484	–	cg_context.done_compile = false;
380		break;
381		}
382		#if PPC_REENTRANT_JIT
383		// Try to execute NativeOp trampoline
384	<	dg.gen_set_PC_im(cg_context.pc + 4);
384	>	if (!FN_field::test(opcode))
385	>	dg.gen_set_PC_im(cg_context.pc + 4);
386	>	else {
387	>	dg.gen_load_A0_LR();
388	>	dg.gen_set_PC_A0();
389	>	}
390		dg.gen_mov_32_T0_im(selector);
391		dg.gen_jmp(native_op_trampoline);
392		cg_context.done_compile = true;
#	Line 494 | Line 394 | int sheepshaver_cpu::compile1(codegen_co
394		break;
395		#endif
396		// Invoke NativeOp handler
397	<	typedef void (*func_t)(dyngen_cpu_base, uint32);
398	<	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
399	<	dg.gen_invoke_CPU_im(func, selector);
400	<	cg_context.done_compile = false;
401	<	status = COMPILE_CODE_OK;
397	>	if (!FN_field::test(opcode)) {
398	>	typedef void (*func_t)(dyngen_cpu_base, uint32);
399	>	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
400	>	dg.gen_invoke_CPU_im(func, selector);
401	>	cg_context.done_compile = false;
402	>	status = COMPILE_CODE_OK;
403	>	}
404	>	// Otherwise, let it generate a call to execute_sheep() which
405	>	// will cause necessary updates to the program counter
406		break;
407		}
408
409		default: {      // EMUL_OP
410		uint32 emul_op = EMUL_OP_field::extract(opcode) - 3;
507	–	#if ENABLE_NATIVE_EMUL_OP
508	–	typedef void (*emul_op_func_t)(dyngen_cpu_base);
509	–	emul_op_func_t emul_op_func = 0;
510	–	switch (emul_op) {
511	–	case OP_MICROSECONDS:
512	–	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_microseconds).ptr();
513	–	break;
514	–	case OP_IDLE_TIME:
515	–	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_1).ptr();
516	–	break;
517	–	case OP_IDLE_TIME_2:
518	–	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_2).ptr();
519	–	break;
520	–	}
521	–	if (emul_op_func) {
522	–	dg.gen_invoke_CPU(emul_op_func);
523	–	cg_context.done_compile = false;
524	–	status = COMPILE_CODE_OK;
525	–	break;
526	–	}
527	–	#endif
411		#if PPC_REENTRANT_JIT
412		// Try to execute EmulOp trampoline
413		dg.gen_set_PC_im(cg_context.pc + 4);
#	Line 544 | Line 427 | int sheepshaver_cpu::compile1(codegen_co
427		}
428		}
429		return status;
547	–	#endif
548	–	return COMPILE_FAILURE;
549	–	}
550	–
551	–	// CPU context to preserve on interrupt
552	–	sheepshaver_cpu::interrupt_context::interrupt_context(sheepshaver_cpu *_cpu, const char *_where)
553	–	{
554	–	#if SAFE_INTERRUPT_PPC >= 2
555	–	cpu = _cpu;
556	–	where = _where;
557	–
558	–	// Save interrupt context
559	–	memcpy(&gpr[0], &cpu->gpr(0), sizeof(gpr));
560	–	pc = cpu->pc();
561	–	lr = cpu->lr();
562	–	ctr = cpu->ctr();
563	–	cr = cpu->get_cr();
564	–	xer = cpu->get_xer();
565	–	#endif
430		}
567	–
568	–	sheepshaver_cpu::interrupt_context::~interrupt_context()
569	–	{
570	–	#if SAFE_INTERRUPT_PPC >= 2
571	–	// Check whether CPU context was preserved by interrupt
572	–	if (memcmp(&gpr[0], &cpu->gpr(0), sizeof(gpr)) != 0) {
573	–	printf("FATAL: %s: interrupt clobbers registers\n", where);
574	–	for (int i = 0; i < 32; i++)
575	–	if (gpr[i] != cpu->gpr(i))
576	–	printf(" r%d: %08x -> %08x\n", i, gpr[i], cpu->gpr(i));
577	–	}
578	–	if (pc != cpu->pc())
579	–	printf("FATAL: %s: interrupt clobbers PC\n", where);
580	–	if (lr != cpu->lr())
581	–	printf("FATAL: %s: interrupt clobbers LR\n", where);
582	–	if (ctr != cpu->ctr())
583	–	printf("FATAL: %s: interrupt clobbers CTR\n", where);
584	–	if (cr != cpu->get_cr())
585	–	printf("FATAL: %s: interrupt clobbers CR\n", where);
586	–	if (xer != cpu->get_xer())
587	–	printf("FATAL: %s: interrupt clobbers XER\n", where);
431		#endif
589	–	}
432
433		// Handle MacOS interrupt
434		void sheepshaver_cpu::interrupt(uint32 entry)
435		{
436		#if EMUL_TIME_STATS
437	<	interrupt_count++;
437	>	ppc_interrupt_count++;
438		const clock_t interrupt_start = clock();
439		#endif
440
599	–	#if SAFE_INTERRUPT_PPC
600	–	static int depth = 0;
601	–	if (depth != 0)
602	–	printf("FATAL: sheepshaver_cpu::interrupt() called more than once: %d\n", depth);
603	–	depth++;
604	–	#endif
605	–
606	–	#if !MULTICORE_CPU
441		// Save program counters and branch registers
442		uint32 saved_pc = pc();
443		uint32 saved_lr = lr();
444		uint32 saved_ctr= ctr();
445		uint32 saved_sp = gpr(1);
612	–	#endif
446
447		// Initialize stack pointer to SheepShaver alternate stack base
448		gpr(1) = SignalStackBase() - 64;
#	Line 649 | Line 482 | void sheepshaver_cpu::interrupt(uint32 e
482		// Enter nanokernel
483		execute(entry);
484
652	–	#if !MULTICORE_CPU
485		// Restore program counters and branch registers
486		pc() = saved_pc;
487		lr() = saved_lr;
488		ctr()= saved_ctr;
489		gpr(1) = saved_sp;
658	–	#endif
490
491		#if EMUL_TIME_STATS
492		interrupt_time += (clock() - interrupt_start);
493		#endif
663	–
664	–	#if SAFE_INTERRUPT_PPC
665	–	depth--;
666	–	#endif
494		}
495
496		// Execute 68k routine
#	Line 857 | Line 684 | inline void sheepshaver_cpu::get_resourc
684		*              SheepShaver CPU engine interface
685		**/
686
687	<	static sheepshaver_cpu *main_cpu = NULL;                // CPU emulator to handle usual control flow
688	<	static sheepshaver_cpu *interrupt_cpu = NULL;   // CPU emulator to handle interrupts
862	<	static sheepshaver_cpu *current_cpu = NULL;             // Current CPU emulator context
687	>	// PowerPC CPU emulator
688	>	static sheepshaver_cpu *ppc_cpu = NULL;
689
690		void FlushCodeCache(uintptr start, uintptr end)
691		{
692		D(bug("FlushCodeCache(%08x, %08x)\n", start, end));
693	<	main_cpu->invalidate_cache_range(start, end);
868	<	#if MULTICORE_CPU
869	<	interrupt_cpu->invalidate_cache_range(start, end);
870	<	#endif
871	<	}
872	<
873	<	static inline void cpu_push(sheepshaver_cpu *new_cpu)
874	<	{
875	<	#if MULTICORE_CPU
876	<	current_cpu = new_cpu;
877	<	#endif
878	<	}
879	<
880	<	static inline void cpu_pop()
881	<	{
882	<	#if MULTICORE_CPU
883	<	current_cpu = main_cpu;
884	<	#endif
693	>	ppc_cpu->invalidate_cache_range(start, end);
694		}
695
696		// Dump PPC registers
697		static void dump_registers(void)
698		{
699	<	current_cpu->dump_registers();
699	>	ppc_cpu->dump_registers();
700		}
701
702		// Dump log
703		static void dump_log(void)
704		{
705	<	current_cpu->dump_log();
705	>	ppc_cpu->dump_log();
706		}
707
708		/*
709		*  Initialize CPU emulation
710		*/
711
712	<	static sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
712	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
713		{
714		#if ENABLE_VOSF
715		// Handle screen fault
#	Line 912 | Line 721 | static sigsegv_return_t sigsegv_handler(
721		const uintptr addr = (uintptr)fault_address;
722		#if HAVE_SIGSEGV_SKIP_INSTRUCTION
723		// Ignore writes to ROM
724	<	if ((addr - ROM_BASE) < ROM_SIZE)
724	>	if ((addr - (uintptr)ROMBaseHost) < ROM_SIZE)
725		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
726
727		// Get program counter of target CPU
728	<	sheepshaver_cpu * const cpu = current_cpu;
728	>	sheepshaver_cpu * const cpu = ppc_cpu;
729		const uint32 pc = cpu->pc();
730
731		// Fault in Mac ROM or RAM?
732	<	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize));
732	>	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize)) || (pc >= DR_CACHE_BASE && pc < (DR_CACHE_BASE + DR_CACHE_SIZE));
733		if (mac_fault) {
734
735		// "VM settings" during MacOS 8 installation
#	Line 940 | Line 749 | static sigsegv_return_t sigsegv_handler(
749		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
750		else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
751		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
752	+
753	+	// MacOS 8.6 serial drivers on startup (with DR Cache and OldWorld ROM)
754	+	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(16) == 0xf3012002 || cpu->gpr(16) == 0xf3012000))
755	+	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
756	+	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
757	+	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
758
759		// Ignore writes to the zero page
760		else if ((uint32)(addr - SheepMem::ZeroPage()) < (uint32)SheepMem::PageSize())
#	Line 953 | Line 768 | static sigsegv_return_t sigsegv_handler(
768		#error "FIXME: You don't have the capability to skip instruction within signal handlers"
769		#endif
770
771	<	printf("SIGSEGV\n");
772	<	printf("  pc %p\n", fault_instruction);
773	<	printf("  ea %p\n", fault_address);
959	<	printf(" cpu %s\n", current_cpu == main_cpu ? "main" : "interrupts");
771	>	fprintf(stderr, "SIGSEGV\n");
772	>	fprintf(stderr, "  pc %p\n", fault_instruction);
773	>	fprintf(stderr, "  ea %p\n", fault_address);
774		dump_registers();
775	<	current_cpu->dump_log();
775	>	ppc_cpu->dump_log();
776		enter_mon();
777		QuitEmulator();
778
#	Line 967 | Line 781 | static sigsegv_return_t sigsegv_handler(
781
782		void init_emul_ppc(void)
783		{
784	+	// Get pointer to KernelData in host address space
785	+	kernel_data = (KernelData *)Mac2HostAddr(KERNEL_DATA_BASE);
786	+
787		// Initialize main CPU emulator
788	<	main_cpu = new sheepshaver_cpu();
789	<	main_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
790	<	main_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
788	>	ppc_cpu = new sheepshaver_cpu();
789	>	ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
790	>	ppc_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
791		WriteMacInt32(XLM_RUN_MODE, MODE_68K);
792
976	–	#if MULTICORE_CPU
977	–	// Initialize alternate CPU emulator to handle interrupts
978	–	interrupt_cpu = new sheepshaver_cpu();
979	–	#endif
980	–
981	–	// Install the handler for SIGSEGV
982	–	sigsegv_install_handler(sigsegv_handler);
983	–
793		#if ENABLE_MON
794		// Install "regs" command in cxmon
795		mon_add_command("regs", dump_registers, "regs                     Dump PowerPC registers\n");
#	Line 1006 | Line 815 | void exit_emul_ppc(void)
815		printf("Total emulation time : %.1f sec\n", double(emul_time) / double(CLOCKS_PER_SEC));
816		printf("Total interrupt count: %d (%2.1f Hz)\n", interrupt_count,
817		(double(interrupt_count) * CLOCKS_PER_SEC) / double(emul_time));
818	+	printf("Total ppc interrupt count: %d (%2.1f %%)\n", ppc_interrupt_count,
819	+	(double(ppc_interrupt_count) * 100.0) / double(interrupt_count));
820
821		#define PRINT_STATS(LABEL, VAR_PREFIX) do {                                                             \
822		printf("Total " LABEL " count : %d\n", VAR_PREFIX##_count);             \
#	Line 1022 | Line 833 | void exit_emul_ppc(void)
833		printf("\n");
834		#endif
835
836	<	delete main_cpu;
837	<	#if MULTICORE_CPU
1027	<	delete interrupt_cpu;
1028	<	#endif
836	>	delete ppc_cpu;
837	>	ppc_cpu = NULL;
838		}
839
840		#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
#	Line 1060 | Line 869 | void init_emul_op_trampolines(basic_dyng
869
870		void emul_ppc(uint32 entry)
871		{
1063	–	current_cpu = main_cpu;
872		#if 0
873	<	current_cpu->start_log();
873	>	ppc_cpu->start_log();
874		#endif
875		// start emulation loop and enable code translation or caching
876	<	current_cpu->execute(entry);
876	>	ppc_cpu->execute(entry);
877		}
878
879		/*
880		*  Handle PowerPC interrupt
881		*/
882
1075	–	#if ASYNC_IRQ
1076	–	void HandleInterrupt(void)
1077	–	{
1078	–	main_cpu->handle_interrupt();
1079	–	}
1080	–	#else
883		void TriggerInterrupt(void)
884		{
885	+	idle_resume();
886		#if 0
887		WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1);
888		#else
889		// Trigger interrupt to main cpu only
890	<	if (main_cpu)
891	<	main_cpu->trigger_interrupt();
890	>	if (ppc_cpu)
891	>	ppc_cpu->trigger_interrupt();
892		#endif
893		}
1091	–	#endif
894
895	<	void sheepshaver_cpu::handle_interrupt(void)
895	>	void HandleInterrupt(powerpc_registers *r)
896		{
897	<	// Do nothing if interrupts are disabled
898	<	if (*(int32 *)XLM_IRQ_NEST > 0)
899	<	return;
897	>	#ifdef USE_SDL_VIDEO
898	>	// We must fill in the events queue in the same thread that did call SDL_SetVideoMode()
899	>	SDL_PumpEvents();
900	>	#endif
901
902	<	// Do nothing if there is no interrupt pending
903	<	if (InterruptFlags == 0)
902	>	// Do nothing if interrupts are disabled
903	>	if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0)
904		return;
905
906	<	// Disable MacOS stack sniffer
907	<	WriteMacInt32(0x110, 0);
906	>	// Update interrupt count
907	>	#if EMUL_TIME_STATS
908	>	interrupt_count++;
909	>	#endif
910
911		// Interrupt action depends on current run mode
912		switch (ReadMacInt32(XLM_RUN_MODE)) {
913		case MODE_68K:
914		// 68k emulator active, trigger 68k interrupt level 1
1110	–	assert(current_cpu == main_cpu);
915		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
916	<	set_cr(get_cr() | tswap32(kernel_data->v[0x674 >> 2]));
916	>	r->cr.set(r->cr.get() | tswap32(kernel_data->v[0x674 >> 2]));
917		break;
918
919		#if INTERRUPTS_IN_NATIVE_MODE
920		case MODE_NATIVE:
921		// 68k emulator inactive, in nanokernel?
922	<	assert(current_cpu == main_cpu);
1119	<	if (gpr(1) != KernelDataAddr) {
1120	<	interrupt_context ctx(this, "PowerPC mode");
922	>	if (r->gpr[1] != KernelDataAddr) {
923
924		// Prepare for 68k interrupt level 1
925		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
#	Line 1127 | Line 929 | void sheepshaver_cpu::handle_interrupt(v
929
930		// Execute nanokernel interrupt routine (this will activate the 68k emulator)
931		DisableInterrupt();
1130	–	cpu_push(interrupt_cpu);
932		if (ROMType == ROMTYPE_NEWWORLD)
933	<	current_cpu->interrupt(ROM_BASE + 0x312b1c);
933	>	ppc_cpu->interrupt(ROM_BASE + 0x312b1c);
934		else
935	<	current_cpu->interrupt(ROM_BASE + 0x312a3c);
1135	<	cpu_pop();
935	>	ppc_cpu->interrupt(ROM_BASE + 0x312a3c);
936		}
937		break;
938		#endif
#	Line 1141 | Line 941 | void sheepshaver_cpu::handle_interrupt(v
941		case MODE_EMUL_OP:
942		// 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0
943		if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) {
944	<	interrupt_context ctx(this, "68k mode");
944	>	#if EMUL_TIME_STATS
945	>	const clock_t interrupt_start = clock();
946	>	#endif
947		#if 1
948		// Execute full 68k interrupt routine
949		M68kRegisters r;
950		uint32 old_r25 = ReadMacInt32(XLM_68K_R25);     // Save interrupt level
951		WriteMacInt32(XLM_68K_R25, 0x21);                       // Execute with interrupt level 1
952	<	static const uint8 proc[] = {
952	>	static const uint8 proc_template[] = {
953		0x3f, 0x3c, 0x00, 0x00,                 // move.w       #$0000,-(sp)    (fake format word)
954		0x48, 0x7a, 0x00, 0x0a,                 // pea          @1(pc)                  (return address)
955		0x40, 0xe7,                                             // move         sr,-(sp)                (saved SR)
#	Line 1155 | Line 957 | void sheepshaver_cpu::handle_interrupt(v
957		0x4e, 0xd0,                                             // jmp          (a0)
958		M68K_RTS >> 8, M68K_RTS & 0xff  // @1
959		};
960	<	Execute68k((uint32)proc, &r);
960	>	BUILD_SHEEPSHAVER_PROCEDURE(proc);
961	>	Execute68k(proc, &r);
962		WriteMacInt32(XLM_68K_R25, old_r25);            // Restore interrupt level
963		#else
964		// Only update cursor
#	Line 1167 | Line 970 | void sheepshaver_cpu::handle_interrupt(v
970		}
971		}
972		#endif
973	+	#if EMUL_TIME_STATS
974	+	interrupt_time += (clock() - interrupt_start);
975	+	#endif
976		}
977		break;
978		#endif
979		}
980		}
981
1176	–	static void get_resource(void);
1177	–	static void get_1_resource(void);
1178	–	static void get_ind_resource(void);
1179	–	static void get_1_ind_resource(void);
1180	–	static void r_get_resource(void);
1181	–
982		// Execute NATIVE_OP routine
983		void sheepshaver_cpu::execute_native_op(uint32 selector)
984		{
#	Line 1198 | Line 998 | void sheepshaver_cpu::execute_native_op(
998		VideoVBL();
999		break;
1000		case NATIVE_VIDEO_DO_DRIVER_IO:
1001	<	gpr(3) = (int32)(int16)VideoDoDriverIO((void *)gpr(3), (void *)gpr(4),
1002	<	(void *)gpr(5), gpr(6), gpr(7));
1001	>	gpr(3) = (int32)(int16)VideoDoDriverIO(gpr(3), gpr(4), gpr(5), gpr(6), gpr(7));
1002	>	break;
1003	>	case NATIVE_ETHER_AO_GET_HWADDR:
1004	>	AO_get_ethernet_address(gpr(3));
1005	>	break;
1006	>	case NATIVE_ETHER_AO_ADD_MULTI:
1007	>	AO_enable_multicast(gpr(3));
1008	>	break;
1009	>	case NATIVE_ETHER_AO_DEL_MULTI:
1010	>	AO_disable_multicast(gpr(3));
1011	>	break;
1012	>	case NATIVE_ETHER_AO_SEND_PACKET:
1013	>	AO_transmit_packet(gpr(3));
1014		break;
1204	–	#ifdef WORDS_BIGENDIAN
1015		case NATIVE_ETHER_IRQ:
1016		EtherIRQ();
1017		break;
#	Line 1223 | Line 1033 | void sheepshaver_cpu::execute_native_op(
1033		case NATIVE_ETHER_RSRV:
1034		gpr(3) = ether_rsrv((queue_t *)gpr(3));
1035		break;
1036	<	#else
1227	<	case NATIVE_ETHER_INIT:
1228	<	// FIXME: needs more complicated thunks
1229	<	gpr(3) = false;
1230	<	break;
1231	<	#endif
1232	<	case NATIVE_SYNC_HOOK:
1036	>	case NATIVE_NQD_SYNC_HOOK:
1037		gpr(3) = NQD_sync_hook(gpr(3));
1038		break;
1039	<	case NATIVE_BITBLT_HOOK:
1039	>	case NATIVE_NQD_BITBLT_HOOK:
1040		gpr(3) = NQD_bitblt_hook(gpr(3));
1041		break;
1042	<	case NATIVE_BITBLT:
1042	>	case NATIVE_NQD_BITBLT:
1043		NQD_bitblt(gpr(3));
1044		break;
1045	<	case NATIVE_FILLRECT_HOOK:
1045	>	case NATIVE_NQD_FILLRECT_HOOK:
1046		gpr(3) = NQD_fillrect_hook(gpr(3));
1047		break;
1048	<	case NATIVE_INVRECT:
1048	>	case NATIVE_NQD_INVRECT:
1049		NQD_invrect(gpr(3));
1050		break;
1051	<	case NATIVE_FILLRECT:
1051	>	case NATIVE_NQD_FILLRECT:
1052		NQD_fillrect(gpr(3));
1053		break;
1054		case NATIVE_SERIAL_NOTHING:
#	Line 1268 | Line 1072 | void sheepshaver_cpu::execute_native_op(
1072		break;
1073		}
1074		case NATIVE_GET_RESOURCE:
1075	+	get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1076	+	break;
1077		case NATIVE_GET_1_RESOURCE:
1078	+	get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1079	+	break;
1080		case NATIVE_GET_IND_RESOURCE:
1081	<	case NATIVE_GET_1_IND_RESOURCE:
1274	<	case NATIVE_R_GET_RESOURCE: {
1275	<	typedef void (*GetResourceCallback)(void);
1276	<	static const GetResourceCallback get_resource_callbacks[] = {
1277	<	::get_resource,
1278	<	::get_1_resource,
1279	<	::get_ind_resource,
1280	<	::get_1_ind_resource,
1281	<	::r_get_resource
1282	<	};
1283	<	get_resource_callbacks[selector - NATIVE_GET_RESOURCE]();
1081	>	get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1082		break;
1083	<	}
1084	<	case NATIVE_DISABLE_INTERRUPT:
1287	<	DisableInterrupt();
1083	>	case NATIVE_GET_1_IND_RESOURCE:
1084	>	get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1085		break;
1086	<	case NATIVE_ENABLE_INTERRUPT:
1087	<	EnableInterrupt();
1086	>	case NATIVE_R_GET_RESOURCE:
1087	>	get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1088		break;
1089		case NATIVE_MAKE_EXECUTABLE:
1090	<	MakeExecutable(0, (void *)gpr(4), gpr(5));
1090	>	MakeExecutable(0, gpr(4), gpr(5));
1091		break;
1092		case NATIVE_CHECK_LOAD_INVOC:
1093		check_load_invoc(gpr(3), gpr(4), gpr(5));
1094		break;
1095	+	case NATIVE_NAMED_CHECK_LOAD_INVOC:
1096	+	named_check_load_invoc(gpr(3), gpr(4), gpr(5));
1097	+	break;
1098		default:
1099		printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector);
1100		QuitEmulator();
#	Line 1314 | Line 1114 | void sheepshaver_cpu::execute_native_op(
1114
1115		void Execute68k(uint32 pc, M68kRegisters *r)
1116		{
1117	<	current_cpu->execute_68k(pc, r);
1117	>	ppc_cpu->execute_68k(pc, r);
1118		}
1119
1120		/*
#	Line 1337 | Line 1137 | void Execute68kTrap(uint16 trap, M68kReg
1137
1138		uint32 call_macos(uint32 tvect)
1139		{
1140	<	return current_cpu->execute_macos_code(tvect, 0, NULL);
1140	>	return ppc_cpu->execute_macos_code(tvect, 0, NULL);
1141		}
1142
1143		uint32 call_macos1(uint32 tvect, uint32 arg1)
1144		{
1145		const uint32 args[] = { arg1 };
1146	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1146	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1147		}
1148
1149		uint32 call_macos2(uint32 tvect, uint32 arg1, uint32 arg2)
1150		{
1151		const uint32 args[] = { arg1, arg2 };
1152	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1152	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1153		}
1154
1155		uint32 call_macos3(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3)
1156		{
1157		const uint32 args[] = { arg1, arg2, arg3 };
1158	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1158	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1159		}
1160
1161		uint32 call_macos4(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4)
1162		{
1163		const uint32 args[] = { arg1, arg2, arg3, arg4 };
1164	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1164	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1165		}
1166
1167		uint32 call_macos5(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5)
1168		{
1169		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5 };
1170	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1170	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1171		}
1172
1173		uint32 call_macos6(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6)
1174		{
1175		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6 };
1176	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1176	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1177		}
1178
1179		uint32 call_macos7(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6, uint32 arg7)
1180		{
1181		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6, arg7 };
1182	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1383	<	}
1384	<
1385	<	/*
1386	<	*  Resource Manager thunks
1387	<	*/
1388	<
1389	<	void get_resource(void)
1390	<	{
1391	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1392	<	}
1393	<
1394	<	void get_1_resource(void)
1395	<	{
1396	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1397	<	}
1398	<
1399	<	void get_ind_resource(void)
1400	<	{
1401	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1402	<	}
1403	<
1404	<	void get_1_ind_resource(void)
1405	<	{
1406	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1407	<	}
1408	<
1409	<	void r_get_resource(void)
1410	<	{
1411	<	current_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1182	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1183		}

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