43 |
|
#include <stdio.h> |
44 |
|
#include <stdlib.h> |
45 |
|
|
46 |
+ |
#ifdef USE_SDL_VIDEO |
47 |
+ |
#include <SDL_events.h> |
48 |
+ |
#endif |
49 |
+ |
|
50 |
|
#if ENABLE_MON |
51 |
|
#include "mon.h" |
52 |
|
#include "mon_disass.h" |
56 |
|
#include "debug.h" |
57 |
|
|
58 |
|
// Emulation time statistics |
59 |
< |
#define EMUL_TIME_STATS 1 |
59 |
> |
#ifndef EMUL_TIME_STATS |
60 |
> |
#define EMUL_TIME_STATS 0 |
61 |
> |
#endif |
62 |
|
|
63 |
|
#if EMUL_TIME_STATS |
64 |
|
static clock_t emul_start_time; |
65 |
< |
static uint32 interrupt_count = 0; |
65 |
> |
static uint32 interrupt_count = 0, ppc_interrupt_count = 0; |
66 |
|
static clock_t interrupt_time = 0; |
67 |
|
static uint32 exec68k_count = 0; |
68 |
|
static clock_t exec68k_time = 0; |
90 |
|
// PowerPC EmulOp to exit from emulation looop |
91 |
|
const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1; |
92 |
|
|
87 |
– |
// Enable multicore (main/interrupts) cpu emulation? |
88 |
– |
#define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0) |
89 |
– |
|
93 |
|
// Enable interrupt routine safety checks? |
94 |
|
#define SAFE_INTERRUPT_PPC 1 |
95 |
|
|
105 |
|
// Interrupts in native mode? |
106 |
|
#define INTERRUPTS_IN_NATIVE_MODE 1 |
107 |
|
|
105 |
– |
// Enable native EMUL_OPs to be run without a mode switch |
106 |
– |
#define ENABLE_NATIVE_EMUL_OP 1 |
107 |
– |
|
108 |
|
// Pointer to Kernel Data |
109 |
< |
static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE; |
109 |
> |
static KernelData * kernel_data; |
110 |
|
|
111 |
|
// SIGSEGV handler |
112 |
< |
static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t); |
112 |
> |
sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t); |
113 |
|
|
114 |
|
#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT |
115 |
|
// Special trampolines for EmulOp and NativeOp |
139 |
|
void init_decoder(); |
140 |
|
void execute_sheep(uint32 opcode); |
141 |
|
|
142 |
– |
// Filter out EMUL_OP routines that only call native code |
143 |
– |
bool filter_execute_emul_op(uint32 emul_op); |
144 |
– |
|
145 |
– |
// "Native" EMUL_OP routines |
146 |
– |
void execute_emul_op_microseconds(); |
147 |
– |
void execute_emul_op_idle_time_1(); |
148 |
– |
void execute_emul_op_idle_time_2(); |
149 |
– |
|
142 |
|
// CPU context to preserve on interrupt |
143 |
|
class interrupt_context { |
144 |
|
uint32 gpr[32]; |
263 |
|
typedef bit_field< 20, 25 > NATIVE_OP_field; |
264 |
|
typedef bit_field< 26, 31 > EMUL_OP_field; |
265 |
|
|
274 |
– |
// "Native" EMUL_OP routines |
275 |
– |
#define GPR_A(REG) gpr(16 + (REG)) |
276 |
– |
#define GPR_D(REG) gpr( 8 + (REG)) |
277 |
– |
|
278 |
– |
void sheepshaver_cpu::execute_emul_op_microseconds() |
279 |
– |
{ |
280 |
– |
Microseconds(GPR_A(0), GPR_D(0)); |
281 |
– |
} |
282 |
– |
|
283 |
– |
void sheepshaver_cpu::execute_emul_op_idle_time_1() |
284 |
– |
{ |
285 |
– |
// Sleep if no events pending |
286 |
– |
if (ReadMacInt32(0x14c) == 0) |
287 |
– |
Delay_usec(16667); |
288 |
– |
GPR_A(0) = ReadMacInt32(0x2b6); |
289 |
– |
} |
290 |
– |
|
291 |
– |
void sheepshaver_cpu::execute_emul_op_idle_time_2() |
292 |
– |
{ |
293 |
– |
// Sleep if no events pending |
294 |
– |
if (ReadMacInt32(0x14c) == 0) |
295 |
– |
Delay_usec(16667); |
296 |
– |
GPR_D(0) = (uint32)-2; |
297 |
– |
} |
298 |
– |
|
299 |
– |
// Filter out EMUL_OP routines that only call native code |
300 |
– |
bool sheepshaver_cpu::filter_execute_emul_op(uint32 emul_op) |
301 |
– |
{ |
302 |
– |
switch (emul_op) { |
303 |
– |
case OP_MICROSECONDS: |
304 |
– |
execute_emul_op_microseconds(); |
305 |
– |
return true; |
306 |
– |
case OP_IDLE_TIME: |
307 |
– |
execute_emul_op_idle_time_1(); |
308 |
– |
return true; |
309 |
– |
case OP_IDLE_TIME_2: |
310 |
– |
execute_emul_op_idle_time_2(); |
311 |
– |
return true; |
312 |
– |
} |
313 |
– |
return false; |
314 |
– |
} |
315 |
– |
|
266 |
|
// Execute EMUL_OP routine |
267 |
|
void sheepshaver_cpu::execute_emul_op(uint32 emul_op) |
268 |
|
{ |
319 |
– |
#if ENABLE_NATIVE_EMUL_OP |
320 |
– |
// First, filter out EMUL_OPs that can be executed without a mode switch |
321 |
– |
if (filter_execute_emul_op(emul_op)) |
322 |
– |
return; |
323 |
– |
#endif |
324 |
– |
|
269 |
|
M68kRegisters r68; |
270 |
|
WriteMacInt32(XLM_68K_R25, gpr(25)); |
271 |
|
WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP); |
391 |
|
status = COMPILE_CODE_OK; |
392 |
|
break; |
393 |
|
#endif |
450 |
– |
case NATIVE_DISABLE_INTERRUPT: |
451 |
– |
dg.gen_invoke(DisableInterrupt); |
452 |
– |
status = COMPILE_CODE_OK; |
453 |
– |
break; |
454 |
– |
case NATIVE_ENABLE_INTERRUPT: |
455 |
– |
dg.gen_invoke(EnableInterrupt); |
456 |
– |
status = COMPILE_CODE_OK; |
457 |
– |
break; |
394 |
|
case NATIVE_BITBLT: |
395 |
|
dg.gen_load_T0_GPR(3); |
396 |
|
dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt); |
408 |
|
break; |
409 |
|
} |
410 |
|
// Could we fully translate this NativeOp? |
411 |
< |
if (FN_field::test(opcode)) { |
412 |
< |
if (status != COMPILE_FAILURE) { |
411 |
> |
if (status == COMPILE_CODE_OK) { |
412 |
> |
if (!FN_field::test(opcode)) |
413 |
> |
cg_context.done_compile = false; |
414 |
> |
else { |
415 |
|
dg.gen_load_A0_LR(); |
416 |
|
dg.gen_set_PC_A0(); |
417 |
+ |
cg_context.done_compile = true; |
418 |
|
} |
480 |
– |
cg_context.done_compile = true; |
481 |
– |
break; |
482 |
– |
} |
483 |
– |
else if (status != COMPILE_FAILURE) { |
484 |
– |
cg_context.done_compile = false; |
419 |
|
break; |
420 |
|
} |
421 |
|
#if PPC_REENTRANT_JIT |
422 |
|
// Try to execute NativeOp trampoline |
423 |
< |
dg.gen_set_PC_im(cg_context.pc + 4); |
423 |
> |
if (!FN_field::test(opcode)) |
424 |
> |
dg.gen_set_PC_im(cg_context.pc + 4); |
425 |
> |
else { |
426 |
> |
dg.gen_load_A0_LR(); |
427 |
> |
dg.gen_set_PC_A0(); |
428 |
> |
} |
429 |
|
dg.gen_mov_32_T0_im(selector); |
430 |
|
dg.gen_jmp(native_op_trampoline); |
431 |
|
cg_context.done_compile = true; |
433 |
|
break; |
434 |
|
#endif |
435 |
|
// Invoke NativeOp handler |
436 |
< |
typedef void (*func_t)(dyngen_cpu_base, uint32); |
437 |
< |
func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr(); |
438 |
< |
dg.gen_invoke_CPU_im(func, selector); |
439 |
< |
cg_context.done_compile = false; |
440 |
< |
status = COMPILE_CODE_OK; |
436 |
> |
if (!FN_field::test(opcode)) { |
437 |
> |
typedef void (*func_t)(dyngen_cpu_base, uint32); |
438 |
> |
func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr(); |
439 |
> |
dg.gen_invoke_CPU_im(func, selector); |
440 |
> |
cg_context.done_compile = false; |
441 |
> |
status = COMPILE_CODE_OK; |
442 |
> |
} |
443 |
> |
// Otherwise, let it generate a call to execute_sheep() which |
444 |
> |
// will cause necessary updates to the program counter |
445 |
|
break; |
446 |
|
} |
447 |
|
|
448 |
|
default: { // EMUL_OP |
449 |
|
uint32 emul_op = EMUL_OP_field::extract(opcode) - 3; |
507 |
– |
#if ENABLE_NATIVE_EMUL_OP |
508 |
– |
typedef void (*emul_op_func_t)(dyngen_cpu_base); |
509 |
– |
emul_op_func_t emul_op_func = 0; |
510 |
– |
switch (emul_op) { |
511 |
– |
case OP_MICROSECONDS: |
512 |
– |
emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_microseconds).ptr(); |
513 |
– |
break; |
514 |
– |
case OP_IDLE_TIME: |
515 |
– |
emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_1).ptr(); |
516 |
– |
break; |
517 |
– |
case OP_IDLE_TIME_2: |
518 |
– |
emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_2).ptr(); |
519 |
– |
break; |
520 |
– |
} |
521 |
– |
if (emul_op_func) { |
522 |
– |
dg.gen_invoke_CPU(emul_op_func); |
523 |
– |
cg_context.done_compile = false; |
524 |
– |
status = COMPILE_CODE_OK; |
525 |
– |
break; |
526 |
– |
} |
527 |
– |
#endif |
450 |
|
#if PPC_REENTRANT_JIT |
451 |
|
// Try to execute EmulOp trampoline |
452 |
|
dg.gen_set_PC_im(cg_context.pc + 4); |
514 |
|
void sheepshaver_cpu::interrupt(uint32 entry) |
515 |
|
{ |
516 |
|
#if EMUL_TIME_STATS |
517 |
< |
interrupt_count++; |
517 |
> |
ppc_interrupt_count++; |
518 |
|
const clock_t interrupt_start = clock(); |
519 |
|
#endif |
520 |
|
|
525 |
|
depth++; |
526 |
|
#endif |
527 |
|
|
606 |
– |
#if !MULTICORE_CPU |
528 |
|
// Save program counters and branch registers |
529 |
|
uint32 saved_pc = pc(); |
530 |
|
uint32 saved_lr = lr(); |
531 |
|
uint32 saved_ctr= ctr(); |
532 |
|
uint32 saved_sp = gpr(1); |
612 |
– |
#endif |
533 |
|
|
534 |
|
// Initialize stack pointer to SheepShaver alternate stack base |
535 |
|
gpr(1) = SignalStackBase() - 64; |
569 |
|
// Enter nanokernel |
570 |
|
execute(entry); |
571 |
|
|
652 |
– |
#if !MULTICORE_CPU |
572 |
|
// Restore program counters and branch registers |
573 |
|
pc() = saved_pc; |
574 |
|
lr() = saved_lr; |
575 |
|
ctr()= saved_ctr; |
576 |
|
gpr(1) = saved_sp; |
658 |
– |
#endif |
577 |
|
|
578 |
|
#if EMUL_TIME_STATS |
579 |
|
interrupt_time += (clock() - interrupt_start); |
775 |
|
* SheepShaver CPU engine interface |
776 |
|
**/ |
777 |
|
|
778 |
< |
static sheepshaver_cpu *main_cpu = NULL; // CPU emulator to handle usual control flow |
779 |
< |
static sheepshaver_cpu *interrupt_cpu = NULL; // CPU emulator to handle interrupts |
862 |
< |
static sheepshaver_cpu *current_cpu = NULL; // Current CPU emulator context |
778 |
> |
// PowerPC CPU emulator |
779 |
> |
static sheepshaver_cpu *ppc_cpu = NULL; |
780 |
|
|
781 |
|
void FlushCodeCache(uintptr start, uintptr end) |
782 |
|
{ |
783 |
|
D(bug("FlushCodeCache(%08x, %08x)\n", start, end)); |
784 |
< |
main_cpu->invalidate_cache_range(start, end); |
868 |
< |
#if MULTICORE_CPU |
869 |
< |
interrupt_cpu->invalidate_cache_range(start, end); |
870 |
< |
#endif |
871 |
< |
} |
872 |
< |
|
873 |
< |
static inline void cpu_push(sheepshaver_cpu *new_cpu) |
874 |
< |
{ |
875 |
< |
#if MULTICORE_CPU |
876 |
< |
current_cpu = new_cpu; |
877 |
< |
#endif |
878 |
< |
} |
879 |
< |
|
880 |
< |
static inline void cpu_pop() |
881 |
< |
{ |
882 |
< |
#if MULTICORE_CPU |
883 |
< |
current_cpu = main_cpu; |
884 |
< |
#endif |
784 |
> |
ppc_cpu->invalidate_cache_range(start, end); |
785 |
|
} |
786 |
|
|
787 |
|
// Dump PPC registers |
788 |
|
static void dump_registers(void) |
789 |
|
{ |
790 |
< |
current_cpu->dump_registers(); |
790 |
> |
ppc_cpu->dump_registers(); |
791 |
|
} |
792 |
|
|
793 |
|
// Dump log |
794 |
|
static void dump_log(void) |
795 |
|
{ |
796 |
< |
current_cpu->dump_log(); |
796 |
> |
ppc_cpu->dump_log(); |
797 |
|
} |
798 |
|
|
799 |
|
/* |
800 |
|
* Initialize CPU emulation |
801 |
|
*/ |
802 |
|
|
803 |
< |
static sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction) |
803 |
> |
sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction) |
804 |
|
{ |
805 |
|
#if ENABLE_VOSF |
806 |
|
// Handle screen fault |
812 |
|
const uintptr addr = (uintptr)fault_address; |
813 |
|
#if HAVE_SIGSEGV_SKIP_INSTRUCTION |
814 |
|
// Ignore writes to ROM |
815 |
< |
if ((addr - ROM_BASE) < ROM_SIZE) |
815 |
> |
if ((addr - (uintptr)ROMBaseHost) < ROM_SIZE) |
816 |
|
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
817 |
|
|
818 |
|
// Get program counter of target CPU |
819 |
< |
sheepshaver_cpu * const cpu = current_cpu; |
819 |
> |
sheepshaver_cpu * const cpu = ppc_cpu; |
820 |
|
const uint32 pc = cpu->pc(); |
821 |
|
|
822 |
|
// Fault in Mac ROM or RAM? |
823 |
< |
bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize)); |
823 |
> |
bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize)) || (pc >= DR_CACHE_BASE && pc < (DR_CACHE_BASE + DR_CACHE_SIZE)); |
824 |
|
if (mac_fault) { |
825 |
|
|
826 |
|
// "VM settings" during MacOS 8 installation |
840 |
|
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
841 |
|
else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000)) |
842 |
|
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
843 |
+ |
|
844 |
+ |
// MacOS 8.6 serial drivers on startup (with DR Cache and OldWorld ROM) |
845 |
+ |
else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(16) == 0xf3012002 || cpu->gpr(16) == 0xf3012000)) |
846 |
+ |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
847 |
+ |
else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000)) |
848 |
+ |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
849 |
|
|
850 |
|
// Ignore writes to the zero page |
851 |
|
else if ((uint32)(addr - SheepMem::ZeroPage()) < (uint32)SheepMem::PageSize()) |
862 |
|
printf("SIGSEGV\n"); |
863 |
|
printf(" pc %p\n", fault_instruction); |
864 |
|
printf(" ea %p\n", fault_address); |
959 |
– |
printf(" cpu %s\n", current_cpu == main_cpu ? "main" : "interrupts"); |
865 |
|
dump_registers(); |
866 |
< |
current_cpu->dump_log(); |
866 |
> |
ppc_cpu->dump_log(); |
867 |
|
enter_mon(); |
868 |
|
QuitEmulator(); |
869 |
|
|
872 |
|
|
873 |
|
void init_emul_ppc(void) |
874 |
|
{ |
875 |
+ |
// Get pointer to KernelData in host address space |
876 |
+ |
kernel_data = (KernelData *)Mac2HostAddr(KERNEL_DATA_BASE); |
877 |
+ |
|
878 |
|
// Initialize main CPU emulator |
879 |
< |
main_cpu = new sheepshaver_cpu(); |
880 |
< |
main_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000)); |
881 |
< |
main_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000)); |
879 |
> |
ppc_cpu = new sheepshaver_cpu(); |
880 |
> |
ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000)); |
881 |
> |
ppc_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000)); |
882 |
|
WriteMacInt32(XLM_RUN_MODE, MODE_68K); |
883 |
|
|
976 |
– |
#if MULTICORE_CPU |
977 |
– |
// Initialize alternate CPU emulator to handle interrupts |
978 |
– |
interrupt_cpu = new sheepshaver_cpu(); |
979 |
– |
#endif |
980 |
– |
|
981 |
– |
// Install the handler for SIGSEGV |
982 |
– |
sigsegv_install_handler(sigsegv_handler); |
983 |
– |
|
884 |
|
#if ENABLE_MON |
885 |
|
// Install "regs" command in cxmon |
886 |
|
mon_add_command("regs", dump_registers, "regs Dump PowerPC registers\n"); |
906 |
|
printf("Total emulation time : %.1f sec\n", double(emul_time) / double(CLOCKS_PER_SEC)); |
907 |
|
printf("Total interrupt count: %d (%2.1f Hz)\n", interrupt_count, |
908 |
|
(double(interrupt_count) * CLOCKS_PER_SEC) / double(emul_time)); |
909 |
+ |
printf("Total ppc interrupt count: %d (%2.1f %%)\n", ppc_interrupt_count, |
910 |
+ |
(double(ppc_interrupt_count) * 100.0) / double(interrupt_count)); |
911 |
|
|
912 |
|
#define PRINT_STATS(LABEL, VAR_PREFIX) do { \ |
913 |
|
printf("Total " LABEL " count : %d\n", VAR_PREFIX##_count); \ |
924 |
|
printf("\n"); |
925 |
|
#endif |
926 |
|
|
927 |
< |
delete main_cpu; |
1026 |
< |
#if MULTICORE_CPU |
1027 |
< |
delete interrupt_cpu; |
1028 |
< |
#endif |
927 |
> |
delete ppc_cpu; |
928 |
|
} |
929 |
|
|
930 |
|
#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT |
959 |
|
|
960 |
|
void emul_ppc(uint32 entry) |
961 |
|
{ |
1063 |
– |
current_cpu = main_cpu; |
962 |
|
#if 0 |
963 |
< |
current_cpu->start_log(); |
963 |
> |
ppc_cpu->start_log(); |
964 |
|
#endif |
965 |
|
// start emulation loop and enable code translation or caching |
966 |
< |
current_cpu->execute(entry); |
966 |
> |
ppc_cpu->execute(entry); |
967 |
|
} |
968 |
|
|
969 |
|
/* |
970 |
|
* Handle PowerPC interrupt |
971 |
|
*/ |
972 |
|
|
1075 |
– |
#if ASYNC_IRQ |
1076 |
– |
void HandleInterrupt(void) |
1077 |
– |
{ |
1078 |
– |
main_cpu->handle_interrupt(); |
1079 |
– |
} |
1080 |
– |
#else |
973 |
|
void TriggerInterrupt(void) |
974 |
|
{ |
975 |
|
#if 0 |
976 |
|
WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1); |
977 |
|
#else |
978 |
|
// Trigger interrupt to main cpu only |
979 |
< |
if (main_cpu) |
980 |
< |
main_cpu->trigger_interrupt(); |
979 |
> |
if (ppc_cpu) |
980 |
> |
ppc_cpu->trigger_interrupt(); |
981 |
|
#endif |
982 |
|
} |
1091 |
– |
#endif |
983 |
|
|
984 |
|
void sheepshaver_cpu::handle_interrupt(void) |
985 |
|
{ |
986 |
+ |
#ifdef USE_SDL_VIDEO |
987 |
+ |
// We must fill in the events queue in the same thread that did call SDL_SetVideoMode() |
988 |
+ |
SDL_PumpEvents(); |
989 |
+ |
#endif |
990 |
+ |
|
991 |
|
// Do nothing if interrupts are disabled |
992 |
< |
if (*(int32 *)XLM_IRQ_NEST > 0) |
992 |
> |
if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0) |
993 |
|
return; |
994 |
|
|
995 |
< |
// Do nothing if there is no interrupt pending |
996 |
< |
if (InterruptFlags == 0) |
997 |
< |
return; |
995 |
> |
// Current interrupt nest level |
996 |
> |
static int interrupt_depth = 0; |
997 |
> |
++interrupt_depth; |
998 |
> |
#if EMUL_TIME_STATS |
999 |
> |
interrupt_count++; |
1000 |
> |
#endif |
1001 |
|
|
1002 |
|
// Disable MacOS stack sniffer |
1003 |
|
WriteMacInt32(0x110, 0); |
1006 |
|
switch (ReadMacInt32(XLM_RUN_MODE)) { |
1007 |
|
case MODE_68K: |
1008 |
|
// 68k emulator active, trigger 68k interrupt level 1 |
1110 |
– |
assert(current_cpu == main_cpu); |
1009 |
|
WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1); |
1010 |
|
set_cr(get_cr() | tswap32(kernel_data->v[0x674 >> 2])); |
1011 |
|
break; |
1013 |
|
#if INTERRUPTS_IN_NATIVE_MODE |
1014 |
|
case MODE_NATIVE: |
1015 |
|
// 68k emulator inactive, in nanokernel? |
1016 |
< |
assert(current_cpu == main_cpu); |
1119 |
< |
if (gpr(1) != KernelDataAddr) { |
1016 |
> |
if (gpr(1) != KernelDataAddr && interrupt_depth == 1) { |
1017 |
|
interrupt_context ctx(this, "PowerPC mode"); |
1018 |
|
|
1019 |
|
// Prepare for 68k interrupt level 1 |
1024 |
|
|
1025 |
|
// Execute nanokernel interrupt routine (this will activate the 68k emulator) |
1026 |
|
DisableInterrupt(); |
1130 |
– |
cpu_push(interrupt_cpu); |
1027 |
|
if (ROMType == ROMTYPE_NEWWORLD) |
1028 |
< |
current_cpu->interrupt(ROM_BASE + 0x312b1c); |
1028 |
> |
ppc_cpu->interrupt(ROM_BASE + 0x312b1c); |
1029 |
|
else |
1030 |
< |
current_cpu->interrupt(ROM_BASE + 0x312a3c); |
1135 |
< |
cpu_pop(); |
1030 |
> |
ppc_cpu->interrupt(ROM_BASE + 0x312a3c); |
1031 |
|
} |
1032 |
|
break; |
1033 |
|
#endif |
1037 |
|
// 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0 |
1038 |
|
if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) { |
1039 |
|
interrupt_context ctx(this, "68k mode"); |
1040 |
+ |
#if EMUL_TIME_STATS |
1041 |
+ |
const clock_t interrupt_start = clock(); |
1042 |
+ |
#endif |
1043 |
|
#if 1 |
1044 |
|
// Execute full 68k interrupt routine |
1045 |
|
M68kRegisters r; |
1053 |
|
0x4e, 0xd0, // jmp (a0) |
1054 |
|
M68K_RTS >> 8, M68K_RTS & 0xff // @1 |
1055 |
|
}; |
1056 |
< |
Execute68k((uint32)proc, &r); |
1056 |
> |
Execute68k(Host2MacAddr((uint8 *)proc), &r); |
1057 |
|
WriteMacInt32(XLM_68K_R25, old_r25); // Restore interrupt level |
1058 |
|
#else |
1059 |
|
// Only update cursor |
1065 |
|
} |
1066 |
|
} |
1067 |
|
#endif |
1068 |
+ |
#if EMUL_TIME_STATS |
1069 |
+ |
interrupt_time += (clock() - interrupt_start); |
1070 |
+ |
#endif |
1071 |
|
} |
1072 |
|
break; |
1073 |
|
#endif |
1074 |
|
} |
1075 |
+ |
|
1076 |
+ |
// We are done with this interrupt |
1077 |
+ |
--interrupt_depth; |
1078 |
|
} |
1079 |
|
|
1080 |
|
static void get_resource(void); |
1102 |
|
VideoVBL(); |
1103 |
|
break; |
1104 |
|
case NATIVE_VIDEO_DO_DRIVER_IO: |
1105 |
< |
gpr(3) = (int32)(int16)VideoDoDriverIO((void *)gpr(3), (void *)gpr(4), |
1202 |
< |
(void *)gpr(5), gpr(6), gpr(7)); |
1105 |
> |
gpr(3) = (int32)(int16)VideoDoDriverIO(gpr(3), gpr(4), gpr(5), gpr(6), gpr(7)); |
1106 |
|
break; |
1107 |
|
#ifdef WORDS_BIGENDIAN |
1108 |
|
case NATIVE_ETHER_IRQ: |
1186 |
|
get_resource_callbacks[selector - NATIVE_GET_RESOURCE](); |
1187 |
|
break; |
1188 |
|
} |
1286 |
– |
case NATIVE_DISABLE_INTERRUPT: |
1287 |
– |
DisableInterrupt(); |
1288 |
– |
break; |
1289 |
– |
case NATIVE_ENABLE_INTERRUPT: |
1290 |
– |
EnableInterrupt(); |
1291 |
– |
break; |
1189 |
|
case NATIVE_MAKE_EXECUTABLE: |
1190 |
< |
MakeExecutable(0, (void *)gpr(4), gpr(5)); |
1190 |
> |
MakeExecutable(0, gpr(4), gpr(5)); |
1191 |
|
break; |
1192 |
|
case NATIVE_CHECK_LOAD_INVOC: |
1193 |
|
check_load_invoc(gpr(3), gpr(4), gpr(5)); |
1211 |
|
|
1212 |
|
void Execute68k(uint32 pc, M68kRegisters *r) |
1213 |
|
{ |
1214 |
< |
current_cpu->execute_68k(pc, r); |
1214 |
> |
ppc_cpu->execute_68k(pc, r); |
1215 |
|
} |
1216 |
|
|
1217 |
|
/* |
1234 |
|
|
1235 |
|
uint32 call_macos(uint32 tvect) |
1236 |
|
{ |
1237 |
< |
return current_cpu->execute_macos_code(tvect, 0, NULL); |
1237 |
> |
return ppc_cpu->execute_macos_code(tvect, 0, NULL); |
1238 |
|
} |
1239 |
|
|
1240 |
|
uint32 call_macos1(uint32 tvect, uint32 arg1) |
1241 |
|
{ |
1242 |
|
const uint32 args[] = { arg1 }; |
1243 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1243 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1244 |
|
} |
1245 |
|
|
1246 |
|
uint32 call_macos2(uint32 tvect, uint32 arg1, uint32 arg2) |
1247 |
|
{ |
1248 |
|
const uint32 args[] = { arg1, arg2 }; |
1249 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1249 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1250 |
|
} |
1251 |
|
|
1252 |
|
uint32 call_macos3(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3) |
1253 |
|
{ |
1254 |
|
const uint32 args[] = { arg1, arg2, arg3 }; |
1255 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1255 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1256 |
|
} |
1257 |
|
|
1258 |
|
uint32 call_macos4(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4) |
1259 |
|
{ |
1260 |
|
const uint32 args[] = { arg1, arg2, arg3, arg4 }; |
1261 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1261 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1262 |
|
} |
1263 |
|
|
1264 |
|
uint32 call_macos5(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5) |
1265 |
|
{ |
1266 |
|
const uint32 args[] = { arg1, arg2, arg3, arg4, arg5 }; |
1267 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1267 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1268 |
|
} |
1269 |
|
|
1270 |
|
uint32 call_macos6(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6) |
1271 |
|
{ |
1272 |
|
const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6 }; |
1273 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1273 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1274 |
|
} |
1275 |
|
|
1276 |
|
uint32 call_macos7(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6, uint32 arg7) |
1277 |
|
{ |
1278 |
|
const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6, arg7 }; |
1279 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1279 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1280 |
|
} |
1281 |
|
|
1282 |
|
/* |
1285 |
|
|
1286 |
|
void get_resource(void) |
1287 |
|
{ |
1288 |
< |
current_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE)); |
1288 |
> |
ppc_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE)); |
1289 |
|
} |
1290 |
|
|
1291 |
|
void get_1_resource(void) |
1292 |
|
{ |
1293 |
< |
current_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE)); |
1293 |
> |
ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE)); |
1294 |
|
} |
1295 |
|
|
1296 |
|
void get_ind_resource(void) |
1297 |
|
{ |
1298 |
< |
current_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE)); |
1298 |
> |
ppc_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE)); |
1299 |
|
} |
1300 |
|
|
1301 |
|
void get_1_ind_resource(void) |
1302 |
|
{ |
1303 |
< |
current_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE)); |
1303 |
> |
ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE)); |
1304 |
|
} |
1305 |
|
|
1306 |
|
void r_get_resource(void) |
1307 |
|
{ |
1308 |
< |
current_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE)); |
1308 |
> |
ppc_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE)); |
1309 |
|
} |