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root/cebix/SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.39 by gbeauche, 2004-05-20T11:05:30Z vs.
Revision 1.49 by gbeauche, 2004-07-11T06:42:28Z

#	Line 43 | Line 43
43		#include <stdio.h>
44		#include <stdlib.h>
45
46	+	#ifdef USE_SDL_VIDEO
47	+	#include <SDL_events.h>
48	+	#endif
49	+
50		#if ENABLE_MON
51		#include "mon.h"
52		#include "mon_disass.h"
#	Line 52 | Line 56
56		#include "debug.h"
57
58		// Emulation time statistics
59	<	#define EMUL_TIME_STATS 1
59	>	#ifndef EMUL_TIME_STATS
60	>	#define EMUL_TIME_STATS 0
61	>	#endif
62
63		#if EMUL_TIME_STATS
64		static clock_t emul_start_time;
65	<	static uint32 interrupt_count = 0;
65	>	static uint32 interrupt_count = 0, ppc_interrupt_count = 0;
66		static clock_t interrupt_time = 0;
67		static uint32 exec68k_count = 0;
68		static clock_t exec68k_time = 0;
#	Line 84 | Line 90 | extern "C" void check_load_invoc(uint32
90		// PowerPC EmulOp to exit from emulation looop
91		const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1;
92
87	–	// Enable multicore (main/interrupts) cpu emulation?
88	–	#define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0)
89	–
93		// Enable interrupt routine safety checks?
94		#define SAFE_INTERRUPT_PPC 1
95
#	Line 102 | Line 105 | const uint32 POWERPC_EXEC_RETURN = POWER
105		// Interrupts in native mode?
106		#define INTERRUPTS_IN_NATIVE_MODE 1
107
105	–	// Enable native EMUL_OPs to be run without a mode switch
106	–	#define ENABLE_NATIVE_EMUL_OP 1
107	–
108		// Pointer to Kernel Data
109		static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE;
110
111		// SIGSEGV handler
112	<	static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
112	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
113
114		#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
115		// Special trampolines for EmulOp and NativeOp
#	Line 139 | Line 139 | class sheepshaver_cpu
139		void init_decoder();
140		void execute_sheep(uint32 opcode);
141
142	–	// Filter out EMUL_OP routines that only call native code
143	–	bool filter_execute_emul_op(uint32 emul_op);
144	–
145	–	// "Native" EMUL_OP routines
146	–	void execute_emul_op_microseconds();
147	–	void execute_emul_op_idle_time_1();
148	–	void execute_emul_op_idle_time_2();
149	–
142		// CPU context to preserve on interrupt
143		class interrupt_context {
144		uint32 gpr[32];
#	Line 271 | Line 263 | typedef bit_field< 19, 19 > FN_field;
263		typedef bit_field< 20, 25 > NATIVE_OP_field;
264		typedef bit_field< 26, 31 > EMUL_OP_field;
265
274	–	// "Native" EMUL_OP routines
275	–	#define GPR_A(REG) gpr(16 + (REG))
276	–	#define GPR_D(REG) gpr( 8 + (REG))
277	–
278	–	void sheepshaver_cpu::execute_emul_op_microseconds()
279	–	{
280	–	Microseconds(GPR_A(0), GPR_D(0));
281	–	}
282	–
283	–	void sheepshaver_cpu::execute_emul_op_idle_time_1()
284	–	{
285	–	// Sleep if no events pending
286	–	if (ReadMacInt32(0x14c) == 0)
287	–	Delay_usec(16667);
288	–	GPR_A(0) = ReadMacInt32(0x2b6);
289	–	}
290	–
291	–	void sheepshaver_cpu::execute_emul_op_idle_time_2()
292	–	{
293	–	// Sleep if no events pending
294	–	if (ReadMacInt32(0x14c) == 0)
295	–	Delay_usec(16667);
296	–	GPR_D(0) = (uint32)-2;
297	–	}
298	–
299	–	// Filter out EMUL_OP routines that only call native code
300	–	bool sheepshaver_cpu::filter_execute_emul_op(uint32 emul_op)
301	–	{
302	–	switch (emul_op) {
303	–	case OP_MICROSECONDS:
304	–	execute_emul_op_microseconds();
305	–	return true;
306	–	case OP_IDLE_TIME:
307	–	execute_emul_op_idle_time_1();
308	–	return true;
309	–	case OP_IDLE_TIME_2:
310	–	execute_emul_op_idle_time_2();
311	–	return true;
312	–	}
313	–	return false;
314	–	}
315	–
266		// Execute EMUL_OP routine
267		void sheepshaver_cpu::execute_emul_op(uint32 emul_op)
268		{
319	–	#if ENABLE_NATIVE_EMUL_OP
320	–	// First, filter out EMUL_OPs that can be executed without a mode switch
321	–	if (filter_execute_emul_op(emul_op))
322	–	return;
323	–	#endif
324	–
269		M68kRegisters r68;
270		WriteMacInt32(XLM_68K_R25, gpr(25));
271		WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
#	Line 447 | Line 391 | int sheepshaver_cpu::compile1(codegen_co
391		status = COMPILE_CODE_OK;
392		break;
393		#endif
450	–	case NATIVE_DISABLE_INTERRUPT:
451	–	dg.gen_invoke(DisableInterrupt);
452	–	status = COMPILE_CODE_OK;
453	–	break;
454	–	case NATIVE_ENABLE_INTERRUPT:
455	–	dg.gen_invoke(EnableInterrupt);
456	–	status = COMPILE_CODE_OK;
457	–	break;
394		case NATIVE_BITBLT:
395		dg.gen_load_T0_GPR(3);
396		dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt);
#	Line 472 | Line 408 | int sheepshaver_cpu::compile1(codegen_co
408		break;
409		}
410		// Could we fully translate this NativeOp?
411	<	if (FN_field::test(opcode)) {
412	<	if (status != COMPILE_FAILURE) {
411	>	if (status == COMPILE_CODE_OK) {
412	>	if (!FN_field::test(opcode))
413	>	cg_context.done_compile = false;
414	>	else {
415		dg.gen_load_A0_LR();
416		dg.gen_set_PC_A0();
417	+	cg_context.done_compile = true;
418		}
480	–	cg_context.done_compile = true;
481	–	break;
482	–	}
483	–	else if (status != COMPILE_FAILURE) {
484	–	cg_context.done_compile = false;
419		break;
420		}
421		#if PPC_REENTRANT_JIT
422		// Try to execute NativeOp trampoline
423	<	dg.gen_set_PC_im(cg_context.pc + 4);
423	>	if (!FN_field::test(opcode))
424	>	dg.gen_set_PC_im(cg_context.pc + 4);
425	>	else {
426	>	dg.gen_load_A0_LR();
427	>	dg.gen_set_PC_A0();
428	>	}
429		dg.gen_mov_32_T0_im(selector);
430		dg.gen_jmp(native_op_trampoline);
431		cg_context.done_compile = true;
#	Line 494 | Line 433 | int sheepshaver_cpu::compile1(codegen_co
433		break;
434		#endif
435		// Invoke NativeOp handler
436	<	typedef void (*func_t)(dyngen_cpu_base, uint32);
437	<	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
438	<	dg.gen_invoke_CPU_im(func, selector);
439	<	cg_context.done_compile = false;
440	<	status = COMPILE_CODE_OK;
436	>	if (!FN_field::test(opcode)) {
437	>	typedef void (*func_t)(dyngen_cpu_base, uint32);
438	>	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
439	>	dg.gen_invoke_CPU_im(func, selector);
440	>	cg_context.done_compile = false;
441	>	status = COMPILE_CODE_OK;
442	>	}
443	>	// Otherwise, let it generate a call to execute_sheep() which
444	>	// will cause necessary updates to the program counter
445		break;
446		}
447
448		default: {      // EMUL_OP
449		uint32 emul_op = EMUL_OP_field::extract(opcode) - 3;
507	–	#if ENABLE_NATIVE_EMUL_OP
508	–	typedef void (*emul_op_func_t)(dyngen_cpu_base);
509	–	emul_op_func_t emul_op_func = 0;
510	–	switch (emul_op) {
511	–	case OP_MICROSECONDS:
512	–	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_microseconds).ptr();
513	–	break;
514	–	case OP_IDLE_TIME:
515	–	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_1).ptr();
516	–	break;
517	–	case OP_IDLE_TIME_2:
518	–	emul_op_func = (emul_op_func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op_idle_time_2).ptr();
519	–	break;
520	–	}
521	–	if (emul_op_func) {
522	–	dg.gen_invoke_CPU(emul_op_func);
523	–	cg_context.done_compile = false;
524	–	status = COMPILE_CODE_OK;
525	–	break;
526	–	}
527	–	#endif
450		#if PPC_REENTRANT_JIT
451		// Try to execute EmulOp trampoline
452		dg.gen_set_PC_im(cg_context.pc + 4);
#	Line 592 | Line 514 | sheepshaver_cpu::interrupt_context::~int
514		void sheepshaver_cpu::interrupt(uint32 entry)
515		{
516		#if EMUL_TIME_STATS
517	<	interrupt_count++;
517	>	ppc_interrupt_count++;
518		const clock_t interrupt_start = clock();
519		#endif
520
#	Line 603 | Line 525 | void sheepshaver_cpu::interrupt(uint32 e
525		depth++;
526		#endif
527
606	–	#if !MULTICORE_CPU
528		// Save program counters and branch registers
529		uint32 saved_pc = pc();
530		uint32 saved_lr = lr();
531		uint32 saved_ctr= ctr();
532		uint32 saved_sp = gpr(1);
612	–	#endif
533
534		// Initialize stack pointer to SheepShaver alternate stack base
535		gpr(1) = SignalStackBase() - 64;
#	Line 649 | Line 569 | void sheepshaver_cpu::interrupt(uint32 e
569		// Enter nanokernel
570		execute(entry);
571
652	–	#if !MULTICORE_CPU
572		// Restore program counters and branch registers
573		pc() = saved_pc;
574		lr() = saved_lr;
575		ctr()= saved_ctr;
576		gpr(1) = saved_sp;
658	–	#endif
577
578		#if EMUL_TIME_STATS
579		interrupt_time += (clock() - interrupt_start);
#	Line 857 | Line 775 | inline void sheepshaver_cpu::get_resourc
775		*              SheepShaver CPU engine interface
776		**/
777
778	<	static sheepshaver_cpu *main_cpu = NULL;                // CPU emulator to handle usual control flow
779	<	static sheepshaver_cpu *interrupt_cpu = NULL;   // CPU emulator to handle interrupts
862	<	static sheepshaver_cpu *current_cpu = NULL;             // Current CPU emulator context
778	>	// PowerPC CPU emulator
779	>	static sheepshaver_cpu *ppc_cpu = NULL;
780
781		void FlushCodeCache(uintptr start, uintptr end)
782		{
783		D(bug("FlushCodeCache(%08x, %08x)\n", start, end));
784	<	main_cpu->invalidate_cache_range(start, end);
868	<	#if MULTICORE_CPU
869	<	interrupt_cpu->invalidate_cache_range(start, end);
870	<	#endif
871	<	}
872	<
873	<	static inline void cpu_push(sheepshaver_cpu *new_cpu)
874	<	{
875	<	#if MULTICORE_CPU
876	<	current_cpu = new_cpu;
877	<	#endif
878	<	}
879	<
880	<	static inline void cpu_pop()
881	<	{
882	<	#if MULTICORE_CPU
883	<	current_cpu = main_cpu;
884	<	#endif
784	>	ppc_cpu->invalidate_cache_range(start, end);
785		}
786
787		// Dump PPC registers
788		static void dump_registers(void)
789		{
790	<	current_cpu->dump_registers();
790	>	ppc_cpu->dump_registers();
791		}
792
793		// Dump log
794		static void dump_log(void)
795		{
796	<	current_cpu->dump_log();
796	>	ppc_cpu->dump_log();
797		}
798
799		/*
800		*  Initialize CPU emulation
801		*/
802
803	<	static sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
803	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
804		{
805		#if ENABLE_VOSF
806		// Handle screen fault
#	Line 916 | Line 816 | static sigsegv_return_t sigsegv_handler(
816		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
817
818		// Get program counter of target CPU
819	<	sheepshaver_cpu * const cpu = current_cpu;
819	>	sheepshaver_cpu * const cpu = ppc_cpu;
820		const uint32 pc = cpu->pc();
821
822		// Fault in Mac ROM or RAM?
823	<	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize));
823	>	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize)) || (pc >= DR_CACHE_BASE && pc < (DR_CACHE_BASE + DR_CACHE_SIZE));
824		if (mac_fault) {
825
826		// "VM settings" during MacOS 8 installation
#	Line 940 | Line 840 | static sigsegv_return_t sigsegv_handler(
840		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
841		else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
842		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
843	+
844	+	// MacOS 8.6 serial drivers on startup (with DR Cache and OldWorld ROM)
845	+	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(16) == 0xf3012002 || cpu->gpr(16) == 0xf3012000))
846	+	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
847	+	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000))
848	+	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
849
850		// Ignore writes to the zero page
851		else if ((uint32)(addr - SheepMem::ZeroPage()) < (uint32)SheepMem::PageSize())
#	Line 956 | Line 862 | static sigsegv_return_t sigsegv_handler(
862		printf("SIGSEGV\n");
863		printf("  pc %p\n", fault_instruction);
864		printf("  ea %p\n", fault_address);
959	–	printf(" cpu %s\n", current_cpu == main_cpu ? "main" : "interrupts");
865		dump_registers();
866	<	current_cpu->dump_log();
866	>	ppc_cpu->dump_log();
867		enter_mon();
868		QuitEmulator();
869
#	Line 968 | Line 873 | static sigsegv_return_t sigsegv_handler(
873		void init_emul_ppc(void)
874		{
875		// Initialize main CPU emulator
876	<	main_cpu = new sheepshaver_cpu();
877	<	main_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
878	<	main_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
876	>	ppc_cpu = new sheepshaver_cpu();
877	>	ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
878	>	ppc_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
879		WriteMacInt32(XLM_RUN_MODE, MODE_68K);
880
976	–	#if MULTICORE_CPU
977	–	// Initialize alternate CPU emulator to handle interrupts
978	–	interrupt_cpu = new sheepshaver_cpu();
979	–	#endif
980	–
981	–	// Install the handler for SIGSEGV
982	–	sigsegv_install_handler(sigsegv_handler);
983	–
881		#if ENABLE_MON
882		// Install "regs" command in cxmon
883		mon_add_command("regs", dump_registers, "regs                     Dump PowerPC registers\n");
#	Line 1006 | Line 903 | void exit_emul_ppc(void)
903		printf("Total emulation time : %.1f sec\n", double(emul_time) / double(CLOCKS_PER_SEC));
904		printf("Total interrupt count: %d (%2.1f Hz)\n", interrupt_count,
905		(double(interrupt_count) * CLOCKS_PER_SEC) / double(emul_time));
906	+	printf("Total ppc interrupt count: %d (%2.1f %%)\n", ppc_interrupt_count,
907	+	(double(ppc_interrupt_count) * 100.0) / double(interrupt_count));
908
909		#define PRINT_STATS(LABEL, VAR_PREFIX) do {                                                             \
910		printf("Total " LABEL " count : %d\n", VAR_PREFIX##_count);             \
#	Line 1022 | Line 921 | void exit_emul_ppc(void)
921		printf("\n");
922		#endif
923
924	<	delete main_cpu;
1026	<	#if MULTICORE_CPU
1027	<	delete interrupt_cpu;
1028	<	#endif
924	>	delete ppc_cpu;
925		}
926
927		#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
#	Line 1060 | Line 956 | void init_emul_op_trampolines(basic_dyng
956
957		void emul_ppc(uint32 entry)
958		{
1063	–	current_cpu = main_cpu;
959		#if 0
960	<	current_cpu->start_log();
960	>	ppc_cpu->start_log();
961		#endif
962		// start emulation loop and enable code translation or caching
963	<	current_cpu->execute(entry);
963	>	ppc_cpu->execute(entry);
964		}
965
966		/*
967		*  Handle PowerPC interrupt
968		*/
969
1075	–	#if ASYNC_IRQ
1076	–	void HandleInterrupt(void)
1077	–	{
1078	–	main_cpu->handle_interrupt();
1079	–	}
1080	–	#else
970		void TriggerInterrupt(void)
971		{
972		#if 0
973		WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1);
974		#else
975		// Trigger interrupt to main cpu only
976	<	if (main_cpu)
977	<	main_cpu->trigger_interrupt();
976	>	if (ppc_cpu)
977	>	ppc_cpu->trigger_interrupt();
978		#endif
979		}
1091	–	#endif
980
981		void sheepshaver_cpu::handle_interrupt(void)
982		{
983	+	#ifdef USE_SDL_VIDEO
984	+	// We must fill in the events queue in the same thread that did call SDL_SetVideoMode()
985	+	SDL_PumpEvents();
986	+	#endif
987	+
988		// Do nothing if interrupts are disabled
989	<	if (*(int32 *)XLM_IRQ_NEST > 0)
989	>	if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0)
990		return;
991
992	<	// Do nothing if there is no interrupt pending
993	<	if (InterruptFlags == 0)
994	<	return;
992	>	// Current interrupt nest level
993	>	static int interrupt_depth = 0;
994	>	++interrupt_depth;
995	>	#if EMUL_TIME_STATS
996	>	interrupt_count++;
997	>	#endif
998
999		// Disable MacOS stack sniffer
1000		WriteMacInt32(0x110, 0);
#	Line 1107 | Line 1003 | void sheepshaver_cpu::handle_interrupt(v
1003		switch (ReadMacInt32(XLM_RUN_MODE)) {
1004		case MODE_68K:
1005		// 68k emulator active, trigger 68k interrupt level 1
1110	–	assert(current_cpu == main_cpu);
1006		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
1007		set_cr(get_cr() | tswap32(kernel_data->v[0x674 >> 2]));
1008		break;
#	Line 1115 | Line 1010 | void sheepshaver_cpu::handle_interrupt(v
1010		#if INTERRUPTS_IN_NATIVE_MODE
1011		case MODE_NATIVE:
1012		// 68k emulator inactive, in nanokernel?
1013	<	assert(current_cpu == main_cpu);
1119	<	if (gpr(1) != KernelDataAddr) {
1013	>	if (gpr(1) != KernelDataAddr && interrupt_depth == 1) {
1014		interrupt_context ctx(this, "PowerPC mode");
1015
1016		// Prepare for 68k interrupt level 1
#	Line 1127 | Line 1021 | void sheepshaver_cpu::handle_interrupt(v
1021
1022		// Execute nanokernel interrupt routine (this will activate the 68k emulator)
1023		DisableInterrupt();
1130	–	cpu_push(interrupt_cpu);
1024		if (ROMType == ROMTYPE_NEWWORLD)
1025	<	current_cpu->interrupt(ROM_BASE + 0x312b1c);
1025	>	ppc_cpu->interrupt(ROM_BASE + 0x312b1c);
1026		else
1027	<	current_cpu->interrupt(ROM_BASE + 0x312a3c);
1135	<	cpu_pop();
1027	>	ppc_cpu->interrupt(ROM_BASE + 0x312a3c);
1028		}
1029		break;
1030		#endif
#	Line 1142 | Line 1034 | void sheepshaver_cpu::handle_interrupt(v
1034		// 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0
1035		if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) {
1036		interrupt_context ctx(this, "68k mode");
1037	+	#if EMUL_TIME_STATS
1038	+	const clock_t interrupt_start = clock();
1039	+	#endif
1040		#if 1
1041		// Execute full 68k interrupt routine
1042		M68kRegisters r;
#	Line 1167 | Line 1062 | void sheepshaver_cpu::handle_interrupt(v
1062		}
1063		}
1064		#endif
1065	+	#if EMUL_TIME_STATS
1066	+	interrupt_time += (clock() - interrupt_start);
1067	+	#endif
1068		}
1069		break;
1070		#endif
1071		}
1072	+
1073	+	// We are done with this interrupt
1074	+	--interrupt_depth;
1075		}
1076
1077		static void get_resource(void);
#	Line 1283 | Line 1184 | void sheepshaver_cpu::execute_native_op(
1184		get_resource_callbacks[selector - NATIVE_GET_RESOURCE]();
1185		break;
1186		}
1286	–	case NATIVE_DISABLE_INTERRUPT:
1287	–	DisableInterrupt();
1288	–	break;
1289	–	case NATIVE_ENABLE_INTERRUPT:
1290	–	EnableInterrupt();
1291	–	break;
1187		case NATIVE_MAKE_EXECUTABLE:
1188		MakeExecutable(0, (void *)gpr(4), gpr(5));
1189		break;
#	Line 1314 | Line 1209 | void sheepshaver_cpu::execute_native_op(
1209
1210		void Execute68k(uint32 pc, M68kRegisters *r)
1211		{
1212	<	current_cpu->execute_68k(pc, r);
1212	>	ppc_cpu->execute_68k(pc, r);
1213		}
1214
1215		/*
#	Line 1337 | Line 1232 | void Execute68kTrap(uint16 trap, M68kReg
1232
1233		uint32 call_macos(uint32 tvect)
1234		{
1235	<	return current_cpu->execute_macos_code(tvect, 0, NULL);
1235	>	return ppc_cpu->execute_macos_code(tvect, 0, NULL);
1236		}
1237
1238		uint32 call_macos1(uint32 tvect, uint32 arg1)
1239		{
1240		const uint32 args[] = { arg1 };
1241	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1241	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1242		}
1243
1244		uint32 call_macos2(uint32 tvect, uint32 arg1, uint32 arg2)
1245		{
1246		const uint32 args[] = { arg1, arg2 };
1247	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1247	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1248		}
1249
1250		uint32 call_macos3(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3)
1251		{
1252		const uint32 args[] = { arg1, arg2, arg3 };
1253	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1253	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1254		}
1255
1256		uint32 call_macos4(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4)
1257		{
1258		const uint32 args[] = { arg1, arg2, arg3, arg4 };
1259	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1259	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1260		}
1261
1262		uint32 call_macos5(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5)
1263		{
1264		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5 };
1265	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1265	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1266		}
1267
1268		uint32 call_macos6(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6)
1269		{
1270		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6 };
1271	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1271	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1272		}
1273
1274		uint32 call_macos7(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6, uint32 arg7)
1275		{
1276		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6, arg7 };
1277	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1277	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1278		}
1279
1280		/*
#	Line 1388 | Line 1283 | uint32 call_macos7(uint32 tvect, uint32
1283
1284		void get_resource(void)
1285		{
1286	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1286	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1287		}
1288
1289		void get_1_resource(void)
1290		{
1291	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1291	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1292		}
1293
1294		void get_ind_resource(void)
1295		{
1296	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1296	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1297		}
1298
1299		void get_1_ind_resource(void)
1300		{
1301	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1301	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1302		}
1303
1304		void r_get_resource(void)
1305		{
1306	<	current_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1306	>	ppc_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1307		}

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