43 |
|
#include <stdio.h> |
44 |
|
#include <stdlib.h> |
45 |
|
|
46 |
+ |
#ifdef USE_SDL_VIDEO |
47 |
+ |
#include <SDL_events.h> |
48 |
+ |
#endif |
49 |
+ |
|
50 |
|
#if ENABLE_MON |
51 |
|
#include "mon.h" |
52 |
|
#include "mon_disass.h" |
56 |
|
#include "debug.h" |
57 |
|
|
58 |
|
// Emulation time statistics |
59 |
< |
#define EMUL_TIME_STATS 1 |
59 |
> |
#ifndef EMUL_TIME_STATS |
60 |
> |
#define EMUL_TIME_STATS 0 |
61 |
> |
#endif |
62 |
|
|
63 |
|
#if EMUL_TIME_STATS |
64 |
|
static clock_t emul_start_time; |
65 |
< |
static uint32 interrupt_count = 0; |
65 |
> |
static uint32 interrupt_count = 0, ppc_interrupt_count = 0; |
66 |
|
static clock_t interrupt_time = 0; |
67 |
|
static uint32 exec68k_count = 0; |
68 |
|
static clock_t exec68k_time = 0; |
90 |
|
// PowerPC EmulOp to exit from emulation looop |
91 |
|
const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1; |
92 |
|
|
87 |
– |
// Enable multicore (main/interrupts) cpu emulation? |
88 |
– |
#define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0) |
89 |
– |
|
93 |
|
// Enable interrupt routine safety checks? |
94 |
|
#define SAFE_INTERRUPT_PPC 1 |
95 |
|
|
450 |
|
status = COMPILE_CODE_OK; |
451 |
|
break; |
452 |
|
#endif |
450 |
– |
case NATIVE_DISABLE_INTERRUPT: |
451 |
– |
dg.gen_invoke(DisableInterrupt); |
452 |
– |
status = COMPILE_CODE_OK; |
453 |
– |
break; |
454 |
– |
case NATIVE_ENABLE_INTERRUPT: |
455 |
– |
dg.gen_invoke(EnableInterrupt); |
456 |
– |
status = COMPILE_CODE_OK; |
457 |
– |
break; |
453 |
|
case NATIVE_BITBLT: |
454 |
|
dg.gen_load_T0_GPR(3); |
455 |
|
dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt); |
467 |
|
break; |
468 |
|
} |
469 |
|
// Could we fully translate this NativeOp? |
470 |
< |
if (FN_field::test(opcode)) { |
471 |
< |
if (status != COMPILE_FAILURE) { |
470 |
> |
if (status == COMPILE_CODE_OK) { |
471 |
> |
if (!FN_field::test(opcode)) |
472 |
> |
cg_context.done_compile = false; |
473 |
> |
else { |
474 |
|
dg.gen_load_A0_LR(); |
475 |
|
dg.gen_set_PC_A0(); |
476 |
+ |
cg_context.done_compile = true; |
477 |
|
} |
480 |
– |
cg_context.done_compile = true; |
481 |
– |
break; |
482 |
– |
} |
483 |
– |
else if (status != COMPILE_FAILURE) { |
484 |
– |
cg_context.done_compile = false; |
478 |
|
break; |
479 |
|
} |
480 |
|
#if PPC_REENTRANT_JIT |
481 |
|
// Try to execute NativeOp trampoline |
482 |
< |
dg.gen_set_PC_im(cg_context.pc + 4); |
482 |
> |
if (!FN_field::test(opcode)) |
483 |
> |
dg.gen_set_PC_im(cg_context.pc + 4); |
484 |
> |
else { |
485 |
> |
dg.gen_load_A0_LR(); |
486 |
> |
dg.gen_set_PC_A0(); |
487 |
> |
} |
488 |
|
dg.gen_mov_32_T0_im(selector); |
489 |
|
dg.gen_jmp(native_op_trampoline); |
490 |
|
cg_context.done_compile = true; |
492 |
|
break; |
493 |
|
#endif |
494 |
|
// Invoke NativeOp handler |
495 |
< |
typedef void (*func_t)(dyngen_cpu_base, uint32); |
496 |
< |
func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr(); |
497 |
< |
dg.gen_invoke_CPU_im(func, selector); |
498 |
< |
cg_context.done_compile = false; |
499 |
< |
status = COMPILE_CODE_OK; |
495 |
> |
if (!FN_field::test(opcode)) { |
496 |
> |
typedef void (*func_t)(dyngen_cpu_base, uint32); |
497 |
> |
func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr(); |
498 |
> |
dg.gen_invoke_CPU_im(func, selector); |
499 |
> |
cg_context.done_compile = false; |
500 |
> |
status = COMPILE_CODE_OK; |
501 |
> |
} |
502 |
> |
// Otherwise, let it generate a call to execute_sheep() which |
503 |
> |
// will cause necessary updates to the program counter |
504 |
|
break; |
505 |
|
} |
506 |
|
|
594 |
|
void sheepshaver_cpu::interrupt(uint32 entry) |
595 |
|
{ |
596 |
|
#if EMUL_TIME_STATS |
597 |
< |
interrupt_count++; |
597 |
> |
ppc_interrupt_count++; |
598 |
|
const clock_t interrupt_start = clock(); |
599 |
|
#endif |
600 |
|
|
605 |
|
depth++; |
606 |
|
#endif |
607 |
|
|
606 |
– |
#if !MULTICORE_CPU |
608 |
|
// Save program counters and branch registers |
609 |
|
uint32 saved_pc = pc(); |
610 |
|
uint32 saved_lr = lr(); |
611 |
|
uint32 saved_ctr= ctr(); |
612 |
|
uint32 saved_sp = gpr(1); |
612 |
– |
#endif |
613 |
|
|
614 |
|
// Initialize stack pointer to SheepShaver alternate stack base |
615 |
|
gpr(1) = SignalStackBase() - 64; |
649 |
|
// Enter nanokernel |
650 |
|
execute(entry); |
651 |
|
|
652 |
– |
#if !MULTICORE_CPU |
652 |
|
// Restore program counters and branch registers |
653 |
|
pc() = saved_pc; |
654 |
|
lr() = saved_lr; |
655 |
|
ctr()= saved_ctr; |
656 |
|
gpr(1) = saved_sp; |
658 |
– |
#endif |
657 |
|
|
658 |
|
#if EMUL_TIME_STATS |
659 |
|
interrupt_time += (clock() - interrupt_start); |
855 |
|
* SheepShaver CPU engine interface |
856 |
|
**/ |
857 |
|
|
858 |
< |
static sheepshaver_cpu *main_cpu = NULL; // CPU emulator to handle usual control flow |
859 |
< |
static sheepshaver_cpu *interrupt_cpu = NULL; // CPU emulator to handle interrupts |
862 |
< |
static sheepshaver_cpu *current_cpu = NULL; // Current CPU emulator context |
858 |
> |
// PowerPC CPU emulator |
859 |
> |
static sheepshaver_cpu *ppc_cpu = NULL; |
860 |
|
|
861 |
|
void FlushCodeCache(uintptr start, uintptr end) |
862 |
|
{ |
863 |
|
D(bug("FlushCodeCache(%08x, %08x)\n", start, end)); |
864 |
< |
main_cpu->invalidate_cache_range(start, end); |
868 |
< |
#if MULTICORE_CPU |
869 |
< |
interrupt_cpu->invalidate_cache_range(start, end); |
870 |
< |
#endif |
871 |
< |
} |
872 |
< |
|
873 |
< |
static inline void cpu_push(sheepshaver_cpu *new_cpu) |
874 |
< |
{ |
875 |
< |
#if MULTICORE_CPU |
876 |
< |
current_cpu = new_cpu; |
877 |
< |
#endif |
878 |
< |
} |
879 |
< |
|
880 |
< |
static inline void cpu_pop() |
881 |
< |
{ |
882 |
< |
#if MULTICORE_CPU |
883 |
< |
current_cpu = main_cpu; |
884 |
< |
#endif |
864 |
> |
ppc_cpu->invalidate_cache_range(start, end); |
865 |
|
} |
866 |
|
|
867 |
|
// Dump PPC registers |
868 |
|
static void dump_registers(void) |
869 |
|
{ |
870 |
< |
current_cpu->dump_registers(); |
870 |
> |
ppc_cpu->dump_registers(); |
871 |
|
} |
872 |
|
|
873 |
|
// Dump log |
874 |
|
static void dump_log(void) |
875 |
|
{ |
876 |
< |
current_cpu->dump_log(); |
876 |
> |
ppc_cpu->dump_log(); |
877 |
|
} |
878 |
|
|
879 |
|
/* |
896 |
|
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
897 |
|
|
898 |
|
// Get program counter of target CPU |
899 |
< |
sheepshaver_cpu * const cpu = current_cpu; |
899 |
> |
sheepshaver_cpu * const cpu = ppc_cpu; |
900 |
|
const uint32 pc = cpu->pc(); |
901 |
|
|
902 |
|
// Fault in Mac ROM or RAM? |
903 |
< |
bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize)); |
903 |
> |
bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize)) || (pc >= DR_CACHE_BASE && pc < (DR_CACHE_BASE + DR_CACHE_SIZE)); |
904 |
|
if (mac_fault) { |
905 |
|
|
906 |
|
// "VM settings" during MacOS 8 installation |
920 |
|
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
921 |
|
else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000)) |
922 |
|
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
923 |
+ |
|
924 |
+ |
// MacOS 8.6 serial drivers on startup (with DR Cache and OldWorld ROM) |
925 |
+ |
else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(16) == 0xf3012002 || cpu->gpr(16) == 0xf3012000)) |
926 |
+ |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
927 |
+ |
else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000)) |
928 |
+ |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
929 |
|
|
930 |
|
// Ignore writes to the zero page |
931 |
|
else if ((uint32)(addr - SheepMem::ZeroPage()) < (uint32)SheepMem::PageSize()) |
942 |
|
printf("SIGSEGV\n"); |
943 |
|
printf(" pc %p\n", fault_instruction); |
944 |
|
printf(" ea %p\n", fault_address); |
959 |
– |
printf(" cpu %s\n", current_cpu == main_cpu ? "main" : "interrupts"); |
945 |
|
dump_registers(); |
946 |
< |
current_cpu->dump_log(); |
946 |
> |
ppc_cpu->dump_log(); |
947 |
|
enter_mon(); |
948 |
|
QuitEmulator(); |
949 |
|
|
953 |
|
void init_emul_ppc(void) |
954 |
|
{ |
955 |
|
// Initialize main CPU emulator |
956 |
< |
main_cpu = new sheepshaver_cpu(); |
957 |
< |
main_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000)); |
958 |
< |
main_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000)); |
956 |
> |
ppc_cpu = new sheepshaver_cpu(); |
957 |
> |
ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000)); |
958 |
> |
ppc_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000)); |
959 |
|
WriteMacInt32(XLM_RUN_MODE, MODE_68K); |
960 |
|
|
976 |
– |
#if MULTICORE_CPU |
977 |
– |
// Initialize alternate CPU emulator to handle interrupts |
978 |
– |
interrupt_cpu = new sheepshaver_cpu(); |
979 |
– |
#endif |
980 |
– |
|
961 |
|
// Install the handler for SIGSEGV |
962 |
|
sigsegv_install_handler(sigsegv_handler); |
963 |
|
|
986 |
|
printf("Total emulation time : %.1f sec\n", double(emul_time) / double(CLOCKS_PER_SEC)); |
987 |
|
printf("Total interrupt count: %d (%2.1f Hz)\n", interrupt_count, |
988 |
|
(double(interrupt_count) * CLOCKS_PER_SEC) / double(emul_time)); |
989 |
+ |
printf("Total ppc interrupt count: %d (%2.1f %%)\n", ppc_interrupt_count, |
990 |
+ |
(double(ppc_interrupt_count) * 100.0) / double(interrupt_count)); |
991 |
|
|
992 |
|
#define PRINT_STATS(LABEL, VAR_PREFIX) do { \ |
993 |
|
printf("Total " LABEL " count : %d\n", VAR_PREFIX##_count); \ |
1004 |
|
printf("\n"); |
1005 |
|
#endif |
1006 |
|
|
1007 |
< |
delete main_cpu; |
1026 |
< |
#if MULTICORE_CPU |
1027 |
< |
delete interrupt_cpu; |
1028 |
< |
#endif |
1007 |
> |
delete ppc_cpu; |
1008 |
|
} |
1009 |
|
|
1010 |
|
#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT |
1039 |
|
|
1040 |
|
void emul_ppc(uint32 entry) |
1041 |
|
{ |
1063 |
– |
current_cpu = main_cpu; |
1042 |
|
#if 0 |
1043 |
< |
current_cpu->start_log(); |
1043 |
> |
ppc_cpu->start_log(); |
1044 |
|
#endif |
1045 |
|
// start emulation loop and enable code translation or caching |
1046 |
< |
current_cpu->execute(entry); |
1046 |
> |
ppc_cpu->execute(entry); |
1047 |
|
} |
1048 |
|
|
1049 |
|
/* |
1050 |
|
* Handle PowerPC interrupt |
1051 |
|
*/ |
1052 |
|
|
1075 |
– |
#if ASYNC_IRQ |
1076 |
– |
void HandleInterrupt(void) |
1077 |
– |
{ |
1078 |
– |
main_cpu->handle_interrupt(); |
1079 |
– |
} |
1080 |
– |
#else |
1053 |
|
void TriggerInterrupt(void) |
1054 |
|
{ |
1055 |
|
#if 0 |
1056 |
|
WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1); |
1057 |
|
#else |
1058 |
|
// Trigger interrupt to main cpu only |
1059 |
< |
if (main_cpu) |
1060 |
< |
main_cpu->trigger_interrupt(); |
1059 |
> |
if (ppc_cpu) |
1060 |
> |
ppc_cpu->trigger_interrupt(); |
1061 |
|
#endif |
1062 |
|
} |
1091 |
– |
#endif |
1063 |
|
|
1064 |
|
void sheepshaver_cpu::handle_interrupt(void) |
1065 |
|
{ |
1066 |
+ |
#ifdef USE_SDL_VIDEO |
1067 |
+ |
// We must fill in the events queue in the same thread that did call SDL_SetVideoMode() |
1068 |
+ |
SDL_PumpEvents(); |
1069 |
+ |
#endif |
1070 |
+ |
|
1071 |
|
// Do nothing if interrupts are disabled |
1072 |
< |
if (*(int32 *)XLM_IRQ_NEST > 0) |
1072 |
> |
if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0) |
1073 |
|
return; |
1074 |
|
|
1075 |
< |
// Do nothing if there is no interrupt pending |
1076 |
< |
if (InterruptFlags == 0) |
1077 |
< |
return; |
1075 |
> |
// Current interrupt nest level |
1076 |
> |
static int interrupt_depth = 0; |
1077 |
> |
++interrupt_depth; |
1078 |
> |
#if EMUL_TIME_STATS |
1079 |
> |
interrupt_count++; |
1080 |
> |
#endif |
1081 |
|
|
1082 |
|
// Disable MacOS stack sniffer |
1083 |
|
WriteMacInt32(0x110, 0); |
1086 |
|
switch (ReadMacInt32(XLM_RUN_MODE)) { |
1087 |
|
case MODE_68K: |
1088 |
|
// 68k emulator active, trigger 68k interrupt level 1 |
1110 |
– |
assert(current_cpu == main_cpu); |
1089 |
|
WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1); |
1090 |
|
set_cr(get_cr() | tswap32(kernel_data->v[0x674 >> 2])); |
1091 |
|
break; |
1093 |
|
#if INTERRUPTS_IN_NATIVE_MODE |
1094 |
|
case MODE_NATIVE: |
1095 |
|
// 68k emulator inactive, in nanokernel? |
1096 |
< |
assert(current_cpu == main_cpu); |
1119 |
< |
if (gpr(1) != KernelDataAddr) { |
1096 |
> |
if (gpr(1) != KernelDataAddr && interrupt_depth == 1) { |
1097 |
|
interrupt_context ctx(this, "PowerPC mode"); |
1098 |
|
|
1099 |
|
// Prepare for 68k interrupt level 1 |
1104 |
|
|
1105 |
|
// Execute nanokernel interrupt routine (this will activate the 68k emulator) |
1106 |
|
DisableInterrupt(); |
1130 |
– |
cpu_push(interrupt_cpu); |
1107 |
|
if (ROMType == ROMTYPE_NEWWORLD) |
1108 |
< |
current_cpu->interrupt(ROM_BASE + 0x312b1c); |
1108 |
> |
ppc_cpu->interrupt(ROM_BASE + 0x312b1c); |
1109 |
|
else |
1110 |
< |
current_cpu->interrupt(ROM_BASE + 0x312a3c); |
1135 |
< |
cpu_pop(); |
1110 |
> |
ppc_cpu->interrupt(ROM_BASE + 0x312a3c); |
1111 |
|
} |
1112 |
|
break; |
1113 |
|
#endif |
1117 |
|
// 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0 |
1118 |
|
if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) { |
1119 |
|
interrupt_context ctx(this, "68k mode"); |
1120 |
+ |
#if EMUL_TIME_STATS |
1121 |
+ |
const clock_t interrupt_start = clock(); |
1122 |
+ |
#endif |
1123 |
|
#if 1 |
1124 |
|
// Execute full 68k interrupt routine |
1125 |
|
M68kRegisters r; |
1145 |
|
} |
1146 |
|
} |
1147 |
|
#endif |
1148 |
+ |
#if EMUL_TIME_STATS |
1149 |
+ |
interrupt_time += (clock() - interrupt_start); |
1150 |
+ |
#endif |
1151 |
|
} |
1152 |
|
break; |
1153 |
|
#endif |
1154 |
|
} |
1155 |
+ |
|
1156 |
+ |
// We are done with this interrupt |
1157 |
+ |
--interrupt_depth; |
1158 |
|
} |
1159 |
|
|
1160 |
|
static void get_resource(void); |
1267 |
|
get_resource_callbacks[selector - NATIVE_GET_RESOURCE](); |
1268 |
|
break; |
1269 |
|
} |
1286 |
– |
case NATIVE_DISABLE_INTERRUPT: |
1287 |
– |
DisableInterrupt(); |
1288 |
– |
break; |
1289 |
– |
case NATIVE_ENABLE_INTERRUPT: |
1290 |
– |
EnableInterrupt(); |
1291 |
– |
break; |
1270 |
|
case NATIVE_MAKE_EXECUTABLE: |
1271 |
|
MakeExecutable(0, (void *)gpr(4), gpr(5)); |
1272 |
|
break; |
1292 |
|
|
1293 |
|
void Execute68k(uint32 pc, M68kRegisters *r) |
1294 |
|
{ |
1295 |
< |
current_cpu->execute_68k(pc, r); |
1295 |
> |
ppc_cpu->execute_68k(pc, r); |
1296 |
|
} |
1297 |
|
|
1298 |
|
/* |
1315 |
|
|
1316 |
|
uint32 call_macos(uint32 tvect) |
1317 |
|
{ |
1318 |
< |
return current_cpu->execute_macos_code(tvect, 0, NULL); |
1318 |
> |
return ppc_cpu->execute_macos_code(tvect, 0, NULL); |
1319 |
|
} |
1320 |
|
|
1321 |
|
uint32 call_macos1(uint32 tvect, uint32 arg1) |
1322 |
|
{ |
1323 |
|
const uint32 args[] = { arg1 }; |
1324 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1324 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1325 |
|
} |
1326 |
|
|
1327 |
|
uint32 call_macos2(uint32 tvect, uint32 arg1, uint32 arg2) |
1328 |
|
{ |
1329 |
|
const uint32 args[] = { arg1, arg2 }; |
1330 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1330 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1331 |
|
} |
1332 |
|
|
1333 |
|
uint32 call_macos3(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3) |
1334 |
|
{ |
1335 |
|
const uint32 args[] = { arg1, arg2, arg3 }; |
1336 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1336 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1337 |
|
} |
1338 |
|
|
1339 |
|
uint32 call_macos4(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4) |
1340 |
|
{ |
1341 |
|
const uint32 args[] = { arg1, arg2, arg3, arg4 }; |
1342 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1342 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1343 |
|
} |
1344 |
|
|
1345 |
|
uint32 call_macos5(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5) |
1346 |
|
{ |
1347 |
|
const uint32 args[] = { arg1, arg2, arg3, arg4, arg5 }; |
1348 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1348 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1349 |
|
} |
1350 |
|
|
1351 |
|
uint32 call_macos6(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6) |
1352 |
|
{ |
1353 |
|
const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6 }; |
1354 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1354 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1355 |
|
} |
1356 |
|
|
1357 |
|
uint32 call_macos7(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6, uint32 arg7) |
1358 |
|
{ |
1359 |
|
const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6, arg7 }; |
1360 |
< |
return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1360 |
> |
return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args); |
1361 |
|
} |
1362 |
|
|
1363 |
|
/* |
1366 |
|
|
1367 |
|
void get_resource(void) |
1368 |
|
{ |
1369 |
< |
current_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE)); |
1369 |
> |
ppc_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE)); |
1370 |
|
} |
1371 |
|
|
1372 |
|
void get_1_resource(void) |
1373 |
|
{ |
1374 |
< |
current_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE)); |
1374 |
> |
ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE)); |
1375 |
|
} |
1376 |
|
|
1377 |
|
void get_ind_resource(void) |
1378 |
|
{ |
1379 |
< |
current_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE)); |
1379 |
> |
ppc_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE)); |
1380 |
|
} |
1381 |
|
|
1382 |
|
void get_1_ind_resource(void) |
1383 |
|
{ |
1384 |
< |
current_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE)); |
1384 |
> |
ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE)); |
1385 |
|
} |
1386 |
|
|
1387 |
|
void r_get_resource(void) |
1388 |
|
{ |
1389 |
< |
current_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE)); |
1389 |
> |
ppc_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE)); |
1390 |
|
} |