| 40 |
|
#include "ether.h" |
| 41 |
|
|
| 42 |
|
#include <stdio.h> |
| 43 |
+ |
#include <stdlib.h> |
| 44 |
|
|
| 45 |
|
#if ENABLE_MON |
| 46 |
|
#include "mon.h" |
| 159 |
|
void interrupt(uint32 entry); |
| 160 |
|
void handle_interrupt(); |
| 161 |
|
|
| 161 |
– |
// Lazy memory allocator (one item at a time) |
| 162 |
– |
void *operator new(size_t size) |
| 163 |
– |
{ return allocator_helper< sheepshaver_cpu, lazy_allocator >::allocate(); } |
| 164 |
– |
void operator delete(void *p) |
| 165 |
– |
{ allocator_helper< sheepshaver_cpu, lazy_allocator >::deallocate(p); } |
| 166 |
– |
// FIXME: really make surre array allocation fail at link time? |
| 167 |
– |
void *operator new[](size_t); |
| 168 |
– |
void operator delete[](void *p); |
| 169 |
– |
|
| 162 |
|
// Make sure the SIGSEGV handler can access CPU registers |
| 163 |
|
friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t); |
| 164 |
|
}; |
| 165 |
|
|
| 166 |
< |
lazy_allocator< sheepshaver_cpu > allocator_helper< sheepshaver_cpu, lazy_allocator >::allocator; |
| 166 |
> |
// Memory allocator returning areas aligned on 16-byte boundaries |
| 167 |
> |
void *operator new(size_t size) |
| 168 |
> |
{ |
| 169 |
> |
void *p; |
| 170 |
> |
|
| 171 |
> |
#if defined(HAVE_POSIX_MEMALIGN) |
| 172 |
> |
if (posix_memalign(&p, 16, size) != 0) |
| 173 |
> |
throw std::bad_alloc(); |
| 174 |
> |
#elif defined(HAVE_MEMALIGN) |
| 175 |
> |
p = memalign(16, size); |
| 176 |
> |
#elif defined(HAVE_VALLOC) |
| 177 |
> |
p = valloc(size); // page-aligned! |
| 178 |
> |
#else |
| 179 |
> |
/* XXX: handle padding ourselves */ |
| 180 |
> |
p = malloc(size); |
| 181 |
> |
#endif |
| 182 |
> |
|
| 183 |
> |
return p; |
| 184 |
> |
} |
| 185 |
> |
|
| 186 |
> |
void operator delete(void *p) |
| 187 |
> |
{ |
| 188 |
> |
#if defined(HAVE_MEMALIGN) || defined(HAVE_VALLOC) |
| 189 |
> |
#if defined(__GLIBC__) |
| 190 |
> |
// this is known to work only with GNU libc |
| 191 |
> |
free(p); |
| 192 |
> |
#endif |
| 193 |
> |
#else |
| 194 |
> |
free(p); |
| 195 |
> |
#endif |
| 196 |
> |
} |
| 197 |
|
|
| 198 |
|
sheepshaver_cpu::sheepshaver_cpu() |
| 199 |
|
: powerpc_cpu(enable_jit_p()) |
| 225 |
|
static void NativeOp(int selector); |
| 226 |
|
|
| 227 |
|
/* NativeOp instruction format: |
| 228 |
< |
+------------+--------------------------+--+----------+------------+ |
| 229 |
< |
| 6 | |FN| OP | 2 | |
| 230 |
< |
+------------+--------------------------+--+----------+------------+ |
| 231 |
< |
0 5 |6 19 20 21 25 26 31 |
| 228 |
> |
+------------+-------------------------+--+-----------+------------+ |
| 229 |
> |
| 6 | |FN| OP | 2 | |
| 230 |
> |
+------------+-------------------------+--+-----------+------------+ |
| 231 |
> |
0 5 |6 18 19 20 25 26 31 |
| 232 |
|
*/ |
| 233 |
|
|
| 234 |
< |
typedef bit_field< 20, 20 > FN_field; |
| 235 |
< |
typedef bit_field< 21, 25 > NATIVE_OP_field; |
| 234 |
> |
typedef bit_field< 19, 19 > FN_field; |
| 235 |
> |
typedef bit_field< 20, 25 > NATIVE_OP_field; |
| 236 |
|
typedef bit_field< 26, 31 > EMUL_OP_field; |
| 237 |
|
|
| 238 |
|
// Execute EMUL_OP routine |
| 362 |
|
dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))check_load_invoc); |
| 363 |
|
compiled = true; |
| 364 |
|
break; |
| 365 |
+ |
case NATIVE_BITBLT: |
| 366 |
+ |
dg.gen_load_T0_GPR(3); |
| 367 |
+ |
dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt); |
| 368 |
+ |
compiled = true; |
| 369 |
+ |
break; |
| 370 |
+ |
case NATIVE_INVRECT: |
| 371 |
+ |
dg.gen_load_T0_GPR(3); |
| 372 |
+ |
dg.gen_invoke_T0((void (*)(uint32))NQD_invrect); |
| 373 |
+ |
compiled = true; |
| 374 |
+ |
break; |
| 375 |
+ |
case NATIVE_FILLRECT: |
| 376 |
+ |
dg.gen_load_T0_GPR(3); |
| 377 |
+ |
dg.gen_invoke_T0((void (*)(uint32))NQD_fillrect); |
| 378 |
+ |
compiled = true; |
| 379 |
+ |
break; |
| 380 |
|
} |
| 381 |
|
if (FN_field::test(opcode)) { |
| 382 |
|
if (compiled) { |
| 746 |
|
else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000)) |
| 747 |
|
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
| 748 |
|
|
| 749 |
+ |
// Ignore writes to the zero page |
| 750 |
+ |
else if ((uint32)(addr - SheepMem::ZeroPage()) < (uint32)SheepMem::PageSize()) |
| 751 |
+ |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
| 752 |
+ |
|
| 753 |
|
// Ignore all other faults, if requested |
| 754 |
|
if (PrefsFindBool("ignoresegv")) |
| 755 |
|
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
| 1006 |
|
GPR(3) = false; |
| 1007 |
|
break; |
| 1008 |
|
#endif |
| 1009 |
+ |
case NATIVE_SYNC_HOOK: |
| 1010 |
+ |
GPR(3) = NQD_sync_hook(GPR(3)); |
| 1011 |
+ |
break; |
| 1012 |
+ |
case NATIVE_BITBLT_HOOK: |
| 1013 |
+ |
GPR(3) = NQD_bitblt_hook(GPR(3)); |
| 1014 |
+ |
break; |
| 1015 |
+ |
case NATIVE_BITBLT: |
| 1016 |
+ |
NQD_bitblt(GPR(3)); |
| 1017 |
+ |
break; |
| 1018 |
+ |
case NATIVE_FILLRECT_HOOK: |
| 1019 |
+ |
GPR(3) = NQD_fillrect_hook(GPR(3)); |
| 1020 |
+ |
break; |
| 1021 |
+ |
case NATIVE_INVRECT: |
| 1022 |
+ |
NQD_invrect(GPR(3)); |
| 1023 |
+ |
break; |
| 1024 |
+ |
case NATIVE_FILLRECT: |
| 1025 |
+ |
NQD_fillrect(GPR(3)); |
| 1026 |
+ |
break; |
| 1027 |
|
case NATIVE_SERIAL_NOTHING: |
| 1028 |
|
case NATIVE_SERIAL_OPEN: |
| 1029 |
|
case NATIVE_SERIAL_PRIME_IN: |
