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/* |
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* sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface |
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* |
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< |
* SheepShaver (C) 1997-2002 Christian Bauer and Marc Hellwig |
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* SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License as published by |
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#include "sigsegv.h" |
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#include "cpu/ppc/ppc-cpu.hpp" |
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#include "cpu/ppc/ppc-operations.hpp" |
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#include "cpu/ppc/ppc-instructions.hpp" |
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#include "thunks.h" |
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|
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// Used for NativeOp trampolines |
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#include "video.h" |
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#include "name_registry.h" |
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#include "serial.h" |
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#include "ether.h" |
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|
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#include <stdio.h> |
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#include <stdlib.h> |
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|
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#if ENABLE_MON |
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#include "mon.h" |
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#endif |
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} |
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|
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// From main_*.cpp |
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extern uintptr SignalStackBase(); |
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|
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// From rsrc_patches.cpp |
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extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h); |
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|
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// PowerPC EmulOp to exit from emulation looop |
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const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1; |
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|
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// Enable multicore (main/interrupts) cpu emulation? |
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#define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0) |
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|
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// Pointer to Kernel Data |
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static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE; |
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|
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// SIGSEGV handler |
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static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t); |
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|
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// JIT Compiler enabled? |
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static inline bool enable_jit_p() |
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{ |
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return PrefsFindBool("jit"); |
111 |
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} |
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|
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|
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/** |
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* PowerPC emulator glue with special 'sheep' opcodes |
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**/ |
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|
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enum { |
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PPC_I(SHEEP) = PPC_I(MAX), |
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PPC_I(SHEEP_MAX) |
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}; |
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|
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class sheepshaver_cpu |
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: public powerpc_cpu |
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{ |
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// Constructor |
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sheepshaver_cpu(); |
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|
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// Condition Register accessors |
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// CR & XER accessors |
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uint32 get_cr() const { return cr().get(); } |
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void set_cr(uint32 v) { cr().set(v); } |
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uint32 get_xer() const { return xer().get(); } |
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void set_xer(uint32 v) { xer().set(v); } |
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|
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// Execution loop |
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void execute(uint32 entry, bool enable_cache = false); |
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// Execute EMUL_OP routine |
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void execute_emul_op(uint32 emul_op); |
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|
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// Execute 68k routine |
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void execute_68k(uint32 entry, M68kRegisters *r); |
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// Execute MacOS/PPC code |
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uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args); |
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|
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// Compile one instruction |
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virtual bool compile1(codegen_context_t & cg_context); |
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|
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// Resource manager thunk |
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void get_resource(uint32 old_get_resource); |
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|
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void interrupt(uint32 entry); |
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void handle_interrupt(); |
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|
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// Lazy memory allocator (one item at a time) |
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void *operator new(size_t size) |
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{ return allocator_helper< sheepshaver_cpu, lazy_allocator >::allocate(); } |
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void operator delete(void *p) |
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{ allocator_helper< sheepshaver_cpu, lazy_allocator >::deallocate(p); } |
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// FIXME: really make surre array allocation fail at link time? |
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void *operator new[](size_t); |
137 |
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void operator delete[](void *p); |
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// Make sure the SIGSEGV handler can access CPU registers |
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friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t); |
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}; |
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|
166 |
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lazy_allocator< sheepshaver_cpu > allocator_helper< sheepshaver_cpu, lazy_allocator >::allocator; |
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// Memory allocator returning areas aligned on 16-byte boundaries |
167 |
> |
void *operator new(size_t size) |
168 |
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{ |
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void *p; |
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|
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#if defined(HAVE_POSIX_MEMALIGN) |
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if (posix_memalign(&p, 16, size) != 0) |
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throw std::bad_alloc(); |
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#elif defined(HAVE_MEMALIGN) |
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p = memalign(16, size); |
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#elif defined(HAVE_VALLOC) |
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p = valloc(size); // page-aligned! |
178 |
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#else |
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/* XXX: handle padding ourselves */ |
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p = malloc(size); |
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#endif |
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|
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return p; |
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} |
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|
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void operator delete(void *p) |
187 |
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{ |
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#if defined(HAVE_MEMALIGN) || defined(HAVE_VALLOC) |
189 |
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#if defined(__GLIBC__) |
190 |
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// this is known to work only with GNU libc |
191 |
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free(p); |
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#endif |
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#else |
194 |
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free(p); |
195 |
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#endif |
196 |
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} |
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|
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sheepshaver_cpu::sheepshaver_cpu() |
199 |
< |
: powerpc_cpu() |
199 |
> |
: powerpc_cpu(enable_jit_p()) |
200 |
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{ |
201 |
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init_decoder(); |
202 |
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} |
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|
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void sheepshaver_cpu::init_decoder() |
205 |
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{ |
150 |
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#ifndef PPC_NO_STATIC_II_INDEX_TABLE |
151 |
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static bool initialized = false; |
152 |
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if (initialized) |
153 |
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return; |
154 |
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initialized = true; |
155 |
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#endif |
156 |
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|
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static const instr_info_t sheep_ii_table[] = { |
207 |
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{ "sheep", |
208 |
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(execute_pmf)&sheepshaver_cpu::execute_sheep, |
209 |
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NULL, |
210 |
+ |
PPC_I(SHEEP), |
211 |
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D_form, 6, 0, CFLOW_JUMP | CFLOW_TRAP |
212 |
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} |
213 |
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}; |
225 |
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static void NativeOp(int selector); |
226 |
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|
227 |
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/* NativeOp instruction format: |
228 |
< |
+------------+--------------------------+--+----------+------------+ |
229 |
< |
| 6 | |FN| OP | 2 | |
230 |
< |
+------------+--------------------------+--+----------+------------+ |
231 |
< |
0 5 |6 19 20 21 25 26 31 |
228 |
> |
+------------+-------------------------+--+-----------+------------+ |
229 |
> |
| 6 | |FN| OP | 2 | |
230 |
> |
+------------+-------------------------+--+-----------+------------+ |
231 |
> |
0 5 |6 18 19 20 25 26 31 |
232 |
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*/ |
233 |
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|
234 |
< |
typedef bit_field< 20, 20 > FN_field; |
235 |
< |
typedef bit_field< 21, 25 > NATIVE_OP_field; |
234 |
> |
typedef bit_field< 19, 19 > FN_field; |
235 |
> |
typedef bit_field< 20, 25 > NATIVE_OP_field; |
236 |
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typedef bit_field< 26, 31 > EMUL_OP_field; |
237 |
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|
238 |
+ |
// Execute EMUL_OP routine |
239 |
+ |
void sheepshaver_cpu::execute_emul_op(uint32 emul_op) |
240 |
+ |
{ |
241 |
+ |
M68kRegisters r68; |
242 |
+ |
WriteMacInt32(XLM_68K_R25, gpr(25)); |
243 |
+ |
WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP); |
244 |
+ |
for (int i = 0; i < 8; i++) |
245 |
+ |
r68.d[i] = gpr(8 + i); |
246 |
+ |
for (int i = 0; i < 7; i++) |
247 |
+ |
r68.a[i] = gpr(16 + i); |
248 |
+ |
r68.a[7] = gpr(1); |
249 |
+ |
uint32 saved_cr = get_cr() & CR_field<2>::mask(); |
250 |
+ |
uint32 saved_xer = get_xer(); |
251 |
+ |
EmulOp(&r68, gpr(24), emul_op); |
252 |
+ |
set_cr(saved_cr); |
253 |
+ |
set_xer(saved_xer); |
254 |
+ |
for (int i = 0; i < 8; i++) |
255 |
+ |
gpr(8 + i) = r68.d[i]; |
256 |
+ |
for (int i = 0; i < 7; i++) |
257 |
+ |
gpr(16 + i) = r68.a[i]; |
258 |
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gpr(1) = r68.a[7]; |
259 |
+ |
WriteMacInt32(XLM_RUN_MODE, MODE_68K); |
260 |
+ |
} |
261 |
+ |
|
262 |
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// Execute SheepShaver instruction |
263 |
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void sheepshaver_cpu::execute_sheep(uint32 opcode) |
264 |
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{ |
282 |
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pc() += 4; |
283 |
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break; |
284 |
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|
285 |
< |
default: { // EMUL_OP |
286 |
< |
M68kRegisters r68; |
213 |
< |
WriteMacInt32(XLM_68K_R25, gpr(25)); |
214 |
< |
WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP); |
215 |
< |
for (int i = 0; i < 8; i++) |
216 |
< |
r68.d[i] = gpr(8 + i); |
217 |
< |
for (int i = 0; i < 7; i++) |
218 |
< |
r68.a[i] = gpr(16 + i); |
219 |
< |
r68.a[7] = gpr(1); |
220 |
< |
EmulOp(&r68, gpr(24), EMUL_OP_field::extract(opcode) - 3); |
221 |
< |
for (int i = 0; i < 8; i++) |
222 |
< |
gpr(8 + i) = r68.d[i]; |
223 |
< |
for (int i = 0; i < 7; i++) |
224 |
< |
gpr(16 + i) = r68.a[i]; |
225 |
< |
gpr(1) = r68.a[7]; |
226 |
< |
WriteMacInt32(XLM_RUN_MODE, MODE_68K); |
285 |
> |
default: // EMUL_OP |
286 |
> |
execute_emul_op(EMUL_OP_field::extract(opcode) - 3); |
287 |
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pc() += 4; |
288 |
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break; |
289 |
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} |
230 |
– |
} |
290 |
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} |
291 |
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|
292 |
< |
// Execution loop |
293 |
< |
void sheepshaver_cpu::execute(uint32 entry, bool enable_cache) |
292 |
> |
// Compile one instruction |
293 |
> |
bool sheepshaver_cpu::compile1(codegen_context_t & cg_context) |
294 |
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{ |
295 |
< |
powerpc_cpu::execute(entry, enable_cache); |
295 |
> |
#if PPC_ENABLE_JIT |
296 |
> |
const instr_info_t *ii = cg_context.instr_info; |
297 |
> |
if (ii->mnemo != PPC_I(SHEEP)) |
298 |
> |
return false; |
299 |
> |
|
300 |
> |
bool compiled = false; |
301 |
> |
powerpc_dyngen & dg = cg_context.codegen; |
302 |
> |
uint32 opcode = cg_context.opcode; |
303 |
> |
|
304 |
> |
switch (opcode & 0x3f) { |
305 |
> |
case 0: // EMUL_RETURN |
306 |
> |
dg.gen_invoke(QuitEmulator); |
307 |
> |
compiled = true; |
308 |
> |
break; |
309 |
> |
|
310 |
> |
case 1: // EXEC_RETURN |
311 |
> |
dg.gen_spcflags_set(SPCFLAG_CPU_EXEC_RETURN); |
312 |
> |
compiled = true; |
313 |
> |
break; |
314 |
> |
|
315 |
> |
case 2: { // EXEC_NATIVE |
316 |
> |
uint32 selector = NATIVE_OP_field::extract(opcode); |
317 |
> |
switch (selector) { |
318 |
> |
case NATIVE_PATCH_NAME_REGISTRY: |
319 |
> |
dg.gen_invoke(DoPatchNameRegistry); |
320 |
> |
compiled = true; |
321 |
> |
break; |
322 |
> |
case NATIVE_VIDEO_INSTALL_ACCEL: |
323 |
> |
dg.gen_invoke(VideoInstallAccel); |
324 |
> |
compiled = true; |
325 |
> |
break; |
326 |
> |
case NATIVE_VIDEO_VBL: |
327 |
> |
dg.gen_invoke(VideoVBL); |
328 |
> |
compiled = true; |
329 |
> |
break; |
330 |
> |
case NATIVE_GET_RESOURCE: |
331 |
> |
case NATIVE_GET_1_RESOURCE: |
332 |
> |
case NATIVE_GET_IND_RESOURCE: |
333 |
> |
case NATIVE_GET_1_IND_RESOURCE: |
334 |
> |
case NATIVE_R_GET_RESOURCE: { |
335 |
> |
static const uint32 get_resource_ptr[] = { |
336 |
> |
XLM_GET_RESOURCE, |
337 |
> |
XLM_GET_1_RESOURCE, |
338 |
> |
XLM_GET_IND_RESOURCE, |
339 |
> |
XLM_GET_1_IND_RESOURCE, |
340 |
> |
XLM_R_GET_RESOURCE |
341 |
> |
}; |
342 |
> |
uint32 old_get_resource = ReadMacInt32(get_resource_ptr[selector - NATIVE_GET_RESOURCE]); |
343 |
> |
typedef void (*func_t)(dyngen_cpu_base, uint32); |
344 |
> |
func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::get_resource).ptr(); |
345 |
> |
dg.gen_invoke_CPU_im(func, old_get_resource); |
346 |
> |
compiled = true; |
347 |
> |
break; |
348 |
> |
} |
349 |
> |
case NATIVE_DISABLE_INTERRUPT: |
350 |
> |
dg.gen_invoke(DisableInterrupt); |
351 |
> |
compiled = true; |
352 |
> |
break; |
353 |
> |
case NATIVE_ENABLE_INTERRUPT: |
354 |
> |
dg.gen_invoke(EnableInterrupt); |
355 |
> |
compiled = true; |
356 |
> |
break; |
357 |
> |
case NATIVE_CHECK_LOAD_INVOC: |
358 |
> |
dg.gen_load_T0_GPR(3); |
359 |
> |
dg.gen_load_T1_GPR(4); |
360 |
> |
dg.gen_se_16_32_T1(); |
361 |
> |
dg.gen_load_T2_GPR(5); |
362 |
> |
dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))check_load_invoc); |
363 |
> |
compiled = true; |
364 |
> |
break; |
365 |
> |
case NATIVE_BITBLT: |
366 |
> |
dg.gen_load_T0_GPR(3); |
367 |
> |
dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt); |
368 |
> |
compiled = true; |
369 |
> |
break; |
370 |
> |
case NATIVE_INVRECT: |
371 |
> |
dg.gen_load_T0_GPR(3); |
372 |
> |
dg.gen_invoke_T0((void (*)(uint32))NQD_invrect); |
373 |
> |
compiled = true; |
374 |
> |
break; |
375 |
> |
case NATIVE_FILLRECT: |
376 |
> |
dg.gen_load_T0_GPR(3); |
377 |
> |
dg.gen_invoke_T0((void (*)(uint32))NQD_fillrect); |
378 |
> |
compiled = true; |
379 |
> |
break; |
380 |
> |
} |
381 |
> |
if (FN_field::test(opcode)) { |
382 |
> |
if (compiled) { |
383 |
> |
dg.gen_load_A0_LR(); |
384 |
> |
dg.gen_set_PC_A0(); |
385 |
> |
} |
386 |
> |
cg_context.done_compile = true; |
387 |
> |
} |
388 |
> |
else |
389 |
> |
cg_context.done_compile = false; |
390 |
> |
break; |
391 |
> |
} |
392 |
> |
|
393 |
> |
default: { // EMUL_OP |
394 |
> |
typedef void (*func_t)(dyngen_cpu_base, uint32); |
395 |
> |
func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr(); |
396 |
> |
dg.gen_invoke_CPU_im(func, EMUL_OP_field::extract(opcode) - 3); |
397 |
> |
cg_context.done_compile = false; |
398 |
> |
compiled = true; |
399 |
> |
break; |
400 |
> |
} |
401 |
> |
} |
402 |
> |
return compiled; |
403 |
> |
#endif |
404 |
> |
return false; |
405 |
|
} |
406 |
|
|
407 |
|
// Handle MacOS interrupt |
421 |
|
#endif |
422 |
|
|
423 |
|
// Initialize stack pointer to SheepShaver alternate stack base |
424 |
< |
gpr(1) = SheepStack1Base - 64; |
424 |
> |
gpr(1) = SignalStackBase() - 64; |
425 |
|
|
426 |
|
// Build trampoline to return from interrupt |
427 |
< |
uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) }; |
427 |
> |
SheepVar32 trampoline = POWERPC_EXEC_RETURN; |
428 |
|
|
429 |
|
// Prepare registers for nanokernel interrupt routine |
430 |
|
kernel_data->v[0x004 >> 2] = htonl(gpr(1)); |
443 |
|
gpr(1) = KernelDataAddr; |
444 |
|
gpr(7) = ntohl(kernel_data->v[0x660 >> 2]); |
445 |
|
gpr(8) = 0; |
446 |
< |
gpr(10) = (uint32)trampoline; |
447 |
< |
gpr(12) = (uint32)trampoline; |
446 |
> |
gpr(10) = trampoline.addr(); |
447 |
> |
gpr(12) = trampoline.addr(); |
448 |
|
gpr(13) = get_cr(); |
449 |
|
|
450 |
|
// rlwimi. r7,r7,8,0,0 |
581 |
|
uint32 saved_ctr= ctr(); |
582 |
|
|
583 |
|
// Build trampoline with EXEC_RETURN |
584 |
< |
uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) }; |
585 |
< |
lr() = (uint32)trampoline; |
584 |
> |
SheepVar32 trampoline = POWERPC_EXEC_RETURN; |
585 |
> |
lr() = trampoline.addr(); |
586 |
|
|
587 |
|
gpr(1) -= 64; // Create stack frame |
588 |
|
uint32 proc = ReadMacInt32(tvect); // Get routine address |
626 |
|
// Save branch registers |
627 |
|
uint32 saved_lr = lr(); |
628 |
|
|
629 |
< |
const uint32 trampoline[] = { htonl(POWERPC_EMUL_OP | 1) }; |
630 |
< |
lr() = (uint32)trampoline; |
629 |
> |
SheepVar32 trampoline = POWERPC_EXEC_RETURN; |
630 |
> |
WriteMacInt32(trampoline.addr(), POWERPC_EXEC_RETURN); |
631 |
> |
lr() = trampoline.addr(); |
632 |
|
|
633 |
|
execute(entry); |
634 |
|
|
637 |
|
} |
638 |
|
|
639 |
|
// Resource Manager thunk |
471 |
– |
extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h); |
472 |
– |
|
640 |
|
inline void sheepshaver_cpu::get_resource(uint32 old_get_resource) |
641 |
|
{ |
642 |
|
uint32 type = gpr(3); |
720 |
|
if ((addr - ROM_BASE) < ROM_SIZE) |
721 |
|
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
722 |
|
|
723 |
< |
// Ignore all other faults, if requested |
724 |
< |
if (PrefsFindBool("ignoresegv")) |
725 |
< |
return SIGSEGV_RETURN_FAILURE; |
723 |
> |
// Get program counter of target CPU |
724 |
> |
sheepshaver_cpu * const cpu = current_cpu; |
725 |
> |
const uint32 pc = cpu->pc(); |
726 |
> |
|
727 |
> |
// Fault in Mac ROM or RAM? |
728 |
> |
bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) || (pc >= RAMBase) && (pc < (RAMBase + RAMSize)); |
729 |
> |
if (mac_fault) { |
730 |
> |
|
731 |
> |
// "VM settings" during MacOS 8 installation |
732 |
> |
if (pc == ROM_BASE + 0x488160 && cpu->gpr(20) == 0xf8000000) |
733 |
> |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
734 |
> |
|
735 |
> |
// MacOS 8.5 installation |
736 |
> |
else if (pc == ROM_BASE + 0x488140 && cpu->gpr(16) == 0xf8000000) |
737 |
> |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
738 |
> |
|
739 |
> |
// MacOS 8 serial drivers on startup |
740 |
> |
else if (pc == ROM_BASE + 0x48e080 && (cpu->gpr(8) == 0xf3012002 || cpu->gpr(8) == 0xf3012000)) |
741 |
> |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
742 |
> |
|
743 |
> |
// MacOS 8.1 serial drivers on startup |
744 |
> |
else if (pc == ROM_BASE + 0x48c5e0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000)) |
745 |
> |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
746 |
> |
else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000)) |
747 |
> |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
748 |
> |
|
749 |
> |
// Ignore writes to the zero page |
750 |
> |
else if ((uint32)(addr - SheepMem::ZeroPage()) < (uint32)SheepMem::PageSize()) |
751 |
> |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
752 |
> |
|
753 |
> |
// Ignore all other faults, if requested |
754 |
> |
if (PrefsFindBool("ignoresegv")) |
755 |
> |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
756 |
> |
} |
757 |
|
#else |
758 |
|
#error "FIXME: You don't have the capability to skip instruction within signal handlers" |
759 |
|
#endif |
775 |
|
// Initialize main CPU emulator |
776 |
|
main_cpu = new sheepshaver_cpu(); |
777 |
|
main_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000)); |
778 |
+ |
main_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000)); |
779 |
|
WriteMacInt32(XLM_RUN_MODE, MODE_68K); |
780 |
|
|
781 |
|
#if MULTICORE_CPU |
840 |
|
void emul_ppc(uint32 entry) |
841 |
|
{ |
842 |
|
current_cpu = main_cpu; |
843 |
< |
#if DEBUG |
843 |
> |
#if 0 |
844 |
|
current_cpu->start_log(); |
845 |
|
#endif |
846 |
|
// start emulation loop and enable code translation or caching |
847 |
< |
current_cpu->execute(entry, true); |
847 |
> |
current_cpu->execute(entry); |
848 |
|
} |
849 |
|
|
850 |
|
/* |
872 |
|
void sheepshaver_cpu::handle_interrupt(void) |
873 |
|
{ |
874 |
|
// Do nothing if interrupts are disabled |
875 |
< |
if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0) |
875 |
> |
if (*(int32 *)XLM_IRQ_NEST > 0) |
876 |
|
return; |
877 |
|
|
878 |
|
// Do nothing if there is no interrupt pending |
939 |
|
if (InterruptFlags & INTFLAG_VIA) { |
940 |
|
ClearInterruptFlag(INTFLAG_VIA); |
941 |
|
ADBInterrupt(); |
942 |
< |
ExecutePPC(VideoVBL); |
942 |
> |
ExecuteNative(NATIVE_VIDEO_VBL); |
943 |
|
} |
944 |
|
} |
945 |
|
#endif |
949 |
|
} |
950 |
|
} |
951 |
|
|
753 |
– |
/* |
754 |
– |
* Execute NATIVE_OP opcode (called by PowerPC emulator) |
755 |
– |
*/ |
756 |
– |
|
757 |
– |
#define POWERPC_NATIVE_OP_INIT(LR, OP) \ |
758 |
– |
tswap32(POWERPC_EMUL_OP | ((LR) << 11) | (((uint32)OP) << 6) | 2) |
759 |
– |
|
760 |
– |
// FIXME: Make sure 32-bit relocations are used |
761 |
– |
const uint32 NativeOpTable[NATIVE_OP_MAX] = { |
762 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_PATCH_NAME_REGISTRY), |
763 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_INSTALL_ACCEL), |
764 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_VBL), |
765 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_DO_DRIVER_IO), |
766 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_IRQ), |
767 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_INIT), |
768 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_TERM), |
769 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_OPEN), |
770 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_CLOSE), |
771 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_WPUT), |
772 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_RSRV), |
773 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_NOTHING), |
774 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_OPEN), |
775 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_IN), |
776 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_OUT), |
777 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CONTROL), |
778 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_STATUS), |
779 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CLOSE), |
780 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_RESOURCE), |
781 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_RESOURCE), |
782 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_IND_RESOURCE), |
783 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_IND_RESOURCE), |
784 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_R_GET_RESOURCE), |
785 |
– |
POWERPC_NATIVE_OP_INIT(0, NATIVE_DISABLE_INTERRUPT), |
786 |
– |
POWERPC_NATIVE_OP_INIT(0, NATIVE_ENABLE_INTERRUPT), |
787 |
– |
POWERPC_NATIVE_OP_INIT(1, NATIVE_MAKE_EXECUTABLE), |
788 |
– |
}; |
789 |
– |
|
952 |
|
static void get_resource(void); |
953 |
|
static void get_1_resource(void); |
954 |
|
static void get_ind_resource(void); |
978 |
|
GPR(3) = (int32)(int16)VideoDoDriverIO((void *)GPR(3), (void *)GPR(4), |
979 |
|
(void *)GPR(5), GPR(6), GPR(7)); |
980 |
|
break; |
981 |
< |
case NATIVE_GET_RESOURCE: |
982 |
< |
get_resource(); |
981 |
> |
#ifdef WORDS_BIGENDIAN |
982 |
> |
case NATIVE_ETHER_IRQ: |
983 |
> |
EtherIRQ(); |
984 |
|
break; |
985 |
< |
case NATIVE_GET_1_RESOURCE: |
986 |
< |
get_1_resource(); |
985 |
> |
case NATIVE_ETHER_INIT: |
986 |
> |
GPR(3) = InitStreamModule((void *)GPR(3)); |
987 |
|
break; |
988 |
< |
case NATIVE_GET_IND_RESOURCE: |
989 |
< |
get_ind_resource(); |
988 |
> |
case NATIVE_ETHER_TERM: |
989 |
> |
TerminateStreamModule(); |
990 |
|
break; |
991 |
< |
case NATIVE_GET_1_IND_RESOURCE: |
992 |
< |
get_1_ind_resource(); |
991 |
> |
case NATIVE_ETHER_OPEN: |
992 |
> |
GPR(3) = ether_open((queue_t *)GPR(3), (void *)GPR(4), GPR(5), GPR(6), (void*)GPR(7)); |
993 |
|
break; |
994 |
< |
case NATIVE_R_GET_RESOURCE: |
995 |
< |
r_get_resource(); |
994 |
> |
case NATIVE_ETHER_CLOSE: |
995 |
> |
GPR(3) = ether_close((queue_t *)GPR(3), GPR(4), (void *)GPR(5)); |
996 |
> |
break; |
997 |
> |
case NATIVE_ETHER_WPUT: |
998 |
> |
GPR(3) = ether_wput((queue_t *)GPR(3), (mblk_t *)GPR(4)); |
999 |
> |
break; |
1000 |
> |
case NATIVE_ETHER_RSRV: |
1001 |
> |
GPR(3) = ether_rsrv((queue_t *)GPR(3)); |
1002 |
> |
break; |
1003 |
> |
#else |
1004 |
> |
case NATIVE_ETHER_INIT: |
1005 |
> |
// FIXME: needs more complicated thunks |
1006 |
> |
GPR(3) = false; |
1007 |
> |
break; |
1008 |
> |
#endif |
1009 |
> |
case NATIVE_SYNC_HOOK: |
1010 |
> |
GPR(3) = NQD_sync_hook(GPR(3)); |
1011 |
> |
break; |
1012 |
> |
case NATIVE_BITBLT_HOOK: |
1013 |
> |
GPR(3) = NQD_bitblt_hook(GPR(3)); |
1014 |
> |
break; |
1015 |
> |
case NATIVE_BITBLT: |
1016 |
> |
NQD_bitblt(GPR(3)); |
1017 |
> |
break; |
1018 |
> |
case NATIVE_FILLRECT_HOOK: |
1019 |
> |
GPR(3) = NQD_fillrect_hook(GPR(3)); |
1020 |
> |
break; |
1021 |
> |
case NATIVE_INVRECT: |
1022 |
> |
NQD_invrect(GPR(3)); |
1023 |
> |
break; |
1024 |
> |
case NATIVE_FILLRECT: |
1025 |
> |
NQD_fillrect(GPR(3)); |
1026 |
|
break; |
1027 |
|
case NATIVE_SERIAL_NOTHING: |
1028 |
|
case NATIVE_SERIAL_OPEN: |
1044 |
|
GPR(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](GPR(3), GPR(4)); |
1045 |
|
break; |
1046 |
|
} |
1047 |
+ |
case NATIVE_GET_RESOURCE: |
1048 |
+ |
case NATIVE_GET_1_RESOURCE: |
1049 |
+ |
case NATIVE_GET_IND_RESOURCE: |
1050 |
+ |
case NATIVE_GET_1_IND_RESOURCE: |
1051 |
+ |
case NATIVE_R_GET_RESOURCE: { |
1052 |
+ |
typedef void (*GetResourceCallback)(void); |
1053 |
+ |
static const GetResourceCallback get_resource_callbacks[] = { |
1054 |
+ |
get_resource, |
1055 |
+ |
get_1_resource, |
1056 |
+ |
get_ind_resource, |
1057 |
+ |
get_1_ind_resource, |
1058 |
+ |
r_get_resource |
1059 |
+ |
}; |
1060 |
+ |
get_resource_callbacks[selector - NATIVE_GET_RESOURCE](); |
1061 |
+ |
break; |
1062 |
+ |
} |
1063 |
|
case NATIVE_DISABLE_INTERRUPT: |
1064 |
|
DisableInterrupt(); |
1065 |
|
break; |
1069 |
|
case NATIVE_MAKE_EXECUTABLE: |
1070 |
|
MakeExecutable(0, (void *)GPR(4), GPR(5)); |
1071 |
|
break; |
1072 |
+ |
case NATIVE_CHECK_LOAD_INVOC: |
1073 |
+ |
check_load_invoc(GPR(3), GPR(4), GPR(5)); |
1074 |
+ |
break; |
1075 |
|
default: |
1076 |
|
printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector); |
1077 |
|
QuitEmulator(); |
1084 |
|
} |
1085 |
|
|
1086 |
|
/* |
875 |
– |
* Execute native subroutine (LR must contain return address) |
876 |
– |
*/ |
877 |
– |
|
878 |
– |
void ExecuteNative(int selector) |
879 |
– |
{ |
880 |
– |
uint32 tvect[2]; |
881 |
– |
tvect[0] = tswap32(POWERPC_NATIVE_OP_FUNC(selector)); |
882 |
– |
tvect[1] = 0; // Fake TVECT |
883 |
– |
RoutineDescriptor desc = BUILD_PPC_ROUTINE_DESCRIPTOR(0, tvect); |
884 |
– |
M68kRegisters r; |
885 |
– |
Execute68k((uint32)&desc, &r); |
886 |
– |
} |
887 |
– |
|
888 |
– |
/* |
1087 |
|
* Execute 68k subroutine (must be ended with EXEC_RETURN) |
1088 |
|
* This must only be called by the emul_thread when in EMUL_OP mode |
1089 |
|
* r->a[7] is unused, the routine runs on the caller's stack |
1101 |
|
|
1102 |
|
void Execute68kTrap(uint16 trap, M68kRegisters *r) |
1103 |
|
{ |
1104 |
< |
uint16 proc[2]; |
1105 |
< |
proc[0] = htons(trap); |
1106 |
< |
proc[1] = htons(M68K_RTS); |
1107 |
< |
Execute68k((uint32)proc, r); |
1104 |
> |
SheepVar proc_var(4); |
1105 |
> |
uint32 proc = proc_var.addr(); |
1106 |
> |
WriteMacInt16(proc, trap); |
1107 |
> |
WriteMacInt16(proc + 2, M68K_RTS); |
1108 |
> |
Execute68k(proc, r); |
1109 |
|
} |
1110 |
|
|
1111 |
|
/* |