[ViewVC] Diff of: cebix/SheepShaver/src/kpx_cpu/sheepshaver

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.31 by gbeauche, 2004-02-24T14:09:12Z vs.
Revision 1.75 by gbeauche, 2008-01-01T09:47:39Z

#	Line 1 \| Line 1
1		/*
2		* sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface
3		*
4	<	* SheepShaver (C) 1997-2004 Christian Bauer and Marc Hellwig
4	>	* SheepShaver (C) 1997-2008 Christian Bauer and Marc Hellwig
5		*
6		* This program is free software; you can redistribute it and/or modify
7		* it under the terms of the GNU General Public License as published by
#	Line 38 \| Line 38
38		#include "name_registry.h"
39		#include "serial.h"
40		#include "ether.h"
41	+	#include "timer.h"
42
43		#include <stdio.h>
44		#include <stdlib.h>
45	+	#ifdef HAVE_MALLOC_H
46	+	#include <malloc.h>
47	+	#endif
48	+
49	+	#ifdef USE_SDL_VIDEO
50	+	#include <SDL_events.h>
51	+	#endif
52
53		#if ENABLE_MON
54		#include "mon.h"
#	Line 51 \| Line 59
59		#include "debug.h"
60
61		// Emulation time statistics
62	<	#define EMUL_TIME_STATS 1
62	>	#ifndef EMUL_TIME_STATS
63	>	#define EMUL_TIME_STATS 0
64	>	#endif
65
66		#if EMUL_TIME_STATS
67		static clock_t emul_start_time;
68	<	static uint32 interrupt_count = 0;
68	>	static uint32 interrupt_count = 0, ppc_interrupt_count = 0;
69		static clock_t interrupt_time = 0;
70		static uint32 exec68k_count = 0;
71		static clock_t exec68k_time = 0;
#	Line 79 \| Line 89 \| extern uintptr SignalStackBase();
89
90		// From rsrc_patches.cpp
91		extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
92	+	extern "C" void named_check_load_invoc(uint32 type, uint32 name, uint32 h);
93
94		// PowerPC EmulOp to exit from emulation looop
95		const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP \| 1;
96
86	–	// Enable multicore (main/interrupts) cpu emulation?
87	–	#define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0)
88	–
97		// Enable Execute68k() safety checks?
98		#define SAFE_EXEC_68K 1
99
#	Line 99 \| Line 107 \| const uint32 POWERPC_EXEC_RETURN = POWER
107		#define INTERRUPTS_IN_NATIVE_MODE 1
108
109		// Pointer to Kernel Data
110	<	static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE;
110	>	static KernelData * kernel_data;
111
112		// SIGSEGV handler
113	<	static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
113	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
114
115	<	// JIT Compiler enabled?
116	<	static inline bool enable_jit_p()
117	<	{
118	<	return PrefsFindBool("jit");
119	<	}
115	>	#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
116	>	// Special trampolines for EmulOp and NativeOp
117	>	static uint8 *emul_op_trampoline;
118	>	static uint8 *native_op_trampoline;
119	>	#endif
120
121
122		/**
#	Line 137 \| Line 145 \| public:
145		uint32 get_xer() const { return xer().get(); }
146		void set_xer(uint32 v) { xer().set(v); }
147
148	+	// Execute NATIVE_OP routine
149	+	void execute_native_op(uint32 native_op);
150	+
151		// Execute EMUL_OP routine
152		void execute_emul_op(uint32 emul_op);
153
#	Line 149 \| Line 160 \| public:
160		// Execute MacOS/PPC code
161		uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args);
162
163	+	#if PPC_ENABLE_JIT
164		// Compile one instruction
165	<	virtual bool compile1(codegen_context_t & cg_context);
166	<
165	>	virtual int compile1(codegen_context_t & cg_context);
166	>	#endif
167		// Resource manager thunk
168		void get_resource(uint32 old_get_resource);
169
170		// Handle MacOS interrupt
171		void interrupt(uint32 entry);
160	–	void handle_interrupt();
172
173		// Make sure the SIGSEGV handler can access CPU registers
174	<	friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
174	>	friend sigsegv_return_t sigsegv_handler(sigsegv_info_t *sip);
175		};
176
166	–	// Memory allocator returning areas aligned on 16-byte boundaries
167	–	void *operator new(size_t size)
168	–	{
169	–	void *p;
170	–
171	–	#if defined(HAVE_POSIX_MEMALIGN)
172	–	if (posix_memalign(&p, 16, size) != 0)
173	–	throw std::bad_alloc();
174	–	#elif defined(HAVE_MEMALIGN)
175	–	p = memalign(16, size);
176	–	#elif defined(HAVE_VALLOC)
177	–	p = valloc(size); // page-aligned!
178	–	#else
179	–	/* XXX: handle padding ourselves */
180	–	p = malloc(size);
181	–	#endif
182	–
183	–	return p;
184	–	}
185	–
186	–	void operator delete(void *p)
187	–	{
188	–	#if defined(HAVE_MEMALIGN) \|\| defined(HAVE_VALLOC)
189	–	#if defined(__GLIBC__)
190	–	// this is known to work only with GNU libc
191	–	free(p);
192	–	#endif
193	–	#else
194	–	free(p);
195	–	#endif
196	–	}
197	–
177		sheepshaver_cpu::sheepshaver_cpu()
199	–	: powerpc_cpu(enable_jit_p())
178		{
179		init_decoder();
180	+
181	+	#if PPC_ENABLE_JIT
182	+	if (PrefsFindBool("jit"))
183	+	enable_jit();
184	+	#endif
185		}
186
187		void sheepshaver_cpu::init_decoder()
#	Line 206 \| Line 189 \| void sheepshaver_cpu::init_decoder()
189		static const instr_info_t sheep_ii_table[] = {
190		{ "sheep",
191		(execute_pmf)&sheepshaver_cpu::execute_sheep,
209	–	NULL,
192		PPC_I(SHEEP),
193		D_form, 6, 0, CFLOW_JUMP \| CFLOW_TRAP
194		}
#	Line 221 \| Line 203 \| void sheepshaver_cpu::init_decoder()
203		}
204		}
205
224	–	// Forward declaration for native opcode handler
225	–	static void NativeOp(int selector);
226	–
206		/* NativeOp instruction format:
207	<	+------------+--------------------------+--+----------+------------+
208	<	\| 6 \| \|FN\| OP \| 2 \|
209	<	+------------+--------------------------+--+----------+------------+
210	<	0 5 \|6 19 20 21 25 26 31
207	>	+------------+-------------------------+--+-----------+------------+
208	>	\| 6 \| \|FN\| OP \| 2 \|
209	>	+------------+-------------------------+--+-----------+------------+
210	>	0 5 \|6 18 19 20 25 26 31
211		*/
212
213	<	typedef bit_field< 20, 20 > FN_field;
214	<	typedef bit_field< 21, 25 > NATIVE_OP_field;
213	>	typedef bit_field< 19, 19 > FN_field;
214	>	typedef bit_field< 20, 25 > NATIVE_OP_field;
215		typedef bit_field< 26, 31 > EMUL_OP_field;
216
217		// Execute EMUL_OP routine
#	Line 246 \| Line 225 \| void sheepshaver_cpu::execute_emul_op(ui
225		for (int i = 0; i < 7; i++)
226		r68.a[i] = gpr(16 + i);
227		r68.a[7] = gpr(1);
228	<	uint32 saved_cr = get_cr() & CR_field<2>::mask();
228	>	uint32 saved_cr = get_cr() & 0xff9fffff; // mask_operand::compute(11, 8)
229		uint32 saved_xer = get_xer();
230		EmulOp(&r68, gpr(24), emul_op);
231		set_cr(saved_cr);
#	Line 275 \| Line 254 \| void sheepshaver_cpu::execute_sheep(uint
254		break;
255
256		case 2: // EXEC_NATIVE
257	<	NativeOp(NATIVE_OP_field::extract(opcode));
257	>	execute_native_op(NATIVE_OP_field::extract(opcode));
258		if (FN_field::test(opcode))
259		pc() = lr();
260		else
#	Line 290 \| Line 269 \| void sheepshaver_cpu::execute_sheep(uint
269		}
270
271		// Compile one instruction
293	–	bool sheepshaver_cpu::compile1(codegen_context_t & cg_context)
294	–	{
272		#if PPC_ENABLE_JIT
273	+	int sheepshaver_cpu::compile1(codegen_context_t & cg_context)
274	+	{
275		const instr_info_t *ii = cg_context.instr_info;
276		if (ii->mnemo != PPC_I(SHEEP))
277	<	return false;
277	>	return COMPILE_FAILURE;
278
279	<	bool compiled = false;
279	>	int status = COMPILE_FAILURE;
280		powerpc_dyngen & dg = cg_context.codegen;
281		uint32 opcode = cg_context.opcode;
282
283		switch (opcode & 0x3f) {
284		case 0: // EMUL_RETURN
285		dg.gen_invoke(QuitEmulator);
286	<	compiled = true;
286	>	status = COMPILE_CODE_OK;
287		break;
288
289		case 1: // EXEC_RETURN
290		dg.gen_spcflags_set(SPCFLAG_CPU_EXEC_RETURN);
291	<	compiled = true;
291	>	// Don't check for pending interrupts, we do know we have to
292	>	// get out of this block ASAP
293	>	dg.gen_exec_return();
294	>	status = COMPILE_EPILOGUE_OK;
295		break;
296
297		case 2: { // EXEC_NATIVE
298		uint32 selector = NATIVE_OP_field::extract(opcode);
299		switch (selector) {
300	+	#if !PPC_REENTRANT_JIT
301	+	// Filter out functions that may invoke Execute68k() or
302	+	// CallMacOS(), this would break reentrancy as they could
303	+	// invalidate the translation cache and even overwrite
304	+	// continuation code when we are done with them.
305		case NATIVE_PATCH_NAME_REGISTRY:
306		dg.gen_invoke(DoPatchNameRegistry);
307	<	compiled = true;
307	>	status = COMPILE_CODE_OK;
308		break;
309		case NATIVE_VIDEO_INSTALL_ACCEL:
310		dg.gen_invoke(VideoInstallAccel);
311	<	compiled = true;
311	>	status = COMPILE_CODE_OK;
312		break;
313		case NATIVE_VIDEO_VBL:
314		dg.gen_invoke(VideoVBL);
315	<	compiled = true;
315	>	status = COMPILE_CODE_OK;
316		break;
317		case NATIVE_GET_RESOURCE:
318		case NATIVE_GET_1_RESOURCE:
#	Line 343 \| Line 330 \| bool sheepshaver_cpu::compile1(codegen_c
330		typedef void (*func_t)(dyngen_cpu_base, uint32);
331		func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::get_resource).ptr();
332		dg.gen_invoke_CPU_im(func, old_get_resource);
333	<	compiled = true;
333	>	status = COMPILE_CODE_OK;
334		break;
335		}
336	<	case NATIVE_DISABLE_INTERRUPT:
350	<	dg.gen_invoke(DisableInterrupt);
351	<	compiled = true;
352	<	break;
353	<	case NATIVE_ENABLE_INTERRUPT:
354	<	dg.gen_invoke(EnableInterrupt);
355	<	compiled = true;
356	<	break;
336	>	#endif
337		case NATIVE_CHECK_LOAD_INVOC:
338		dg.gen_load_T0_GPR(3);
339		dg.gen_load_T1_GPR(4);
340		dg.gen_se_16_32_T1();
341		dg.gen_load_T2_GPR(5);
342		dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))check_load_invoc);
343	<	compiled = true;
343	>	status = COMPILE_CODE_OK;
344	>	break;
345	>	case NATIVE_NAMED_CHECK_LOAD_INVOC:
346	>	dg.gen_load_T0_GPR(3);
347	>	dg.gen_load_T1_GPR(4);
348	>	dg.gen_load_T2_GPR(5);
349	>	dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))named_check_load_invoc);
350	>	status = COMPILE_CODE_OK;
351	>	break;
352	>	case NATIVE_NQD_SYNC_HOOK:
353	>	dg.gen_load_T0_GPR(3);
354	>	dg.gen_invoke_T0_ret_T0((uint32 (*)(uint32))NQD_sync_hook);
355	>	dg.gen_store_T0_GPR(3);
356	>	status = COMPILE_CODE_OK;
357	>	break;
358	>	case NATIVE_NQD_BITBLT_HOOK:
359	>	dg.gen_load_T0_GPR(3);
360	>	dg.gen_invoke_T0_ret_T0((uint32 (*)(uint32))NQD_bitblt_hook);
361	>	dg.gen_store_T0_GPR(3);
362	>	status = COMPILE_CODE_OK;
363	>	break;
364	>	case NATIVE_NQD_FILLRECT_HOOK:
365	>	dg.gen_load_T0_GPR(3);
366	>	dg.gen_invoke_T0_ret_T0((uint32 (*)(uint32))NQD_fillrect_hook);
367	>	dg.gen_store_T0_GPR(3);
368	>	status = COMPILE_CODE_OK;
369	>	break;
370	>	case NATIVE_NQD_UNKNOWN_HOOK:
371	>	dg.gen_load_T0_GPR(3);
372	>	dg.gen_invoke_T0_ret_T0((uint32 (*)(uint32))NQD_unknown_hook);
373	>	dg.gen_store_T0_GPR(3);
374	>	status = COMPILE_CODE_OK;
375	>	break;
376	>	case NATIVE_NQD_BITBLT:
377	>	dg.gen_load_T0_GPR(3);
378	>	dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt);
379	>	status = COMPILE_CODE_OK;
380	>	break;
381	>	case NATIVE_NQD_INVRECT:
382	>	dg.gen_load_T0_GPR(3);
383	>	dg.gen_invoke_T0((void (*)(uint32))NQD_invrect);
384	>	status = COMPILE_CODE_OK;
385	>	break;
386	>	case NATIVE_NQD_FILLRECT:
387	>	dg.gen_load_T0_GPR(3);
388	>	dg.gen_invoke_T0((void (*)(uint32))NQD_fillrect);
389	>	status = COMPILE_CODE_OK;
390		break;
391		}
392	<	if (FN_field::test(opcode)) {
393	<	if (compiled) {
394	<	dg.gen_load_A0_LR();
395	<	dg.gen_set_PC_A0();
392	>	// Could we fully translate this NativeOp?
393	>	if (status == COMPILE_CODE_OK) {
394	>	if (!FN_field::test(opcode))
395	>	cg_context.done_compile = false;
396	>	else {
397	>	dg.gen_load_T0_LR_aligned();
398	>	dg.gen_set_PC_T0();
399	>	cg_context.done_compile = true;
400		}
401	<	cg_context.done_compile = true;
401	>	break;
402		}
403	<	else
403	>	#if PPC_REENTRANT_JIT
404	>	// Try to execute NativeOp trampoline
405	>	if (!FN_field::test(opcode))
406	>	dg.gen_set_PC_im(cg_context.pc + 4);
407	>	else {
408	>	dg.gen_load_T0_LR_aligned();
409	>	dg.gen_set_PC_T0();
410	>	}
411	>	dg.gen_mov_32_T0_im(selector);
412	>	dg.gen_jmp(native_op_trampoline);
413	>	cg_context.done_compile = true;
414	>	status = COMPILE_EPILOGUE_OK;
415	>	break;
416	>	#endif
417	>	// Invoke NativeOp handler
418	>	if (!FN_field::test(opcode)) {
419	>	typedef void (*func_t)(dyngen_cpu_base, uint32);
420	>	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
421	>	dg.gen_invoke_CPU_im(func, selector);
422		cg_context.done_compile = false;
423	+	status = COMPILE_CODE_OK;
424	+	}
425	+	// Otherwise, let it generate a call to execute_sheep() which
426	+	// will cause necessary updates to the program counter
427		break;
428		}
429
430		default: { // EMUL_OP
431	+	uint32 emul_op = EMUL_OP_field::extract(opcode) - 3;
432	+	#if PPC_REENTRANT_JIT
433	+	// Try to execute EmulOp trampoline
434	+	dg.gen_set_PC_im(cg_context.pc + 4);
435	+	dg.gen_mov_32_T0_im(emul_op);
436	+	dg.gen_jmp(emul_op_trampoline);
437	+	cg_context.done_compile = true;
438	+	status = COMPILE_EPILOGUE_OK;
439	+	break;
440	+	#endif
441	+	// Invoke EmulOp handler
442		typedef void (*func_t)(dyngen_cpu_base, uint32);
443		func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr();
444	<	dg.gen_invoke_CPU_im(func, EMUL_OP_field::extract(opcode) - 3);
444	>	dg.gen_invoke_CPU_im(func, emul_op);
445		cg_context.done_compile = false;
446	<	compiled = true;
446	>	status = COMPILE_CODE_OK;
447		break;
448		}
449		}
450	<	return compiled;
388	<	#endif
389	<	return false;
450	>	return status;
451		}
452	+	#endif
453
454		// Handle MacOS interrupt
455		void sheepshaver_cpu::interrupt(uint32 entry)
456		{
457		#if EMUL_TIME_STATS
458	<	interrupt_count++;
458	>	ppc_interrupt_count++;
459		const clock_t interrupt_start = clock();
460		#endif
461
400	–	#if !MULTICORE_CPU
462		// Save program counters and branch registers
463		uint32 saved_pc = pc();
464		uint32 saved_lr = lr();
465		uint32 saved_ctr= ctr();
466		uint32 saved_sp = gpr(1);
406	–	#endif
467
468		// Initialize stack pointer to SheepShaver alternate stack base
469		gpr(1) = SignalStackBase() - 64;
#	Line 443 \| Line 503 \| void sheepshaver_cpu::interrupt(uint32 e
503		// Enter nanokernel
504		execute(entry);
505
446	–	#if !MULTICORE_CPU
506		// Restore program counters and branch registers
507		pc() = saved_pc;
508		lr() = saved_lr;
509		ctr()= saved_ctr;
510		gpr(1) = saved_sp;
452	–	#endif
511
512		#if EMUL_TIME_STATS
513		interrupt_time += (clock() - interrupt_start);
#	Line 647 \| Line 705 \| inline void sheepshaver_cpu::get_resourc
705		* SheepShaver CPU engine interface
706		**/
707
708	<	static sheepshaver_cpu *main_cpu = NULL; // CPU emulator to handle usual control flow
709	<	static sheepshaver_cpu *interrupt_cpu = NULL; // CPU emulator to handle interrupts
652	<	static sheepshaver_cpu *current_cpu = NULL; // Current CPU emulator context
708	>	// PowerPC CPU emulator
709	>	static sheepshaver_cpu *ppc_cpu = NULL;
710
711		void FlushCodeCache(uintptr start, uintptr end)
712		{
713		D(bug("FlushCodeCache(%08x, %08x)\n", start, end));
714	<	main_cpu->invalidate_cache_range(start, end);
658	<	#if MULTICORE_CPU
659	<	interrupt_cpu->invalidate_cache_range(start, end);
660	<	#endif
661	<	}
662	<
663	<	static inline void cpu_push(sheepshaver_cpu *new_cpu)
664	<	{
665	<	#if MULTICORE_CPU
666	<	current_cpu = new_cpu;
667	<	#endif
668	<	}
669	<
670	<	static inline void cpu_pop()
671	<	{
672	<	#if MULTICORE_CPU
673	<	current_cpu = main_cpu;
674	<	#endif
714	>	ppc_cpu->invalidate_cache_range(start, end);
715		}
716
717		// Dump PPC registers
718		static void dump_registers(void)
719		{
720	<	current_cpu->dump_registers();
720	>	ppc_cpu->dump_registers();
721		}
722
723		// Dump log
724		static void dump_log(void)
725		{
726	<	current_cpu->dump_log();
726	>	ppc_cpu->dump_log();
727		}
728
729		/*
730		* Initialize CPU emulation
731		*/
732
733	<	static sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
733	>	sigsegv_return_t sigsegv_handler(sigsegv_info_t *sip)
734		{
735		#if ENABLE_VOSF
736		// Handle screen fault
737	<	extern bool Screen_fault_handler(sigsegv_address_t, sigsegv_address_t);
738	<	if (Screen_fault_handler(fault_address, fault_instruction))
737	>	extern bool Screen_fault_handler(sigsegv_info_t *sip);
738	>	if (Screen_fault_handler(sip))
739		return SIGSEGV_RETURN_SUCCESS;
740		#endif
741
742	<	const uintptr addr = (uintptr)fault_address;
742	>	const uintptr addr = (uintptr)sigsegv_get_fault_address(sip);
743		#if HAVE_SIGSEGV_SKIP_INSTRUCTION
744		// Ignore writes to ROM
745	<	if ((addr - ROM_BASE) < ROM_SIZE)
745	>	if ((addr - (uintptr)ROMBaseHost) < ROM_SIZE)
746		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
747
748		// Get program counter of target CPU
749	<	sheepshaver_cpu * const cpu = current_cpu;
749	>	sheepshaver_cpu * const cpu = ppc_cpu;
750		const uint32 pc = cpu->pc();
751
752		// Fault in Mac ROM or RAM?
753	<	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) \|\| (pc >= RAMBase) && (pc < (RAMBase + RAMSize));
753	>	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) \|\| (pc >= RAMBase) && (pc < (RAMBase + RAMSize)) \|\| (pc >= DR_CACHE_BASE && pc < (DR_CACHE_BASE + DR_CACHE_SIZE));
754		if (mac_fault) {
755
756		// "VM settings" during MacOS 8 installation
#	Line 730 \| Line 770 \| static sigsegv_return_t sigsegv_handler(
770		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
771		else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 \|\| cpu->gpr(20) == 0xf3012000))
772		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
773	+
774	+	// MacOS 8.6 serial drivers on startup (with DR Cache and OldWorld ROM)
775	+	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(16) == 0xf3012002 \|\| cpu->gpr(16) == 0xf3012000))
776	+	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
777	+	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(20) == 0xf3012002 \|\| cpu->gpr(20) == 0xf3012000))
778	+	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
779
780		// Ignore writes to the zero page
781		else if ((uint32)(addr - SheepMem::ZeroPage()) < (uint32)SheepMem::PageSize())
#	Line 743 \| Line 789 \| static sigsegv_return_t sigsegv_handler(
789		#error "FIXME: You don't have the capability to skip instruction within signal handlers"
790		#endif
791
792	<	printf("SIGSEGV\n");
793	<	printf(" pc %p\n", fault_instruction);
794	<	printf(" ea %p\n", fault_address);
749	<	printf(" cpu %s\n", current_cpu == main_cpu ? "main" : "interrupts");
792	>	fprintf(stderr, "SIGSEGV\n");
793	>	fprintf(stderr, " pc %p\n", sigsegv_get_fault_instruction_address(sip));
794	>	fprintf(stderr, " ea %p\n", sigsegv_get_fault_address(sip));
795		dump_registers();
796	<	current_cpu->dump_log();
796	>	ppc_cpu->dump_log();
797		enter_mon();
798		QuitEmulator();
799
#	Line 757 \| Line 802 \| static sigsegv_return_t sigsegv_handler(
802
803		void init_emul_ppc(void)
804		{
805	+	// Get pointer to KernelData in host address space
806	+	kernel_data = (KernelData *)Mac2HostAddr(KERNEL_DATA_BASE);
807	+
808		// Initialize main CPU emulator
809	<	main_cpu = new sheepshaver_cpu();
810	<	main_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
811	<	main_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
809	>	ppc_cpu = new sheepshaver_cpu();
810	>	ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
811	>	ppc_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
812		WriteMacInt32(XLM_RUN_MODE, MODE_68K);
813
766	–	#if MULTICORE_CPU
767	–	// Initialize alternate CPU emulator to handle interrupts
768	–	interrupt_cpu = new sheepshaver_cpu();
769	–	#endif
770	–
771	–	// Install the handler for SIGSEGV
772	–	sigsegv_install_handler(sigsegv_handler);
773	–
814		#if ENABLE_MON
815		// Install "regs" command in cxmon
816		mon_add_command("regs", dump_registers, "regs Dump PowerPC registers\n");
#	Line 796 \| Line 836 \| void exit_emul_ppc(void)
836		printf("Total emulation time : %.1f sec\n", double(emul_time) / double(CLOCKS_PER_SEC));
837		printf("Total interrupt count: %d (%2.1f Hz)\n", interrupt_count,
838		(double(interrupt_count) * CLOCKS_PER_SEC) / double(emul_time));
839	+	printf("Total ppc interrupt count: %d (%2.1f %%)\n", ppc_interrupt_count,
840	+	(double(ppc_interrupt_count) * 100.0) / double(interrupt_count));
841
842		#define PRINT_STATS(LABEL, VAR_PREFIX) do { \
843		printf("Total " LABEL " count : %d\n", VAR_PREFIX##_count); \
#	Line 812 \| Line 854 \| void exit_emul_ppc(void)
854		printf("\n");
855		#endif
856
857	<	delete main_cpu;
858	<	#if MULTICORE_CPU
817	<	delete interrupt_cpu;
818	<	#endif
857	>	delete ppc_cpu;
858	>	ppc_cpu = NULL;
859		}
860
861	+	#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
862	+	// Initialize EmulOp trampolines
863	+	void init_emul_op_trampolines(basic_dyngen & dg)
864	+	{
865	+	typedef void (*func_t)(dyngen_cpu_base, uint32);
866	+	func_t func;
867	+
868	+	// EmulOp
869	+	emul_op_trampoline = dg.gen_start();
870	+	func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr();
871	+	dg.gen_invoke_CPU_T0(func);
872	+	dg.gen_exec_return();
873	+	dg.gen_end();
874	+
875	+	// NativeOp
876	+	native_op_trampoline = dg.gen_start();
877	+	func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
878	+	dg.gen_invoke_CPU_T0(func);
879	+	dg.gen_exec_return();
880	+	dg.gen_end();
881	+
882	+	D(bug("EmulOp trampoline: %p\n", emul_op_trampoline));
883	+	D(bug("NativeOp trampoline: %p\n", native_op_trampoline));
884	+	}
885	+	#endif
886	+
887		/*
888		* Emulation loop
889		*/
890
891		void emul_ppc(uint32 entry)
892		{
827	–	current_cpu = main_cpu;
893		#if 0
894	<	current_cpu->start_log();
894	>	ppc_cpu->start_log();
895		#endif
896		// start emulation loop and enable code translation or caching
897	<	current_cpu->execute(entry);
897	>	ppc_cpu->execute(entry);
898		}
899
900		/*
901		* Handle PowerPC interrupt
902		*/
903
839	–	#if ASYNC_IRQ
840	–	void HandleInterrupt(void)
841	–	{
842	–	main_cpu->handle_interrupt();
843	–	}
844	–	#else
904		void TriggerInterrupt(void)
905		{
906	+	idle_resume();
907		#if 0
908		WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1);
909		#else
910		// Trigger interrupt to main cpu only
911	<	if (main_cpu)
912	<	main_cpu->trigger_interrupt();
911	>	if (ppc_cpu)
912	>	ppc_cpu->trigger_interrupt();
913		#endif
914		}
855	–	#endif
915
916	<	void sheepshaver_cpu::handle_interrupt(void)
916	>	void HandleInterrupt(powerpc_registers *r)
917		{
918	<	// Do nothing if interrupts are disabled
919	<	if ((int32 )XLM_IRQ_NEST > 0)
920	<	return;
918	>	#ifdef USE_SDL_VIDEO
919	>	// We must fill in the events queue in the same thread that did call SDL_SetVideoMode()
920	>	SDL_PumpEvents();
921	>	#endif
922
923	<	// Do nothing if there is no interrupt pending
924	<	if (InterruptFlags == 0)
923	>	// Do nothing if interrupts are disabled
924	>	if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0)
925		return;
926
927	<	// Disable MacOS stack sniffer
928	<	WriteMacInt32(0x110, 0);
927	>	// Update interrupt count
928	>	#if EMUL_TIME_STATS
929	>	interrupt_count++;
930	>	#endif
931
932		// Interrupt action depends on current run mode
933		switch (ReadMacInt32(XLM_RUN_MODE)) {
934		case MODE_68K:
935		// 68k emulator active, trigger 68k interrupt level 1
874	–	assert(current_cpu == main_cpu);
936		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
937	<	set_cr(get_cr() \| tswap32(kernel_data->v[0x674 >> 2]));
937	>	r->cr.set(r->cr.get() \| tswap32(kernel_data->v[0x674 >> 2]));
938		break;
939
940		#if INTERRUPTS_IN_NATIVE_MODE
941		case MODE_NATIVE:
942		// 68k emulator inactive, in nanokernel?
943	<	assert(current_cpu == main_cpu);
944	<	if (gpr(1) != KernelDataAddr) {
943	>	if (r->gpr[1] != KernelDataAddr) {
944	>
945		// Prepare for 68k interrupt level 1
946		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
947		WriteMacInt32(tswap32(kernel_data->v[0x658 >> 2]) + 0xdc,
#	Line 889 \| Line 950 \| void sheepshaver_cpu::handle_interrupt(v
950
951		// Execute nanokernel interrupt routine (this will activate the 68k emulator)
952		DisableInterrupt();
892	–	cpu_push(interrupt_cpu);
953		if (ROMType == ROMTYPE_NEWWORLD)
954	<	current_cpu->interrupt(ROM_BASE + 0x312b1c);
954	>	ppc_cpu->interrupt(ROM_BASE + 0x312b1c);
955		else
956	<	current_cpu->interrupt(ROM_BASE + 0x312a3c);
897	<	cpu_pop();
956	>	ppc_cpu->interrupt(ROM_BASE + 0x312a3c);
957		}
958		break;
959		#endif
#	Line 903 \| Line 962 \| void sheepshaver_cpu::handle_interrupt(v
962		case MODE_EMUL_OP:
963		// 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0
964		if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) {
965	+	#if EMUL_TIME_STATS
966	+	const clock_t interrupt_start = clock();
967	+	#endif
968		#if 1
969		// Execute full 68k interrupt routine
970		M68kRegisters r;
971		uint32 old_r25 = ReadMacInt32(XLM_68K_R25); // Save interrupt level
972		WriteMacInt32(XLM_68K_R25, 0x21); // Execute with interrupt level 1
973	<	static const uint8 proc[] = {
973	>	static const uint8 proc_template[] = {
974		0x3f, 0x3c, 0x00, 0x00, // move.w #$0000,-(sp) (fake format word)
975		0x48, 0x7a, 0x00, 0x0a, // pea @1(pc) (return address)
976		0x40, 0xe7, // move sr,-(sp) (saved SR)
#	Line 916 \| Line 978 \| void sheepshaver_cpu::handle_interrupt(v
978		0x4e, 0xd0, // jmp (a0)
979		M68K_RTS >> 8, M68K_RTS & 0xff // @1
980		};
981	<	Execute68k((uint32)proc, &r);
981	>	BUILD_SHEEPSHAVER_PROCEDURE(proc);
982	>	Execute68k(proc, &r);
983		WriteMacInt32(XLM_68K_R25, old_r25); // Restore interrupt level
984		#else
985		// Only update cursor
#	Line 928 \| Line 991 \| void sheepshaver_cpu::handle_interrupt(v
991		}
992		}
993		#endif
994	+	#if EMUL_TIME_STATS
995	+	interrupt_time += (clock() - interrupt_start);
996	+	#endif
997		}
998		break;
999		#endif
1000		}
1001		}
1002
1003	<	static void get_resource(void);
1004	<	static void get_1_resource(void);
939	<	static void get_ind_resource(void);
940	<	static void get_1_ind_resource(void);
941	<	static void r_get_resource(void);
942	<
943	<	#define GPR(REG) current_cpu->gpr(REG)
944	<
945	<	static void NativeOp(int selector)
1003	>	// Execute NATIVE_OP routine
1004	>	void sheepshaver_cpu::execute_native_op(uint32 selector)
1005		{
1006		#if EMUL_TIME_STATS
1007		native_exec_count++;
#	Line 960 \| Line 1019 \| static void NativeOp(int selector)
1019		VideoVBL();
1020		break;
1021		case NATIVE_VIDEO_DO_DRIVER_IO:
1022	<	GPR(3) = (int32)(int16)VideoDoDriverIO((void )GPR(3), (void )GPR(4),
1023	<	(void *)GPR(5), GPR(6), GPR(7));
1022	>	gpr(3) = (int32)(int16)VideoDoDriverIO(gpr(3), gpr(4), gpr(5), gpr(6), gpr(7));
1023	>	break;
1024	>	case NATIVE_ETHER_AO_GET_HWADDR:
1025	>	AO_get_ethernet_address(gpr(3));
1026	>	break;
1027	>	case NATIVE_ETHER_AO_ADD_MULTI:
1028	>	AO_enable_multicast(gpr(3));
1029	>	break;
1030	>	case NATIVE_ETHER_AO_DEL_MULTI:
1031	>	AO_disable_multicast(gpr(3));
1032	>	break;
1033	>	case NATIVE_ETHER_AO_SEND_PACKET:
1034	>	AO_transmit_packet(gpr(3));
1035		break;
966	–	#ifdef WORDS_BIGENDIAN
1036		case NATIVE_ETHER_IRQ:
1037		EtherIRQ();
1038		break;
1039		case NATIVE_ETHER_INIT:
1040	<	GPR(3) = InitStreamModule((void *)GPR(3));
1040	>	gpr(3) = InitStreamModule((void *)gpr(3));
1041		break;
1042		case NATIVE_ETHER_TERM:
1043		TerminateStreamModule();
1044		break;
1045		case NATIVE_ETHER_OPEN:
1046	<	GPR(3) = ether_open((queue_t )GPR(3), (void )GPR(4), GPR(5), GPR(6), (void*)GPR(7));
1046	>	gpr(3) = ether_open((queue_t )gpr(3), (void )gpr(4), gpr(5), gpr(6), (void*)gpr(7));
1047		break;
1048		case NATIVE_ETHER_CLOSE:
1049	<	GPR(3) = ether_close((queue_t )GPR(3), GPR(4), (void )GPR(5));
1049	>	gpr(3) = ether_close((queue_t )gpr(3), gpr(4), (void )gpr(5));
1050		break;
1051		case NATIVE_ETHER_WPUT:
1052	<	GPR(3) = ether_wput((queue_t )GPR(3), (mblk_t )GPR(4));
1052	>	gpr(3) = ether_wput((queue_t )gpr(3), (mblk_t )gpr(4));
1053		break;
1054		case NATIVE_ETHER_RSRV:
1055	<	GPR(3) = ether_rsrv((queue_t *)GPR(3));
1055	>	gpr(3) = ether_rsrv((queue_t *)gpr(3));
1056		break;
1057	<	#else
1058	<	case NATIVE_ETHER_INIT:
1059	<	// FIXME: needs more complicated thunks
1060	<	GPR(3) = false;
1057	>	case NATIVE_NQD_SYNC_HOOK:
1058	>	gpr(3) = NQD_sync_hook(gpr(3));
1059	>	break;
1060	>	case NATIVE_NQD_UNKNOWN_HOOK:
1061	>	gpr(3) = NQD_unknown_hook(gpr(3));
1062	>	break;
1063	>	case NATIVE_NQD_BITBLT_HOOK:
1064	>	gpr(3) = NQD_bitblt_hook(gpr(3));
1065	>	break;
1066	>	case NATIVE_NQD_BITBLT:
1067	>	NQD_bitblt(gpr(3));
1068	>	break;
1069	>	case NATIVE_NQD_FILLRECT_HOOK:
1070	>	gpr(3) = NQD_fillrect_hook(gpr(3));
1071	>	break;
1072	>	case NATIVE_NQD_INVRECT:
1073	>	NQD_invrect(gpr(3));
1074	>	break;
1075	>	case NATIVE_NQD_FILLRECT:
1076	>	NQD_fillrect(gpr(3));
1077		break;
993	–	#endif
1078		case NATIVE_SERIAL_NOTHING:
1079		case NATIVE_SERIAL_OPEN:
1080		case NATIVE_SERIAL_PRIME_IN:
#	Line 1008 \| Line 1092 \| static void NativeOp(int selector)
1092		SerialStatus,
1093		SerialClose
1094		};
1095	<	GPR(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](GPR(3), GPR(4));
1095	>	gpr(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](gpr(3), gpr(4));
1096		break;
1097		}
1098		case NATIVE_GET_RESOURCE:
1099	+	get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1100	+	break;
1101		case NATIVE_GET_1_RESOURCE:
1102	+	get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1103	+	break;
1104		case NATIVE_GET_IND_RESOURCE:
1105	<	case NATIVE_GET_1_IND_RESOURCE:
1018	<	case NATIVE_R_GET_RESOURCE: {
1019	<	typedef void (*GetResourceCallback)(void);
1020	<	static const GetResourceCallback get_resource_callbacks[] = {
1021	<	get_resource,
1022	<	get_1_resource,
1023	<	get_ind_resource,
1024	<	get_1_ind_resource,
1025	<	r_get_resource
1026	<	};
1027	<	get_resource_callbacks[selector - NATIVE_GET_RESOURCE]();
1105	>	get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1106		break;
1107	<	}
1108	<	case NATIVE_DISABLE_INTERRUPT:
1031	<	DisableInterrupt();
1107	>	case NATIVE_GET_1_IND_RESOURCE:
1108	>	get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1109		break;
1110	<	case NATIVE_ENABLE_INTERRUPT:
1111	<	EnableInterrupt();
1110	>	case NATIVE_R_GET_RESOURCE:
1111	>	get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1112		break;
1113		case NATIVE_MAKE_EXECUTABLE:
1114	<	MakeExecutable(0, (void *)GPR(4), GPR(5));
1114	>	MakeExecutable(0, gpr(4), gpr(5));
1115		break;
1116		case NATIVE_CHECK_LOAD_INVOC:
1117	<	check_load_invoc(GPR(3), GPR(4), GPR(5));
1117	>	check_load_invoc(gpr(3), gpr(4), gpr(5));
1118	>	break;
1119	>	case NATIVE_NAMED_CHECK_LOAD_INVOC:
1120	>	named_check_load_invoc(gpr(3), gpr(4), gpr(5));
1121		break;
1122		default:
1123		printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector);
#	Line 1058 \| Line 1138 \| static void NativeOp(int selector)
1138
1139		void Execute68k(uint32 pc, M68kRegisters *r)
1140		{
1141	<	current_cpu->execute_68k(pc, r);
1141	>	ppc_cpu->execute_68k(pc, r);
1142		}
1143
1144		/*
#	Line 1081 \| Line 1161 \| void Execute68kTrap(uint16 trap, M68kReg
1161
1162		uint32 call_macos(uint32 tvect)
1163		{
1164	<	return current_cpu->execute_macos_code(tvect, 0, NULL);
1164	>	return ppc_cpu->execute_macos_code(tvect, 0, NULL);
1165		}
1166
1167		uint32 call_macos1(uint32 tvect, uint32 arg1)
1168		{
1169		const uint32 args[] = { arg1 };
1170	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1170	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1171		}
1172
1173		uint32 call_macos2(uint32 tvect, uint32 arg1, uint32 arg2)
1174		{
1175		const uint32 args[] = { arg1, arg2 };
1176	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1176	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1177		}
1178
1179		uint32 call_macos3(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3)
1180		{
1181		const uint32 args[] = { arg1, arg2, arg3 };
1182	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1182	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1183		}
1184
1185		uint32 call_macos4(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4)
1186		{
1187		const uint32 args[] = { arg1, arg2, arg3, arg4 };
1188	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1188	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1189		}
1190
1191		uint32 call_macos5(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5)
1192		{
1193		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5 };
1194	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1194	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1195		}
1196
1197		uint32 call_macos6(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6)
1198		{
1199		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6 };
1200	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1200	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1201		}
1202
1203		uint32 call_macos7(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6, uint32 arg7)
1204		{
1205		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6, arg7 };
1206	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1127	<	}
1128	<
1129	<	/*
1130	<	* Resource Manager thunks
1131	<	*/
1132	<
1133	<	void get_resource(void)
1134	<	{
1135	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1136	<	}
1137	<
1138	<	void get_1_resource(void)
1139	<	{
1140	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1141	<	}
1142	<
1143	<	void get_ind_resource(void)
1144	<	{
1145	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1146	<	}
1147	<
1148	<	void get_1_ind_resource(void)
1149	<	{
1150	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1151	<	}
1152	<
1153	<	void r_get_resource(void)
1154	<	{
1155	<	current_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1206	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1207		}

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+Removed lines
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Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents): Revision 1.31 by gbeauche, 2004-02-24T14:09:12Z vs. Revision 1.75 by gbeauche, 2008-01-01T09:47:39Z

Diff Legend

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.31 by gbeauche, 2004-02-24T14:09:12Z vs.
Revision 1.75 by gbeauche, 2008-01-01T09:47:39Z