[ViewVC] Diff of: cebix/SheepShaver/src/kpx_cpu/sheepshaver

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.30 by gbeauche, 2004-02-24T11:12:54Z vs.
Revision 1.56 by gbeauche, 2005-01-30T21:12:07Z

#	Line 38 \| Line 38
38		#include "name_registry.h"
39		#include "serial.h"
40		#include "ether.h"
41	+	#include "timer.h"
42
43		#include <stdio.h>
44	+	#include <stdlib.h>
45	+	#ifdef HAVE_MALLOC_H
46	+	#include <malloc.h>
47	+	#endif
48	+
49	+	#ifdef USE_SDL_VIDEO
50	+	#include <SDL_events.h>
51	+	#endif
52
53		#if ENABLE_MON
54		#include "mon.h"
#	Line 50 \| Line 59
59		#include "debug.h"
60
61		// Emulation time statistics
62	<	#define EMUL_TIME_STATS 1
62	>	#ifndef EMUL_TIME_STATS
63	>	#define EMUL_TIME_STATS 0
64	>	#endif
65
66		#if EMUL_TIME_STATS
67		static clock_t emul_start_time;
68	<	static uint32 interrupt_count = 0;
68	>	static uint32 interrupt_count = 0, ppc_interrupt_count = 0;
69		static clock_t interrupt_time = 0;
70		static uint32 exec68k_count = 0;
71		static clock_t exec68k_time = 0;
#	Line 82 \| Line 93 \| extern "C" void check_load_invoc(uint32
93		// PowerPC EmulOp to exit from emulation looop
94		const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP \| 1;
95
96	<	// Enable multicore (main/interrupts) cpu emulation?
97	<	#define MULTICORE_CPU (ASYNC_IRQ ? 1 : 0)
96	>	// Enable interrupt routine safety checks?
97	>	#define SAFE_INTERRUPT_PPC 1
98
99		// Enable Execute68k() safety checks?
100		#define SAFE_EXEC_68K 1
#	Line 98 \| Line 109 \| const uint32 POWERPC_EXEC_RETURN = POWER
109		#define INTERRUPTS_IN_NATIVE_MODE 1
110
111		// Pointer to Kernel Data
112	<	static KernelData * const kernel_data = (KernelData *)KERNEL_DATA_BASE;
112	>	static KernelData * kernel_data;
113
114		// SIGSEGV handler
115	<	static sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
115	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
116	>
117	>	#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
118	>	// Special trampolines for EmulOp and NativeOp
119	>	static uint8 *emul_op_trampoline;
120	>	static uint8 *native_op_trampoline;
121	>	#endif
122
123		// JIT Compiler enabled?
124		static inline bool enable_jit_p()
#	Line 125 \| Line 142 \| class sheepshaver_cpu
142		void init_decoder();
143		void execute_sheep(uint32 opcode);
144
145	+	// CPU context to preserve on interrupt
146	+	class interrupt_context {
147	+	uint32 gpr[32];
148	+	double fpr[32];
149	+	uint32 pc;
150	+	uint32 lr;
151	+	uint32 ctr;
152	+	uint32 cr;
153	+	uint32 xer;
154	+	uint32 fpscr;
155	+	sheepshaver_cpu *cpu;
156	+	const char *where;
157	+	public:
158	+	interrupt_context(sheepshaver_cpu _cpu, const char _where);
159	+	~interrupt_context();
160	+	};
161	+
162		public:
163
164		// Constructor
#	Line 136 \| Line 170 \| public:
170		uint32 get_xer() const { return xer().get(); }
171		void set_xer(uint32 v) { xer().set(v); }
172
173	+	// Execute NATIVE_OP routine
174	+	void execute_native_op(uint32 native_op);
175	+
176		// Execute EMUL_OP routine
177		void execute_emul_op(uint32 emul_op);
178
#	Line 148 \| Line 185 \| public:
185		// Execute MacOS/PPC code
186		uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args);
187
188	+	#if PPC_ENABLE_JIT
189		// Compile one instruction
190	<	virtual bool compile1(codegen_context_t & cg_context);
191	<
190	>	virtual int compile1(codegen_context_t & cg_context);
191	>	#endif
192		// Resource manager thunk
193		void get_resource(uint32 old_get_resource);
194
#	Line 160 \| Line 198 \| public:
198
199		// Make sure the SIGSEGV handler can access CPU registers
200		friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
201	+
202	+	// Memory allocator returning areas aligned on 16-byte boundaries
203	+	void *operator new(size_t size);
204	+	void operator delete(void *p);
205		};
206
207		// Memory allocator returning areas aligned on 16-byte boundaries
208	<	void *operator new(size_t size)
208	>	void *sheepshaver_cpu::operator new(size_t size)
209		{
210		void *p;
211
212	<	/* XXX: try different approaches */
212	>	#if defined(HAVE_POSIX_MEMALIGN)
213		if (posix_memalign(&p, 16, size) != 0)
214		throw std::bad_alloc();
215	+	#elif defined(HAVE_MEMALIGN)
216	+	p = memalign(16, size);
217	+	#elif defined(HAVE_VALLOC)
218	+	p = valloc(size); // page-aligned!
219	+	#else
220	+	/* XXX: handle padding ourselves */
221	+	p = malloc(size);
222	+	#endif
223
224		return p;
225		}
226
227	<	void operator delete(void *p)
227	>	void sheepshaver_cpu::operator delete(void *p)
228		{
229	+	#if defined(HAVE_MEMALIGN) \|\| defined(HAVE_VALLOC)
230	+	#if defined(__GLIBC__)
231	+	// this is known to work only with GNU libc
232	+	free(p);
233	+	#endif
234	+	#else
235		free(p);
236	+	#endif
237		}
238
239		sheepshaver_cpu::sheepshaver_cpu()
#	Line 205 \| Line 262 \| void sheepshaver_cpu::init_decoder()
262		}
263		}
264
208	–	// Forward declaration for native opcode handler
209	–	static void NativeOp(int selector);
210	–
265		/* NativeOp instruction format:
266	<	+------------+--------------------------+--+----------+------------+
267	<	\| 6 \| \|FN\| OP \| 2 \|
268	<	+------------+--------------------------+--+----------+------------+
269	<	0 5 \|6 19 20 21 25 26 31
266	>	+------------+-------------------------+--+-----------+------------+
267	>	\| 6 \| \|FN\| OP \| 2 \|
268	>	+------------+-------------------------+--+-----------+------------+
269	>	0 5 \|6 18 19 20 25 26 31
270		*/
271
272	<	typedef bit_field< 20, 20 > FN_field;
273	<	typedef bit_field< 21, 25 > NATIVE_OP_field;
272	>	typedef bit_field< 19, 19 > FN_field;
273	>	typedef bit_field< 20, 25 > NATIVE_OP_field;
274		typedef bit_field< 26, 31 > EMUL_OP_field;
275
276		// Execute EMUL_OP routine
#	Line 259 \| Line 313 \| void sheepshaver_cpu::execute_sheep(uint
313		break;
314
315		case 2: // EXEC_NATIVE
316	<	NativeOp(NATIVE_OP_field::extract(opcode));
316	>	execute_native_op(NATIVE_OP_field::extract(opcode));
317		if (FN_field::test(opcode))
318		pc() = lr();
319		else
#	Line 274 \| Line 328 \| void sheepshaver_cpu::execute_sheep(uint
328		}
329
330		// Compile one instruction
277	–	bool sheepshaver_cpu::compile1(codegen_context_t & cg_context)
278	–	{
331		#if PPC_ENABLE_JIT
332	+	int sheepshaver_cpu::compile1(codegen_context_t & cg_context)
333	+	{
334		const instr_info_t *ii = cg_context.instr_info;
335		if (ii->mnemo != PPC_I(SHEEP))
336	<	return false;
336	>	return COMPILE_FAILURE;
337
338	<	bool compiled = false;
338	>	int status = COMPILE_FAILURE;
339		powerpc_dyngen & dg = cg_context.codegen;
340		uint32 opcode = cg_context.opcode;
341
342		switch (opcode & 0x3f) {
343		case 0: // EMUL_RETURN
344		dg.gen_invoke(QuitEmulator);
345	<	compiled = true;
345	>	status = COMPILE_CODE_OK;
346		break;
347
348		case 1: // EXEC_RETURN
349		dg.gen_spcflags_set(SPCFLAG_CPU_EXEC_RETURN);
350	<	compiled = true;
350	>	// Don't check for pending interrupts, we do know we have to
351	>	// get out of this block ASAP
352	>	dg.gen_exec_return();
353	>	status = COMPILE_EPILOGUE_OK;
354		break;
355
356		case 2: { // EXEC_NATIVE
357		uint32 selector = NATIVE_OP_field::extract(opcode);
358		switch (selector) {
359	+	#if !PPC_REENTRANT_JIT
360	+	// Filter out functions that may invoke Execute68k() or
361	+	// CallMacOS(), this would break reentrancy as they could
362	+	// invalidate the translation cache and even overwrite
363	+	// continuation code when we are done with them.
364		case NATIVE_PATCH_NAME_REGISTRY:
365		dg.gen_invoke(DoPatchNameRegistry);
366	<	compiled = true;
366	>	status = COMPILE_CODE_OK;
367		break;
368		case NATIVE_VIDEO_INSTALL_ACCEL:
369		dg.gen_invoke(VideoInstallAccel);
370	<	compiled = true;
370	>	status = COMPILE_CODE_OK;
371		break;
372		case NATIVE_VIDEO_VBL:
373		dg.gen_invoke(VideoVBL);
374	<	compiled = true;
374	>	status = COMPILE_CODE_OK;
375		break;
376		case NATIVE_GET_RESOURCE:
377		case NATIVE_GET_1_RESOURCE:
#	Line 327 \| Line 389 \| bool sheepshaver_cpu::compile1(codegen_c
389		typedef void (*func_t)(dyngen_cpu_base, uint32);
390		func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::get_resource).ptr();
391		dg.gen_invoke_CPU_im(func, old_get_resource);
392	<	compiled = true;
392	>	status = COMPILE_CODE_OK;
393		break;
394		}
333	–	case NATIVE_DISABLE_INTERRUPT:
334	–	dg.gen_invoke(DisableInterrupt);
335	–	compiled = true;
336	–	break;
337	–	case NATIVE_ENABLE_INTERRUPT:
338	–	dg.gen_invoke(EnableInterrupt);
339	–	compiled = true;
340	–	break;
395		case NATIVE_CHECK_LOAD_INVOC:
396		dg.gen_load_T0_GPR(3);
397		dg.gen_load_T1_GPR(4);
398		dg.gen_se_16_32_T1();
399		dg.gen_load_T2_GPR(5);
400		dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))check_load_invoc);
401	<	compiled = true;
401	>	status = COMPILE_CODE_OK;
402	>	break;
403	>	#endif
404	>	case NATIVE_BITBLT:
405	>	dg.gen_load_T0_GPR(3);
406	>	dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt);
407	>	status = COMPILE_CODE_OK;
408	>	break;
409	>	case NATIVE_INVRECT:
410	>	dg.gen_load_T0_GPR(3);
411	>	dg.gen_invoke_T0((void (*)(uint32))NQD_invrect);
412	>	status = COMPILE_CODE_OK;
413	>	break;
414	>	case NATIVE_FILLRECT:
415	>	dg.gen_load_T0_GPR(3);
416	>	dg.gen_invoke_T0((void (*)(uint32))NQD_fillrect);
417	>	status = COMPILE_CODE_OK;
418		break;
419		}
420	<	if (FN_field::test(opcode)) {
421	<	if (compiled) {
420	>	// Could we fully translate this NativeOp?
421	>	if (status == COMPILE_CODE_OK) {
422	>	if (!FN_field::test(opcode))
423	>	cg_context.done_compile = false;
424	>	else {
425		dg.gen_load_A0_LR();
426		dg.gen_set_PC_A0();
427	+	cg_context.done_compile = true;
428		}
429	<	cg_context.done_compile = true;
429	>	break;
430		}
431	<	else
431	>	#if PPC_REENTRANT_JIT
432	>	// Try to execute NativeOp trampoline
433	>	if (!FN_field::test(opcode))
434	>	dg.gen_set_PC_im(cg_context.pc + 4);
435	>	else {
436	>	dg.gen_load_A0_LR();
437	>	dg.gen_set_PC_A0();
438	>	}
439	>	dg.gen_mov_32_T0_im(selector);
440	>	dg.gen_jmp(native_op_trampoline);
441	>	cg_context.done_compile = true;
442	>	status = COMPILE_EPILOGUE_OK;
443	>	break;
444	>	#endif
445	>	// Invoke NativeOp handler
446	>	if (!FN_field::test(opcode)) {
447	>	typedef void (*func_t)(dyngen_cpu_base, uint32);
448	>	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
449	>	dg.gen_invoke_CPU_im(func, selector);
450		cg_context.done_compile = false;
451	+	status = COMPILE_CODE_OK;
452	+	}
453	+	// Otherwise, let it generate a call to execute_sheep() which
454	+	// will cause necessary updates to the program counter
455		break;
456		}
457
458		default: { // EMUL_OP
459	+	uint32 emul_op = EMUL_OP_field::extract(opcode) - 3;
460	+	#if PPC_REENTRANT_JIT
461	+	// Try to execute EmulOp trampoline
462	+	dg.gen_set_PC_im(cg_context.pc + 4);
463	+	dg.gen_mov_32_T0_im(emul_op);
464	+	dg.gen_jmp(emul_op_trampoline);
465	+	cg_context.done_compile = true;
466	+	status = COMPILE_EPILOGUE_OK;
467	+	break;
468	+	#endif
469	+	// Invoke EmulOp handler
470		typedef void (*func_t)(dyngen_cpu_base, uint32);
471		func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr();
472	<	dg.gen_invoke_CPU_im(func, EMUL_OP_field::extract(opcode) - 3);
472	>	dg.gen_invoke_CPU_im(func, emul_op);
473		cg_context.done_compile = false;
474	<	compiled = true;
474	>	status = COMPILE_CODE_OK;
475		break;
476		}
477		}
478	<	return compiled;
478	>	return status;
479	>	}
480	>	#endif
481	>
482	>	// CPU context to preserve on interrupt
483	>	sheepshaver_cpu::interrupt_context::interrupt_context(sheepshaver_cpu _cpu, const char _where)
484	>	{
485	>	#if SAFE_INTERRUPT_PPC >= 2
486	>	cpu = _cpu;
487	>	where = _where;
488	>
489	>	// Save interrupt context
490	>	memcpy(&gpr[0], &cpu->gpr(0), sizeof(gpr));
491	>	memcpy(&fpr[0], &cpu->fpr(0), sizeof(fpr));
492	>	pc = cpu->pc();
493	>	lr = cpu->lr();
494	>	ctr = cpu->ctr();
495	>	cr = cpu->get_cr();
496	>	xer = cpu->get_xer();
497	>	fpscr = cpu->fpscr();
498	>	#endif
499	>	}
500	>
501	>	sheepshaver_cpu::interrupt_context::~interrupt_context()
502	>	{
503	>	#if SAFE_INTERRUPT_PPC >= 2
504	>	// Check whether CPU context was preserved by interrupt
505	>	if (memcmp(&gpr[0], &cpu->gpr(0), sizeof(gpr)) != 0) {
506	>	printf("FATAL: %s: interrupt clobbers registers\n", where);
507	>	for (int i = 0; i < 32; i++)
508	>	if (gpr[i] != cpu->gpr(i))
509	>	printf(" r%d: %08x -> %08x\n", i, gpr[i], cpu->gpr(i));
510	>	}
511	>	if (memcmp(&fpr[0], &cpu->fpr(0), sizeof(fpr)) != 0) {
512	>	printf("FATAL: %s: interrupt clobbers registers\n", where);
513	>	for (int i = 0; i < 32; i++)
514	>	if (fpr[i] != cpu->fpr(i))
515	>	printf(" r%d: %f -> %f\n", i, fpr[i], cpu->fpr(i));
516	>	}
517	>	if (pc != cpu->pc())
518	>	printf("FATAL: %s: interrupt clobbers PC\n", where);
519	>	if (lr != cpu->lr())
520	>	printf("FATAL: %s: interrupt clobbers LR\n", where);
521	>	if (ctr != cpu->ctr())
522	>	printf("FATAL: %s: interrupt clobbers CTR\n", where);
523	>	if (cr != cpu->get_cr())
524	>	printf("FATAL: %s: interrupt clobbers CR\n", where);
525	>	if (xer != cpu->get_xer())
526	>	printf("FATAL: %s: interrupt clobbers XER\n", where);
527	>	if (fpscr != cpu->fpscr())
528	>	printf("FATAL: %s: interrupt clobbers FPSCR\n", where);
529		#endif
373	–	return false;
530		}
531
532		// Handle MacOS interrupt
533		void sheepshaver_cpu::interrupt(uint32 entry)
534		{
535		#if EMUL_TIME_STATS
536	<	interrupt_count++;
536	>	ppc_interrupt_count++;
537		const clock_t interrupt_start = clock();
538		#endif
539
540	<	#if !MULTICORE_CPU
540	>	#if SAFE_INTERRUPT_PPC
541	>	static int depth = 0;
542	>	if (depth != 0)
543	>	printf("FATAL: sheepshaver_cpu::interrupt() called more than once: %d\n", depth);
544	>	depth++;
545	>	#endif
546	>
547		// Save program counters and branch registers
548		uint32 saved_pc = pc();
549		uint32 saved_lr = lr();
550		uint32 saved_ctr= ctr();
551		uint32 saved_sp = gpr(1);
390	–	#endif
552
553		// Initialize stack pointer to SheepShaver alternate stack base
554		gpr(1) = SignalStackBase() - 64;
#	Line 427 \| Line 588 \| void sheepshaver_cpu::interrupt(uint32 e
588		// Enter nanokernel
589		execute(entry);
590
430	–	#if !MULTICORE_CPU
591		// Restore program counters and branch registers
592		pc() = saved_pc;
593		lr() = saved_lr;
594		ctr()= saved_ctr;
595		gpr(1) = saved_sp;
436	–	#endif
596
597		#if EMUL_TIME_STATS
598		interrupt_time += (clock() - interrupt_start);
599		#endif
600	+
601	+	#if SAFE_INTERRUPT_PPC
602	+	depth--;
603	+	#endif
604		}
605
606		// Execute 68k routine
#	Line 631 \| Line 794 \| inline void sheepshaver_cpu::get_resourc
794		* SheepShaver CPU engine interface
795		**/
796
797	<	static sheepshaver_cpu *main_cpu = NULL; // CPU emulator to handle usual control flow
798	<	static sheepshaver_cpu *interrupt_cpu = NULL; // CPU emulator to handle interrupts
636	<	static sheepshaver_cpu *current_cpu = NULL; // Current CPU emulator context
797	>	// PowerPC CPU emulator
798	>	static sheepshaver_cpu *ppc_cpu = NULL;
799
800		void FlushCodeCache(uintptr start, uintptr end)
801		{
802		D(bug("FlushCodeCache(%08x, %08x)\n", start, end));
803	<	main_cpu->invalidate_cache_range(start, end);
642	<	#if MULTICORE_CPU
643	<	interrupt_cpu->invalidate_cache_range(start, end);
644	<	#endif
645	<	}
646	<
647	<	static inline void cpu_push(sheepshaver_cpu *new_cpu)
648	<	{
649	<	#if MULTICORE_CPU
650	<	current_cpu = new_cpu;
651	<	#endif
652	<	}
653	<
654	<	static inline void cpu_pop()
655	<	{
656	<	#if MULTICORE_CPU
657	<	current_cpu = main_cpu;
658	<	#endif
803	>	ppc_cpu->invalidate_cache_range(start, end);
804		}
805
806		// Dump PPC registers
807		static void dump_registers(void)
808		{
809	<	current_cpu->dump_registers();
809	>	ppc_cpu->dump_registers();
810		}
811
812		// Dump log
813		static void dump_log(void)
814		{
815	<	current_cpu->dump_log();
815	>	ppc_cpu->dump_log();
816		}
817
818		/*
819		* Initialize CPU emulation
820		*/
821
822	<	static sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
822	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
823		{
824		#if ENABLE_VOSF
825		// Handle screen fault
#	Line 686 \| Line 831 \| static sigsegv_return_t sigsegv_handler(
831		const uintptr addr = (uintptr)fault_address;
832		#if HAVE_SIGSEGV_SKIP_INSTRUCTION
833		// Ignore writes to ROM
834	<	if ((addr - ROM_BASE) < ROM_SIZE)
834	>	if ((addr - (uintptr)ROMBaseHost) < ROM_SIZE)
835		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
836
837		// Get program counter of target CPU
838	<	sheepshaver_cpu * const cpu = current_cpu;
838	>	sheepshaver_cpu * const cpu = ppc_cpu;
839		const uint32 pc = cpu->pc();
840
841		// Fault in Mac ROM or RAM?
842	<	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) \|\| (pc >= RAMBase) && (pc < (RAMBase + RAMSize));
842	>	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) \|\| (pc >= RAMBase) && (pc < (RAMBase + RAMSize)) \|\| (pc >= DR_CACHE_BASE && pc < (DR_CACHE_BASE + DR_CACHE_SIZE));
843		if (mac_fault) {
844
845		// "VM settings" during MacOS 8 installation
#	Line 714 \| Line 859 \| static sigsegv_return_t sigsegv_handler(
859		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
860		else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 \|\| cpu->gpr(20) == 0xf3012000))
861		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
862	+
863	+	// MacOS 8.6 serial drivers on startup (with DR Cache and OldWorld ROM)
864	+	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(16) == 0xf3012002 \|\| cpu->gpr(16) == 0xf3012000))
865	+	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
866	+	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(20) == 0xf3012002 \|\| cpu->gpr(20) == 0xf3012000))
867	+	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
868
869		// Ignore writes to the zero page
870		else if ((uint32)(addr - SheepMem::ZeroPage()) < (uint32)SheepMem::PageSize())
#	Line 730 \| Line 881 \| static sigsegv_return_t sigsegv_handler(
881		printf("SIGSEGV\n");
882		printf(" pc %p\n", fault_instruction);
883		printf(" ea %p\n", fault_address);
733	–	printf(" cpu %s\n", current_cpu == main_cpu ? "main" : "interrupts");
884		dump_registers();
885	<	current_cpu->dump_log();
885	>	ppc_cpu->dump_log();
886		enter_mon();
887		QuitEmulator();
888
#	Line 741 \| Line 891 \| static sigsegv_return_t sigsegv_handler(
891
892		void init_emul_ppc(void)
893		{
894	+	// Get pointer to KernelData in host address space
895	+	kernel_data = (KernelData *)Mac2HostAddr(KERNEL_DATA_BASE);
896	+
897		// Initialize main CPU emulator
898	<	main_cpu = new sheepshaver_cpu();
899	<	main_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
900	<	main_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
898	>	ppc_cpu = new sheepshaver_cpu();
899	>	ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
900	>	ppc_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
901		WriteMacInt32(XLM_RUN_MODE, MODE_68K);
902
750	–	#if MULTICORE_CPU
751	–	// Initialize alternate CPU emulator to handle interrupts
752	–	interrupt_cpu = new sheepshaver_cpu();
753	–	#endif
754	–
755	–	// Install the handler for SIGSEGV
756	–	sigsegv_install_handler(sigsegv_handler);
757	–
903		#if ENABLE_MON
904		// Install "regs" command in cxmon
905		mon_add_command("regs", dump_registers, "regs Dump PowerPC registers\n");
#	Line 780 \| Line 925 \| void exit_emul_ppc(void)
925		printf("Total emulation time : %.1f sec\n", double(emul_time) / double(CLOCKS_PER_SEC));
926		printf("Total interrupt count: %d (%2.1f Hz)\n", interrupt_count,
927		(double(interrupt_count) * CLOCKS_PER_SEC) / double(emul_time));
928	+	printf("Total ppc interrupt count: %d (%2.1f %%)\n", ppc_interrupt_count,
929	+	(double(ppc_interrupt_count) * 100.0) / double(interrupt_count));
930
931		#define PRINT_STATS(LABEL, VAR_PREFIX) do { \
932		printf("Total " LABEL " count : %d\n", VAR_PREFIX##_count); \
#	Line 796 \| Line 943 \| void exit_emul_ppc(void)
943		printf("\n");
944		#endif
945
946	<	delete main_cpu;
947	<	#if MULTICORE_CPU
948	<	delete interrupt_cpu;
949	<	#endif
946	>	delete ppc_cpu;
947	>	}
948	>
949	>	#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
950	>	// Initialize EmulOp trampolines
951	>	void init_emul_op_trampolines(basic_dyngen & dg)
952	>	{
953	>	typedef void (*func_t)(dyngen_cpu_base, uint32);
954	>	func_t func;
955	>
956	>	// EmulOp
957	>	emul_op_trampoline = dg.gen_start();
958	>	func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr();
959	>	dg.gen_invoke_CPU_T0(func);
960	>	dg.gen_exec_return();
961	>	dg.gen_end();
962	>
963	>	// NativeOp
964	>	native_op_trampoline = dg.gen_start();
965	>	func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
966	>	dg.gen_invoke_CPU_T0(func);
967	>	dg.gen_exec_return();
968	>	dg.gen_end();
969	>
970	>	D(bug("EmulOp trampoline: %p\n", emul_op_trampoline));
971	>	D(bug("NativeOp trampoline: %p\n", native_op_trampoline));
972		}
973	+	#endif
974
975		/*
976		* Emulation loop
#	Line 808 \| Line 978 \| void exit_emul_ppc(void)
978
979		void emul_ppc(uint32 entry)
980		{
811	–	current_cpu = main_cpu;
981		#if 0
982	<	current_cpu->start_log();
982	>	ppc_cpu->start_log();
983		#endif
984		// start emulation loop and enable code translation or caching
985	<	current_cpu->execute(entry);
985	>	ppc_cpu->execute(entry);
986		}
987
988		/*
989		* Handle PowerPC interrupt
990		*/
991
823	–	#if ASYNC_IRQ
824	–	void HandleInterrupt(void)
825	–	{
826	–	main_cpu->handle_interrupt();
827	–	}
828	–	#else
992		void TriggerInterrupt(void)
993		{
994		#if 0
995		WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1);
996		#else
997		// Trigger interrupt to main cpu only
998	<	if (main_cpu)
999	<	main_cpu->trigger_interrupt();
998	>	if (ppc_cpu)
999	>	ppc_cpu->trigger_interrupt();
1000		#endif
1001		}
839	–	#endif
1002
1003		void sheepshaver_cpu::handle_interrupt(void)
1004		{
1005	+	#ifdef USE_SDL_VIDEO
1006	+	// We must fill in the events queue in the same thread that did call SDL_SetVideoMode()
1007	+	SDL_PumpEvents();
1008	+	#endif
1009	+
1010		// Do nothing if interrupts are disabled
1011	<	if ((int32 )XLM_IRQ_NEST > 0)
1011	>	if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0)
1012		return;
1013
1014	<	// Do nothing if there is no interrupt pending
1015	<	if (InterruptFlags == 0)
1016	<	return;
1014	>	// Current interrupt nest level
1015	>	static int interrupt_depth = 0;
1016	>	++interrupt_depth;
1017	>	#if EMUL_TIME_STATS
1018	>	interrupt_count++;
1019	>	#endif
1020
1021		// Disable MacOS stack sniffer
1022		WriteMacInt32(0x110, 0);
#	Line 855 \| Line 1025 \| void sheepshaver_cpu::handle_interrupt(v
1025		switch (ReadMacInt32(XLM_RUN_MODE)) {
1026		case MODE_68K:
1027		// 68k emulator active, trigger 68k interrupt level 1
858	–	assert(current_cpu == main_cpu);
1028		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
1029		set_cr(get_cr() \| tswap32(kernel_data->v[0x674 >> 2]));
1030		break;
#	Line 863 \| Line 1032 \| void sheepshaver_cpu::handle_interrupt(v
1032		#if INTERRUPTS_IN_NATIVE_MODE
1033		case MODE_NATIVE:
1034		// 68k emulator inactive, in nanokernel?
1035	<	assert(current_cpu == main_cpu);
1036	<	if (gpr(1) != KernelDataAddr) {
1035	>	if (gpr(1) != KernelDataAddr && interrupt_depth == 1) {
1036	>	interrupt_context ctx(this, "PowerPC mode");
1037	>
1038		// Prepare for 68k interrupt level 1
1039		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
1040		WriteMacInt32(tswap32(kernel_data->v[0x658 >> 2]) + 0xdc,
#	Line 873 \| Line 1043 \| void sheepshaver_cpu::handle_interrupt(v
1043
1044		// Execute nanokernel interrupt routine (this will activate the 68k emulator)
1045		DisableInterrupt();
876	–	cpu_push(interrupt_cpu);
1046		if (ROMType == ROMTYPE_NEWWORLD)
1047	<	current_cpu->interrupt(ROM_BASE + 0x312b1c);
1047	>	ppc_cpu->interrupt(ROM_BASE + 0x312b1c);
1048		else
1049	<	current_cpu->interrupt(ROM_BASE + 0x312a3c);
881	<	cpu_pop();
1049	>	ppc_cpu->interrupt(ROM_BASE + 0x312a3c);
1050		}
1051		break;
1052		#endif
#	Line 887 \| Line 1055 \| void sheepshaver_cpu::handle_interrupt(v
1055		case MODE_EMUL_OP:
1056		// 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0
1057		if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) {
1058	+	interrupt_context ctx(this, "68k mode");
1059	+	#if EMUL_TIME_STATS
1060	+	const clock_t interrupt_start = clock();
1061	+	#endif
1062		#if 1
1063		// Execute full 68k interrupt routine
1064		M68kRegisters r;
1065		uint32 old_r25 = ReadMacInt32(XLM_68K_R25); // Save interrupt level
1066		WriteMacInt32(XLM_68K_R25, 0x21); // Execute with interrupt level 1
1067	<	static const uint8 proc[] = {
1067	>	static const uint8 proc_template[] = {
1068		0x3f, 0x3c, 0x00, 0x00, // move.w #$0000,-(sp) (fake format word)
1069		0x48, 0x7a, 0x00, 0x0a, // pea @1(pc) (return address)
1070		0x40, 0xe7, // move sr,-(sp) (saved SR)
#	Line 900 \| Line 1072 \| void sheepshaver_cpu::handle_interrupt(v
1072		0x4e, 0xd0, // jmp (a0)
1073		M68K_RTS >> 8, M68K_RTS & 0xff // @1
1074		};
1075	<	Execute68k((uint32)proc, &r);
1075	>	BUILD_SHEEPSHAVER_PROCEDURE(proc);
1076	>	Execute68k(proc, &r);
1077		WriteMacInt32(XLM_68K_R25, old_r25); // Restore interrupt level
1078		#else
1079		// Only update cursor
#	Line 912 \| Line 1085 \| void sheepshaver_cpu::handle_interrupt(v
1085		}
1086		}
1087		#endif
1088	+	#if EMUL_TIME_STATS
1089	+	interrupt_time += (clock() - interrupt_start);
1090	+	#endif
1091		}
1092		break;
1093		#endif
1094		}
1095	+
1096	+	// We are done with this interrupt
1097	+	--interrupt_depth;
1098		}
1099
1100		static void get_resource(void);
#	Line 924 \| Line 1103 \| static void get_ind_resource(void);
1103		static void get_1_ind_resource(void);
1104		static void r_get_resource(void);
1105
1106	<	#define GPR(REG) current_cpu->gpr(REG)
1107	<
929	<	static void NativeOp(int selector)
1106	>	// Execute NATIVE_OP routine
1107	>	void sheepshaver_cpu::execute_native_op(uint32 selector)
1108		{
1109		#if EMUL_TIME_STATS
1110		native_exec_count++;
#	Line 944 \| Line 1122 \| static void NativeOp(int selector)
1122		VideoVBL();
1123		break;
1124		case NATIVE_VIDEO_DO_DRIVER_IO:
1125	<	GPR(3) = (int32)(int16)VideoDoDriverIO((void )GPR(3), (void )GPR(4),
948	<	(void *)GPR(5), GPR(6), GPR(7));
1125	>	gpr(3) = (int32)(int16)VideoDoDriverIO(gpr(3), gpr(4), gpr(5), gpr(6), gpr(7));
1126		break;
950	–	#ifdef WORDS_BIGENDIAN
1127		case NATIVE_ETHER_IRQ:
1128		EtherIRQ();
1129		break;
1130		case NATIVE_ETHER_INIT:
1131	<	GPR(3) = InitStreamModule((void *)GPR(3));
1131	>	gpr(3) = InitStreamModule((void *)gpr(3));
1132		break;
1133		case NATIVE_ETHER_TERM:
1134		TerminateStreamModule();
1135		break;
1136		case NATIVE_ETHER_OPEN:
1137	<	GPR(3) = ether_open((queue_t )GPR(3), (void )GPR(4), GPR(5), GPR(6), (void*)GPR(7));
1137	>	gpr(3) = ether_open((queue_t )gpr(3), (void )gpr(4), gpr(5), gpr(6), (void*)gpr(7));
1138		break;
1139		case NATIVE_ETHER_CLOSE:
1140	<	GPR(3) = ether_close((queue_t )GPR(3), GPR(4), (void )GPR(5));
1140	>	gpr(3) = ether_close((queue_t )gpr(3), gpr(4), (void )gpr(5));
1141		break;
1142		case NATIVE_ETHER_WPUT:
1143	<	GPR(3) = ether_wput((queue_t )GPR(3), (mblk_t )GPR(4));
1143	>	gpr(3) = ether_wput((queue_t )gpr(3), (mblk_t )gpr(4));
1144		break;
1145		case NATIVE_ETHER_RSRV:
1146	<	GPR(3) = ether_rsrv((queue_t *)GPR(3));
1146	>	gpr(3) = ether_rsrv((queue_t *)gpr(3));
1147		break;
1148	<	#else
1149	<	case NATIVE_ETHER_INIT:
1150	<	// FIXME: needs more complicated thunks
1151	<	GPR(3) = false;
1148	>	case NATIVE_SYNC_HOOK:
1149	>	gpr(3) = NQD_sync_hook(gpr(3));
1150	>	break;
1151	>	case NATIVE_BITBLT_HOOK:
1152	>	gpr(3) = NQD_bitblt_hook(gpr(3));
1153	>	break;
1154	>	case NATIVE_BITBLT:
1155	>	NQD_bitblt(gpr(3));
1156	>	break;
1157	>	case NATIVE_FILLRECT_HOOK:
1158	>	gpr(3) = NQD_fillrect_hook(gpr(3));
1159	>	break;
1160	>	case NATIVE_INVRECT:
1161	>	NQD_invrect(gpr(3));
1162	>	break;
1163	>	case NATIVE_FILLRECT:
1164	>	NQD_fillrect(gpr(3));
1165		break;
977	–	#endif
1166		case NATIVE_SERIAL_NOTHING:
1167		case NATIVE_SERIAL_OPEN:
1168		case NATIVE_SERIAL_PRIME_IN:
#	Line 992 \| Line 1180 \| static void NativeOp(int selector)
1180		SerialStatus,
1181		SerialClose
1182		};
1183	<	GPR(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](GPR(3), GPR(4));
1183	>	gpr(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](gpr(3), gpr(4));
1184		break;
1185		}
1186		case NATIVE_GET_RESOURCE:
#	Line 1002 \| Line 1190 \| static void NativeOp(int selector)
1190		case NATIVE_R_GET_RESOURCE: {
1191		typedef void (*GetResourceCallback)(void);
1192		static const GetResourceCallback get_resource_callbacks[] = {
1193	<	get_resource,
1194	<	get_1_resource,
1195	<	get_ind_resource,
1196	<	get_1_ind_resource,
1197	<	r_get_resource
1193	>	::get_resource,
1194	>	::get_1_resource,
1195	>	::get_ind_resource,
1196	>	::get_1_ind_resource,
1197	>	::r_get_resource
1198		};
1199		get_resource_callbacks[selector - NATIVE_GET_RESOURCE]();
1200		break;
1201		}
1014	–	case NATIVE_DISABLE_INTERRUPT:
1015	–	DisableInterrupt();
1016	–	break;
1017	–	case NATIVE_ENABLE_INTERRUPT:
1018	–	EnableInterrupt();
1019	–	break;
1202		case NATIVE_MAKE_EXECUTABLE:
1203	<	MakeExecutable(0, (void *)GPR(4), GPR(5));
1203	>	MakeExecutable(0, gpr(4), gpr(5));
1204		break;
1205		case NATIVE_CHECK_LOAD_INVOC:
1206	<	check_load_invoc(GPR(3), GPR(4), GPR(5));
1206	>	check_load_invoc(gpr(3), gpr(4), gpr(5));
1207		break;
1208		default:
1209		printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector);
#	Line 1042 \| Line 1224 \| static void NativeOp(int selector)
1224
1225		void Execute68k(uint32 pc, M68kRegisters *r)
1226		{
1227	<	current_cpu->execute_68k(pc, r);
1227	>	ppc_cpu->execute_68k(pc, r);
1228		}
1229
1230		/*
#	Line 1065 \| Line 1247 \| void Execute68kTrap(uint16 trap, M68kReg
1247
1248		uint32 call_macos(uint32 tvect)
1249		{
1250	<	return current_cpu->execute_macos_code(tvect, 0, NULL);
1250	>	return ppc_cpu->execute_macos_code(tvect, 0, NULL);
1251		}
1252
1253		uint32 call_macos1(uint32 tvect, uint32 arg1)
1254		{
1255		const uint32 args[] = { arg1 };
1256	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1256	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1257		}
1258
1259		uint32 call_macos2(uint32 tvect, uint32 arg1, uint32 arg2)
1260		{
1261		const uint32 args[] = { arg1, arg2 };
1262	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1262	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1263		}
1264
1265		uint32 call_macos3(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3)
1266		{
1267		const uint32 args[] = { arg1, arg2, arg3 };
1268	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1268	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1269		}
1270
1271		uint32 call_macos4(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4)
1272		{
1273		const uint32 args[] = { arg1, arg2, arg3, arg4 };
1274	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1274	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1275		}
1276
1277		uint32 call_macos5(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5)
1278		{
1279		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5 };
1280	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1280	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1281		}
1282
1283		uint32 call_macos6(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6)
1284		{
1285		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6 };
1286	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1286	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1287		}
1288
1289		uint32 call_macos7(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6, uint32 arg7)
1290		{
1291		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6, arg7 };
1292	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1292	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1293		}
1294
1295		/*
#	Line 1116 \| Line 1298 \| uint32 call_macos7(uint32 tvect, uint32
1298
1299		void get_resource(void)
1300		{
1301	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1301	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1302		}
1303
1304		void get_1_resource(void)
1305		{
1306	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1306	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1307		}
1308
1309		void get_ind_resource(void)
1310		{
1311	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1311	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1312		}
1313
1314		void get_1_ind_resource(void)
1315		{
1316	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1316	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1317		}
1318
1319		void r_get_resource(void)
1320		{
1321	<	current_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1321	>	ppc_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1322		}

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+Removed lines
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Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents): Revision 1.30 by gbeauche, 2004-02-24T11:12:54Z vs. Revision 1.56 by gbeauche, 2005-01-30T21:12:07Z

Diff Legend

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.30 by gbeauche, 2004-02-24T11:12:54Z vs.
Revision 1.56 by gbeauche, 2005-01-30T21:12:07Z