76 |
|
// From main_*.cpp |
77 |
|
extern uintptr SignalStackBase(); |
78 |
|
|
79 |
+ |
// From rsrc_patches.cpp |
80 |
+ |
extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h); |
81 |
+ |
|
82 |
|
// PowerPC EmulOp to exit from emulation looop |
83 |
|
const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1; |
84 |
|
|
136 |
|
uint32 get_xer() const { return xer().get(); } |
137 |
|
void set_xer(uint32 v) { xer().set(v); } |
138 |
|
|
139 |
+ |
// Execute EMUL_OP routine |
140 |
+ |
void execute_emul_op(uint32 emul_op); |
141 |
+ |
|
142 |
|
// Execute 68k routine |
143 |
|
void execute_68k(uint32 entry, M68kRegisters *r); |
144 |
|
|
148 |
|
// Execute MacOS/PPC code |
149 |
|
uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args); |
150 |
|
|
151 |
+ |
// Compile one instruction |
152 |
+ |
virtual bool compile1(codegen_context_t & cg_context); |
153 |
+ |
|
154 |
|
// Resource manager thunk |
155 |
|
void get_resource(uint32 old_get_resource); |
156 |
|
|
158 |
|
void interrupt(uint32 entry); |
159 |
|
void handle_interrupt(); |
160 |
|
|
152 |
– |
// Lazy memory allocator (one item at a time) |
153 |
– |
void *operator new(size_t size) |
154 |
– |
{ return allocator_helper< sheepshaver_cpu, lazy_allocator >::allocate(); } |
155 |
– |
void operator delete(void *p) |
156 |
– |
{ allocator_helper< sheepshaver_cpu, lazy_allocator >::deallocate(p); } |
157 |
– |
// FIXME: really make surre array allocation fail at link time? |
158 |
– |
void *operator new[](size_t); |
159 |
– |
void operator delete[](void *p); |
160 |
– |
|
161 |
|
// Make sure the SIGSEGV handler can access CPU registers |
162 |
|
friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t); |
163 |
|
}; |
164 |
|
|
165 |
< |
lazy_allocator< sheepshaver_cpu > allocator_helper< sheepshaver_cpu, lazy_allocator >::allocator; |
165 |
> |
// Memory allocator returning areas aligned on 16-byte boundaries |
166 |
> |
void *operator new(size_t size) |
167 |
> |
{ |
168 |
> |
void *p; |
169 |
> |
|
170 |
> |
/* XXX: try different approaches */ |
171 |
> |
if (posix_memalign(&p, 16, size) != 0) |
172 |
> |
throw std::bad_alloc(); |
173 |
> |
|
174 |
> |
return p; |
175 |
> |
} |
176 |
> |
|
177 |
> |
void operator delete(void *p) |
178 |
> |
{ |
179 |
> |
free(p); |
180 |
> |
} |
181 |
|
|
182 |
|
sheepshaver_cpu::sheepshaver_cpu() |
183 |
|
: powerpc_cpu(enable_jit_p()) |
187 |
|
|
188 |
|
void sheepshaver_cpu::init_decoder() |
189 |
|
{ |
175 |
– |
#ifndef PPC_NO_STATIC_II_INDEX_TABLE |
176 |
– |
static bool initialized = false; |
177 |
– |
if (initialized) |
178 |
– |
return; |
179 |
– |
initialized = true; |
180 |
– |
#endif |
181 |
– |
|
190 |
|
static const instr_info_t sheep_ii_table[] = { |
191 |
|
{ "sheep", |
192 |
|
(execute_pmf)&sheepshaver_cpu::execute_sheep, |
219 |
|
typedef bit_field< 21, 25 > NATIVE_OP_field; |
220 |
|
typedef bit_field< 26, 31 > EMUL_OP_field; |
221 |
|
|
222 |
+ |
// Execute EMUL_OP routine |
223 |
+ |
void sheepshaver_cpu::execute_emul_op(uint32 emul_op) |
224 |
+ |
{ |
225 |
+ |
M68kRegisters r68; |
226 |
+ |
WriteMacInt32(XLM_68K_R25, gpr(25)); |
227 |
+ |
WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP); |
228 |
+ |
for (int i = 0; i < 8; i++) |
229 |
+ |
r68.d[i] = gpr(8 + i); |
230 |
+ |
for (int i = 0; i < 7; i++) |
231 |
+ |
r68.a[i] = gpr(16 + i); |
232 |
+ |
r68.a[7] = gpr(1); |
233 |
+ |
uint32 saved_cr = get_cr() & CR_field<2>::mask(); |
234 |
+ |
uint32 saved_xer = get_xer(); |
235 |
+ |
EmulOp(&r68, gpr(24), emul_op); |
236 |
+ |
set_cr(saved_cr); |
237 |
+ |
set_xer(saved_xer); |
238 |
+ |
for (int i = 0; i < 8; i++) |
239 |
+ |
gpr(8 + i) = r68.d[i]; |
240 |
+ |
for (int i = 0; i < 7; i++) |
241 |
+ |
gpr(16 + i) = r68.a[i]; |
242 |
+ |
gpr(1) = r68.a[7]; |
243 |
+ |
WriteMacInt32(XLM_RUN_MODE, MODE_68K); |
244 |
+ |
} |
245 |
+ |
|
246 |
|
// Execute SheepShaver instruction |
247 |
|
void sheepshaver_cpu::execute_sheep(uint32 opcode) |
248 |
|
{ |
266 |
|
pc() += 4; |
267 |
|
break; |
268 |
|
|
269 |
< |
default: { // EMUL_OP |
270 |
< |
M68kRegisters r68; |
239 |
< |
WriteMacInt32(XLM_68K_R25, gpr(25)); |
240 |
< |
WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP); |
241 |
< |
for (int i = 0; i < 8; i++) |
242 |
< |
r68.d[i] = gpr(8 + i); |
243 |
< |
for (int i = 0; i < 7; i++) |
244 |
< |
r68.a[i] = gpr(16 + i); |
245 |
< |
r68.a[7] = gpr(1); |
246 |
< |
uint32 saved_cr = get_cr() & CR_field<2>::mask(); |
247 |
< |
uint32 saved_xer = get_xer(); |
248 |
< |
EmulOp(&r68, gpr(24), EMUL_OP_field::extract(opcode) - 3); |
249 |
< |
set_cr(saved_cr); |
250 |
< |
set_xer(saved_xer); |
251 |
< |
for (int i = 0; i < 8; i++) |
252 |
< |
gpr(8 + i) = r68.d[i]; |
253 |
< |
for (int i = 0; i < 7; i++) |
254 |
< |
gpr(16 + i) = r68.a[i]; |
255 |
< |
gpr(1) = r68.a[7]; |
256 |
< |
WriteMacInt32(XLM_RUN_MODE, MODE_68K); |
269 |
> |
default: // EMUL_OP |
270 |
> |
execute_emul_op(EMUL_OP_field::extract(opcode) - 3); |
271 |
|
pc() += 4; |
272 |
|
break; |
273 |
|
} |
274 |
+ |
} |
275 |
+ |
|
276 |
+ |
// Compile one instruction |
277 |
+ |
bool sheepshaver_cpu::compile1(codegen_context_t & cg_context) |
278 |
+ |
{ |
279 |
+ |
#if PPC_ENABLE_JIT |
280 |
+ |
const instr_info_t *ii = cg_context.instr_info; |
281 |
+ |
if (ii->mnemo != PPC_I(SHEEP)) |
282 |
+ |
return false; |
283 |
+ |
|
284 |
+ |
bool compiled = false; |
285 |
+ |
powerpc_dyngen & dg = cg_context.codegen; |
286 |
+ |
uint32 opcode = cg_context.opcode; |
287 |
+ |
|
288 |
+ |
switch (opcode & 0x3f) { |
289 |
+ |
case 0: // EMUL_RETURN |
290 |
+ |
dg.gen_invoke(QuitEmulator); |
291 |
+ |
compiled = true; |
292 |
+ |
break; |
293 |
+ |
|
294 |
+ |
case 1: // EXEC_RETURN |
295 |
+ |
dg.gen_spcflags_set(SPCFLAG_CPU_EXEC_RETURN); |
296 |
+ |
compiled = true; |
297 |
+ |
break; |
298 |
+ |
|
299 |
+ |
case 2: { // EXEC_NATIVE |
300 |
+ |
uint32 selector = NATIVE_OP_field::extract(opcode); |
301 |
+ |
switch (selector) { |
302 |
+ |
case NATIVE_PATCH_NAME_REGISTRY: |
303 |
+ |
dg.gen_invoke(DoPatchNameRegistry); |
304 |
+ |
compiled = true; |
305 |
+ |
break; |
306 |
+ |
case NATIVE_VIDEO_INSTALL_ACCEL: |
307 |
+ |
dg.gen_invoke(VideoInstallAccel); |
308 |
+ |
compiled = true; |
309 |
+ |
break; |
310 |
+ |
case NATIVE_VIDEO_VBL: |
311 |
+ |
dg.gen_invoke(VideoVBL); |
312 |
+ |
compiled = true; |
313 |
+ |
break; |
314 |
+ |
case NATIVE_GET_RESOURCE: |
315 |
+ |
case NATIVE_GET_1_RESOURCE: |
316 |
+ |
case NATIVE_GET_IND_RESOURCE: |
317 |
+ |
case NATIVE_GET_1_IND_RESOURCE: |
318 |
+ |
case NATIVE_R_GET_RESOURCE: { |
319 |
+ |
static const uint32 get_resource_ptr[] = { |
320 |
+ |
XLM_GET_RESOURCE, |
321 |
+ |
XLM_GET_1_RESOURCE, |
322 |
+ |
XLM_GET_IND_RESOURCE, |
323 |
+ |
XLM_GET_1_IND_RESOURCE, |
324 |
+ |
XLM_R_GET_RESOURCE |
325 |
+ |
}; |
326 |
+ |
uint32 old_get_resource = ReadMacInt32(get_resource_ptr[selector - NATIVE_GET_RESOURCE]); |
327 |
+ |
typedef void (*func_t)(dyngen_cpu_base, uint32); |
328 |
+ |
func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::get_resource).ptr(); |
329 |
+ |
dg.gen_invoke_CPU_im(func, old_get_resource); |
330 |
+ |
compiled = true; |
331 |
+ |
break; |
332 |
+ |
} |
333 |
+ |
case NATIVE_DISABLE_INTERRUPT: |
334 |
+ |
dg.gen_invoke(DisableInterrupt); |
335 |
+ |
compiled = true; |
336 |
+ |
break; |
337 |
+ |
case NATIVE_ENABLE_INTERRUPT: |
338 |
+ |
dg.gen_invoke(EnableInterrupt); |
339 |
+ |
compiled = true; |
340 |
+ |
break; |
341 |
+ |
case NATIVE_CHECK_LOAD_INVOC: |
342 |
+ |
dg.gen_load_T0_GPR(3); |
343 |
+ |
dg.gen_load_T1_GPR(4); |
344 |
+ |
dg.gen_se_16_32_T1(); |
345 |
+ |
dg.gen_load_T2_GPR(5); |
346 |
+ |
dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))check_load_invoc); |
347 |
+ |
compiled = true; |
348 |
+ |
break; |
349 |
+ |
} |
350 |
+ |
if (FN_field::test(opcode)) { |
351 |
+ |
if (compiled) { |
352 |
+ |
dg.gen_load_A0_LR(); |
353 |
+ |
dg.gen_set_PC_A0(); |
354 |
+ |
} |
355 |
+ |
cg_context.done_compile = true; |
356 |
+ |
} |
357 |
+ |
else |
358 |
+ |
cg_context.done_compile = false; |
359 |
+ |
break; |
360 |
+ |
} |
361 |
+ |
|
362 |
+ |
default: { // EMUL_OP |
363 |
+ |
typedef void (*func_t)(dyngen_cpu_base, uint32); |
364 |
+ |
func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr(); |
365 |
+ |
dg.gen_invoke_CPU_im(func, EMUL_OP_field::extract(opcode) - 3); |
366 |
+ |
cg_context.done_compile = false; |
367 |
+ |
compiled = true; |
368 |
+ |
break; |
369 |
+ |
} |
370 |
|
} |
371 |
+ |
return compiled; |
372 |
+ |
#endif |
373 |
+ |
return false; |
374 |
|
} |
375 |
|
|
376 |
|
// Handle MacOS interrupt |
606 |
|
} |
607 |
|
|
608 |
|
// Resource Manager thunk |
496 |
– |
extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h); |
497 |
– |
|
609 |
|
inline void sheepshaver_cpu::get_resource(uint32 old_get_resource) |
610 |
|
{ |
611 |
|
uint32 type = gpr(3); |
715 |
|
else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 || cpu->gpr(20) == 0xf3012000)) |
716 |
|
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
717 |
|
|
718 |
+ |
// Ignore writes to the zero page |
719 |
+ |
else if ((uint32)(addr - SheepMem::ZeroPage()) < (uint32)SheepMem::PageSize()) |
720 |
+ |
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
721 |
+ |
|
722 |
|
// Ignore all other faults, if requested |
723 |
|
if (PrefsFindBool("ignoresegv")) |
724 |
|
return SIGSEGV_RETURN_SKIP_INSTRUCTION; |
1020 |
|
case NATIVE_MAKE_EXECUTABLE: |
1021 |
|
MakeExecutable(0, (void *)GPR(4), GPR(5)); |
1022 |
|
break; |
1023 |
+ |
case NATIVE_CHECK_LOAD_INVOC: |
1024 |
+ |
check_load_invoc(GPR(3), GPR(4), GPR(5)); |
1025 |
+ |
break; |
1026 |
|
default: |
1027 |
|
printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector); |
1028 |
|
QuitEmulator(); |