[ViewVC] Diff of: cebix/SheepShaver/src/kpx_cpu/sheepshaver

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.3 by gbeauche, 2003-09-29T07:05:15Z vs.
Revision 1.67 by gbeauche, 2006-01-21T17:18:53Z

#	Line 1 \| Line 1
1		/*
2		* sheepshaver_glue.cpp - Glue Kheperix CPU to SheepShaver CPU engine interface
3		*
4	<	* SheepShaver (C) 1997-2002 Christian Bauer and Marc Hellwig
4	>	* SheepShaver (C) 1997-2005 Christian Bauer and Marc Hellwig
5		*
6		* This program is free software; you can redistribute it and/or modify
7		* it under the terms of the GNU General Public License as published by
#	Line 28 \| Line 28
28		#include "macos_util.h"
29		#include "block-alloc.hpp"
30		#include "sigsegv.h"
31	–	#include "spcflags.h"
31		#include "cpu/ppc/ppc-cpu.hpp"
32		#include "cpu/ppc/ppc-operations.hpp"
33	+	#include "cpu/ppc/ppc-instructions.hpp"
34	+	#include "thunks.h"
35
36		// Used for NativeOp trampolines
37		#include "video.h"
38		#include "name_registry.h"
39		#include "serial.h"
40	+	#include "ether.h"
41	+	#include "timer.h"
42
43		#include <stdio.h>
44	+	#include <stdlib.h>
45	+	#ifdef HAVE_MALLOC_H
46	+	#include <malloc.h>
47	+	#endif
48	+
49	+	#ifdef USE_SDL_VIDEO
50	+	#include <SDL_events.h>
51	+	#endif
52
53		#if ENABLE_MON
54		#include "mon.h"
55		#include "mon_disass.h"
56		#endif
57
58	<	#define DEBUG 1
58	>	#define DEBUG 0
59		#include "debug.h"
60
61	+	// Emulation time statistics
62	+	#ifndef EMUL_TIME_STATS
63	+	#define EMUL_TIME_STATS 0
64	+	#endif
65	+
66	+	#if EMUL_TIME_STATS
67	+	static clock_t emul_start_time;
68	+	static uint32 interrupt_count = 0, ppc_interrupt_count = 0;
69	+	static clock_t interrupt_time = 0;
70	+	static uint32 exec68k_count = 0;
71	+	static clock_t exec68k_time = 0;
72	+	static uint32 native_exec_count = 0;
73	+	static clock_t native_exec_time = 0;
74	+	static uint32 macos_exec_count = 0;
75	+	static clock_t macos_exec_time = 0;
76	+	#endif
77	+
78		static void enter_mon(void)
79		{
80		// Start up mon in real-mode
#	Line 56 \| Line 84 \| static void enter_mon(void)
84		#endif
85		}
86
87	<	// Enable multicore (main/interrupts) cpu emulation?
88	<	#define MULTICORE_CPU 0
87	>	// From main_*.cpp
88	>	extern uintptr SignalStackBase();
89	>
90	>	// From rsrc_patches.cpp
91	>	extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
92	>
93	>	// PowerPC EmulOp to exit from emulation looop
94	>	const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP \| 1;
95
96		// Enable Execute68k() safety checks?
97		#define SAFE_EXEC_68K 1
#	Line 71 \| Line 105 \| static void enter_mon(void)
105		// Interrupts in native mode?
106		#define INTERRUPTS_IN_NATIVE_MODE 1
107
108	<	// 68k Emulator Data
109	<	struct EmulatorData {
76	<	uint32 v[0x400];
77	<	};
108	>	// Pointer to Kernel Data
109	>	static KernelData * kernel_data;
110
111	<	// Kernel Data
112	<	struct KernelData {
81	<	uint32 v[0x400];
82	<	EmulatorData ed;
83	<	};
111	>	// SIGSEGV handler
112	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
113
114	<	// Pointer to Kernel Data
115	<	static KernelData * const kernel_data = (KernelData *)0x68ffe000;
114	>	#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
115	>	// Special trampolines for EmulOp and NativeOp
116	>	static uint8 *emul_op_trampoline;
117	>	static uint8 *native_op_trampoline;
118	>	#endif
119	>
120	>	// JIT Compiler enabled?
121	>	static inline bool enable_jit_p()
122	>	{
123	>	return PrefsFindBool("jit");
124	>	}
125
126
127		/**
128		* PowerPC emulator glue with special 'sheep' opcodes
129		**/
130
131	<	struct sheepshaver_exec_return { };
131	>	enum {
132	>	PPC_I(SHEEP) = PPC_I(MAX),
133	>	PPC_I(SHEEP_MAX)
134	>	};
135
136		class sheepshaver_cpu
137		: public powerpc_cpu
#	Line 100 \| Line 141 \| class sheepshaver_cpu
141
142		public:
143
144	<	sheepshaver_cpu()
145	<	: powerpc_cpu()
105	<	{ init_decoder(); }
144	>	// Constructor
145	>	sheepshaver_cpu();
146
147	<	// Condition Register accessors
147	>	// CR & XER accessors
148		uint32 get_cr() const { return cr().get(); }
149		void set_cr(uint32 v) { cr().set(v); }
150	+	uint32 get_xer() const { return xer().get(); }
151	+	void set_xer(uint32 v) { xer().set(v); }
152
153	<	// Execution loop
154	<	void execute(uint32 pc);
153	>	// Execute NATIVE_OP routine
154	>	void execute_native_op(uint32 native_op);
155	>
156	>	// Execute EMUL_OP routine
157	>	void execute_emul_op(uint32 emul_op);
158
159		// Execute 68k routine
160		void execute_68k(uint32 entry, M68kRegisters *r);
#	Line 120 \| Line 165 \| public:
165		// Execute MacOS/PPC code
166		uint32 execute_macos_code(uint32 tvect, int nargs, uint32 const *args);
167
168	+	#if PPC_ENABLE_JIT
169	+	// Compile one instruction
170	+	virtual int compile1(codegen_context_t & cg_context);
171	+	#endif
172		// Resource manager thunk
173		void get_resource(uint32 old_get_resource);
174
175		// Handle MacOS interrupt
176	<	void interrupt(uint32 entry, sheepshaver_cpu *cpu);
128	<
129	<	// spcflags for interrupts handling
130	<	static uint32 spcflags;
176	>	void interrupt(uint32 entry);
177
178	<	// Lazy memory allocator (one item at a time)
179	<	void *operator new(size_t size)
134	<	{ return allocator_helper< sheepshaver_cpu, lazy_allocator >::allocate(); }
135	<	void operator delete(void *p)
136	<	{ allocator_helper< sheepshaver_cpu, lazy_allocator >::deallocate(p); }
137	<	// FIXME: really make surre array allocation fail at link time?
138	<	void *operator new[](size_t);
139	<	void operator delete[](void *p);
178	>	// Make sure the SIGSEGV handler can access CPU registers
179	>	friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
180		};
181
182	<	uint32 sheepshaver_cpu::spcflags = 0;
183	<	lazy_allocator< sheepshaver_cpu > allocator_helper< sheepshaver_cpu, lazy_allocator >::allocator;
182	>	sheepshaver_cpu::sheepshaver_cpu()
183	>	: powerpc_cpu(enable_jit_p())
184	>	{
185	>	init_decoder();
186	>	}
187
188		void sheepshaver_cpu::init_decoder()
189		{
147	–	#ifndef PPC_NO_STATIC_II_INDEX_TABLE
148	–	static bool initialized = false;
149	–	if (initialized)
150	–	return;
151	–	initialized = true;
152	–	#endif
153	–
190		static const instr_info_t sheep_ii_table[] = {
191		{ "sheep",
192	<	(execute_fn)&sheepshaver_cpu::execute_sheep,
192	>	(execute_pmf)&sheepshaver_cpu::execute_sheep,
193		NULL,
194	<	D_form, 6, 0, CFLOW_TRAP
194	>	PPC_I(SHEEP),
195	>	D_form, 6, 0, CFLOW_JUMP \| CFLOW_TRAP
196		}
197		};
198
#	Line 168 \| Line 205 \| void sheepshaver_cpu::init_decoder()
205		}
206		}
207
171	–	// Forward declaration for native opcode handler
172	–	static void NativeOp(int selector);
173	–
208		/* NativeOp instruction format:
209	<	+------------+--------------------------+--+----------+------------+
210	<	\| 6 \| \|FN\| OP \| 2 \|
211	<	+------------+--------------------------+--+----------+------------+
212	<	0 5 \|6 19 20 21 25 26 31
209	>	+------------+-------------------------+--+-----------+------------+
210	>	\| 6 \| \|FN\| OP \| 2 \|
211	>	+------------+-------------------------+--+-----------+------------+
212	>	0 5 \|6 18 19 20 25 26 31
213		*/
214
215	<	typedef bit_field< 20, 20 > FN_field;
216	<	typedef bit_field< 21, 25 > NATIVE_OP_field;
215	>	typedef bit_field< 19, 19 > FN_field;
216	>	typedef bit_field< 20, 25 > NATIVE_OP_field;
217		typedef bit_field< 26, 31 > EMUL_OP_field;
218
219	+	// Execute EMUL_OP routine
220	+	void sheepshaver_cpu::execute_emul_op(uint32 emul_op)
221	+	{
222	+	M68kRegisters r68;
223	+	WriteMacInt32(XLM_68K_R25, gpr(25));
224	+	WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
225	+	for (int i = 0; i < 8; i++)
226	+	r68.d[i] = gpr(8 + i);
227	+	for (int i = 0; i < 7; i++)
228	+	r68.a[i] = gpr(16 + i);
229	+	r68.a[7] = gpr(1);
230	+	uint32 saved_cr = get_cr() & 0xff9fffff; // mask_operand::compute(11, 8)
231	+	uint32 saved_xer = get_xer();
232	+	EmulOp(&r68, gpr(24), emul_op);
233	+	set_cr(saved_cr);
234	+	set_xer(saved_xer);
235	+	for (int i = 0; i < 8; i++)
236	+	gpr(8 + i) = r68.d[i];
237	+	for (int i = 0; i < 7; i++)
238	+	gpr(16 + i) = r68.a[i];
239	+	gpr(1) = r68.a[7];
240	+	WriteMacInt32(XLM_RUN_MODE, MODE_68K);
241	+	}
242	+
243		// Execute SheepShaver instruction
244		void sheepshaver_cpu::execute_sheep(uint32 opcode)
245		{
#	Line 192 \| Line 250 \| void sheepshaver_cpu::execute_sheep(uint
250		case 0: // EMUL_RETURN
251		QuitEmulator();
252		break;
253	<
253	>
254		case 1: // EXEC_RETURN
255	<	throw sheepshaver_exec_return();
255	>	spcflags().set(SPCFLAG_CPU_EXEC_RETURN);
256		break;
257
258		case 2: // EXEC_NATIVE
259	<	NativeOp(NATIVE_OP_field::extract(opcode));
259	>	execute_native_op(NATIVE_OP_field::extract(opcode));
260		if (FN_field::test(opcode))
261		pc() = lr();
262		else
263		pc() += 4;
264		break;
265
266	<	default: { // EMUL_OP
267	<	M68kRegisters r68;
210	<	WriteMacInt32(XLM_68K_R25, gpr(25));
211	<	WriteMacInt32(XLM_RUN_MODE, MODE_EMUL_OP);
212	<	for (int i = 0; i < 8; i++)
213	<	r68.d[i] = gpr(8 + i);
214	<	for (int i = 0; i < 7; i++)
215	<	r68.a[i] = gpr(16 + i);
216	<	r68.a[7] = gpr(1);
217	<	EmulOp(&r68, gpr(24), EMUL_OP_field::extract(opcode) - 3);
218	<	for (int i = 0; i < 8; i++)
219	<	gpr(8 + i) = r68.d[i];
220	<	for (int i = 0; i < 7; i++)
221	<	gpr(16 + i) = r68.a[i];
222	<	gpr(1) = r68.a[7];
223	<	WriteMacInt32(XLM_RUN_MODE, MODE_68K);
266	>	default: // EMUL_OP
267	>	execute_emul_op(EMUL_OP_field::extract(opcode) - 3);
268		pc() += 4;
269		break;
270		}
227	–	}
271		}
272
273	<	// Checks for pending interrupts
274	<	struct execute_nothing {
275	<	static inline void execute(powerpc_cpu *) { }
276	<	};
273	>	// Compile one instruction
274	>	#if PPC_ENABLE_JIT
275	>	int sheepshaver_cpu::compile1(codegen_context_t & cg_context)
276	>	{
277	>	const instr_info_t *ii = cg_context.instr_info;
278	>	if (ii->mnemo != PPC_I(SHEEP))
279	>	return COMPILE_FAILURE;
280	>
281	>	int status = COMPILE_FAILURE;
282	>	powerpc_dyngen & dg = cg_context.codegen;
283	>	uint32 opcode = cg_context.opcode;
284
285	<	static void HandleInterrupt(void);
285	>	switch (opcode & 0x3f) {
286	>	case 0: // EMUL_RETURN
287	>	dg.gen_invoke(QuitEmulator);
288	>	status = COMPILE_CODE_OK;
289	>	break;
290
291	<	struct execute_spcflags_check {
292	<	static inline void execute(powerpc_cpu *cpu) {
293	<	if (SPCFLAGS_TEST(SPCFLAG_ALL_BUT_EXEC_RETURN)) {
294	<	if (SPCFLAGS_TEST( SPCFLAG_ENTER_MON )) {
295	<	SPCFLAGS_CLEAR( SPCFLAG_ENTER_MON );
296	<	enter_mon();
297	<	}
298	<	if (SPCFLAGS_TEST( SPCFLAG_DOINT )) {
299	<	SPCFLAGS_CLEAR( SPCFLAG_DOINT );
300	<	HandleInterrupt();
301	<	}
302	<	if (SPCFLAGS_TEST( SPCFLAG_INT )) {
303	<	SPCFLAGS_CLEAR( SPCFLAG_INT );
304	<	SPCFLAGS_SET( SPCFLAG_DOINT );
291	>	case 1: // EXEC_RETURN
292	>	dg.gen_spcflags_set(SPCFLAG_CPU_EXEC_RETURN);
293	>	// Don't check for pending interrupts, we do know we have to
294	>	// get out of this block ASAP
295	>	dg.gen_exec_return();
296	>	status = COMPILE_EPILOGUE_OK;
297	>	break;
298	>
299	>	case 2: { // EXEC_NATIVE
300	>	uint32 selector = NATIVE_OP_field::extract(opcode);
301	>	switch (selector) {
302	>	#if !PPC_REENTRANT_JIT
303	>	// Filter out functions that may invoke Execute68k() or
304	>	// CallMacOS(), this would break reentrancy as they could
305	>	// invalidate the translation cache and even overwrite
306	>	// continuation code when we are done with them.
307	>	case NATIVE_PATCH_NAME_REGISTRY:
308	>	dg.gen_invoke(DoPatchNameRegistry);
309	>	status = COMPILE_CODE_OK;
310	>	break;
311	>	case NATIVE_VIDEO_INSTALL_ACCEL:
312	>	dg.gen_invoke(VideoInstallAccel);
313	>	status = COMPILE_CODE_OK;
314	>	break;
315	>	case NATIVE_VIDEO_VBL:
316	>	dg.gen_invoke(VideoVBL);
317	>	status = COMPILE_CODE_OK;
318	>	break;
319	>	case NATIVE_GET_RESOURCE:
320	>	case NATIVE_GET_1_RESOURCE:
321	>	case NATIVE_GET_IND_RESOURCE:
322	>	case NATIVE_GET_1_IND_RESOURCE:
323	>	case NATIVE_R_GET_RESOURCE: {
324	>	static const uint32 get_resource_ptr[] = {
325	>	XLM_GET_RESOURCE,
326	>	XLM_GET_1_RESOURCE,
327	>	XLM_GET_IND_RESOURCE,
328	>	XLM_GET_1_IND_RESOURCE,
329	>	XLM_R_GET_RESOURCE
330	>	};
331	>	uint32 old_get_resource = ReadMacInt32(get_resource_ptr[selector - NATIVE_GET_RESOURCE]);
332	>	typedef void (*func_t)(dyngen_cpu_base, uint32);
333	>	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::get_resource).ptr();
334	>	dg.gen_invoke_CPU_im(func, old_get_resource);
335	>	status = COMPILE_CODE_OK;
336	>	break;
337	>	}
338	>	case NATIVE_CHECK_LOAD_INVOC:
339	>	dg.gen_load_T0_GPR(3);
340	>	dg.gen_load_T1_GPR(4);
341	>	dg.gen_se_16_32_T1();
342	>	dg.gen_load_T2_GPR(5);
343	>	dg.gen_invoke_T0_T1_T2((void (*)(uint32, uint32, uint32))check_load_invoc);
344	>	status = COMPILE_CODE_OK;
345	>	break;
346	>	#endif
347	>	case NATIVE_BITBLT:
348	>	dg.gen_load_T0_GPR(3);
349	>	dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt);
350	>	status = COMPILE_CODE_OK;
351	>	break;
352	>	case NATIVE_INVRECT:
353	>	dg.gen_load_T0_GPR(3);
354	>	dg.gen_invoke_T0((void (*)(uint32))NQD_invrect);
355	>	status = COMPILE_CODE_OK;
356	>	break;
357	>	case NATIVE_FILLRECT:
358	>	dg.gen_load_T0_GPR(3);
359	>	dg.gen_invoke_T0((void (*)(uint32))NQD_fillrect);
360	>	status = COMPILE_CODE_OK;
361	>	break;
362	>	}
363	>	// Could we fully translate this NativeOp?
364	>	if (status == COMPILE_CODE_OK) {
365	>	if (!FN_field::test(opcode))
366	>	cg_context.done_compile = false;
367	>	else {
368	>	dg.gen_load_A0_LR();
369	>	dg.gen_set_PC_A0();
370	>	cg_context.done_compile = true;
371		}
372	+	break;
373	+	}
374	+	#if PPC_REENTRANT_JIT
375	+	// Try to execute NativeOp trampoline
376	+	if (!FN_field::test(opcode))
377	+	dg.gen_set_PC_im(cg_context.pc + 4);
378	+	else {
379	+	dg.gen_load_A0_LR();
380	+	dg.gen_set_PC_A0();
381		}
382	+	dg.gen_mov_32_T0_im(selector);
383	+	dg.gen_jmp(native_op_trampoline);
384	+	cg_context.done_compile = true;
385	+	status = COMPILE_EPILOGUE_OK;
386	+	break;
387	+	#endif
388	+	// Invoke NativeOp handler
389	+	if (!FN_field::test(opcode)) {
390	+	typedef void (*func_t)(dyngen_cpu_base, uint32);
391	+	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
392	+	dg.gen_invoke_CPU_im(func, selector);
393	+	cg_context.done_compile = false;
394	+	status = COMPILE_CODE_OK;
395	+	}
396	+	// Otherwise, let it generate a call to execute_sheep() which
397	+	// will cause necessary updates to the program counter
398	+	break;
399		}
254	–	};
400
401	<	// Execution loop
402	<	void sheepshaver_cpu::execute(uint32 entry)
403	<	{
404	<	try {
405	<	pc() = entry;
406	<	powerpc_cpu::do_execute<execute_nothing, execute_spcflags_check>();
407	<	}
408	<	catch (sheepshaver_exec_return const &) {
409	<	// Nothing, simply return
401	>	default: { // EMUL_OP
402	>	uint32 emul_op = EMUL_OP_field::extract(opcode) - 3;
403	>	#if PPC_REENTRANT_JIT
404	>	// Try to execute EmulOp trampoline
405	>	dg.gen_set_PC_im(cg_context.pc + 4);
406	>	dg.gen_mov_32_T0_im(emul_op);
407	>	dg.gen_jmp(emul_op_trampoline);
408	>	cg_context.done_compile = true;
409	>	status = COMPILE_EPILOGUE_OK;
410	>	break;
411	>	#endif
412	>	// Invoke EmulOp handler
413	>	typedef void (*func_t)(dyngen_cpu_base, uint32);
414	>	func_t func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr();
415	>	dg.gen_invoke_CPU_im(func, emul_op);
416	>	cg_context.done_compile = false;
417	>	status = COMPILE_CODE_OK;
418	>	break;
419		}
266	–	catch (...) {
267	–	printf("ERROR: execute() received an unknown exception!\n");
268	–	QuitEmulator();
420		}
421	+	return status;
422		}
423	+	#endif
424
425		// Handle MacOS interrupt
426	<	void sheepshaver_cpu::interrupt(uint32 entry, sheepshaver_cpu *cpu)
426	>	void sheepshaver_cpu::interrupt(uint32 entry)
427		{
428	<	#if MULTICORE_CPU
429	<	// Initialize stack pointer from previous CPU running
430	<	gpr(1) = cpu->gpr(1);
431	<	#else
428	>	#if EMUL_TIME_STATS
429	>	ppc_interrupt_count++;
430	>	const clock_t interrupt_start = clock();
431	>	#endif
432	>
433		// Save program counters and branch registers
434		uint32 saved_pc = pc();
435		uint32 saved_lr = lr();
436		uint32 saved_ctr= ctr();
437	<	#endif
437	>	uint32 saved_sp = gpr(1);
438
439	<	// Create stack frame
440	<	gpr(1) -= 64;
439	>	// Initialize stack pointer to SheepShaver alternate stack base
440	>	gpr(1) = SignalStackBase() - 64;
441
442		// Build trampoline to return from interrupt
443	<	uint32 trampoline[] = { POWERPC_EMUL_OP \| 1 };
443	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
444
445		// Prepare registers for nanokernel interrupt routine
446	<	kernel_data->v[0x004 >> 2] = gpr(1);
447	<	kernel_data->v[0x018 >> 2] = gpr(6);
446	>	kernel_data->v[0x004 >> 2] = htonl(gpr(1));
447	>	kernel_data->v[0x018 >> 2] = htonl(gpr(6));
448
449	<	gpr(6) = kernel_data->v[0x65c >> 2];
449	>	gpr(6) = ntohl(kernel_data->v[0x65c >> 2]);
450		assert(gpr(6) != 0);
451		WriteMacInt32(gpr(6) + 0x13c, gpr(7));
452		WriteMacInt32(gpr(6) + 0x144, gpr(8));
#	Line 303 \| Line 457 \| void sheepshaver_cpu::interrupt(uint32 e
457		WriteMacInt32(gpr(6) + 0x16c, gpr(13));
458
459		gpr(1) = KernelDataAddr;
460	<	gpr(7) = kernel_data->v[0x660 >> 2];
460	>	gpr(7) = ntohl(kernel_data->v[0x660 >> 2]);
461		gpr(8) = 0;
462	<	gpr(10) = (uint32)trampoline;
463	<	gpr(12) = (uint32)trampoline;
464	<	gpr(13) = cr().get();
462	>	gpr(10) = trampoline.addr();
463	>	gpr(12) = trampoline.addr();
464	>	gpr(13) = get_cr();
465
466		// rlwimi. r7,r7,8,0,0
467		uint32 result = op_ppc_rlwimi::apply(gpr(7), 8, 0x80000000, gpr(7));
#	Line 315 \| Line 469 \| void sheepshaver_cpu::interrupt(uint32 e
469		gpr(7) = result;
470
471		gpr(11) = 0xf072; // MSR (SRR1)
472	<	cr().set((gpr(11) & 0x0fff0000) \| (cr().get() & ~0x0fff0000));
472	>	cr().set((gpr(11) & 0x0fff0000) \| (get_cr() & ~0x0fff0000));
473
474		// Enter nanokernel
475		execute(entry);
476
323	–	// Cleanup stack
324	–	gpr(1) += 64;
325	–
326	–	#if !MULTICORE_CPU
477		// Restore program counters and branch registers
478		pc() = saved_pc;
479		lr() = saved_lr;
480		ctr()= saved_ctr;
481	+	gpr(1) = saved_sp;
482	+
483	+	#if EMUL_TIME_STATS
484	+	interrupt_time += (clock() - interrupt_start);
485		#endif
486		}
487
488		// Execute 68k routine
489		void sheepshaver_cpu::execute_68k(uint32 entry, M68kRegisters *r)
490		{
491	+	#if EMUL_TIME_STATS
492	+	exec68k_count++;
493	+	const clock_t exec68k_start = clock();
494	+	#endif
495	+
496		#if SAFE_EXEC_68K
497		if (ReadMacInt32(XLM_RUN_MODE) != MODE_EMUL_OP)
498		printf("FATAL: Execute68k() not called from EMUL_OP mode\n");
#	Line 343 \| Line 502 \| void sheepshaver_cpu::execute_68k(uint32
502		uint32 saved_pc = pc();
503		uint32 saved_lr = lr();
504		uint32 saved_ctr= ctr();
505	+	uint32 saved_cr = get_cr();
506
507		// Create MacOS stack frame
508	+	// FIXME: make sure MacOS doesn't expect PPC registers to live on top
509		uint32 sp = gpr(1);
510	<	gpr(1) -= 56 + 194 + 188;
510	>	gpr(1) -= 56;
511		WriteMacInt32(gpr(1), sp);
512
513		// Save PowerPC registers
514	<	memcpy(Mac2HostAddr(gpr(1)+56), &gpr(13), sizeof(uint32)*(32-13));
514	>	uint32 saved_GPRs[19];
515	>	memcpy(&saved_GPRs[0], &gpr(13), sizeof(uint32)*(32-13));
516		#if SAVE_FP_EXEC_68K
517	<	memcpy(Mac2HostAddr(gpr(1)+56+194), &fpr(14), sizeof(double)(32-14));
517	>	double saved_FPRs[18];
518	>	memcpy(&saved_FPRs[0], &fpr(14), sizeof(double)*(32-14));
519		#endif
520
521		// Setup registers for 68k emulator
#	Line 366 \| Line 529 \| void sheepshaver_cpu::execute_68k(uint32
529		gpr(25) = ReadMacInt32(XLM_68K_R25); // MSB of SR
530		gpr(26) = 0;
531		gpr(28) = 0; // VBR
532	<	gpr(29) = kernel_data->ed.v[0x74 >> 2]; // Pointer to opcode table
533	<	gpr(30) = kernel_data->ed.v[0x78 >> 2]; // Address of emulator
532	>	gpr(29) = ntohl(kernel_data->ed.v[0x74 >> 2]); // Pointer to opcode table
533	>	gpr(30) = ntohl(kernel_data->ed.v[0x78 >> 2]); // Address of emulator
534		gpr(31) = KernelDataAddr + 0x1000;
535
536		// Push return address (points to EXEC_RETURN opcode) on stack
#	Line 399 \| Line 562 \| void sheepshaver_cpu::execute_68k(uint32
562		r->a[i] = gpr(16 + i);
563
564		// Restore PowerPC registers
565	<	memcpy(&gpr(13), Mac2HostAddr(gpr(1)+56), sizeof(uint32)*(32-13));
565	>	memcpy(&gpr(13), &saved_GPRs[0], sizeof(uint32)*(32-13));
566		#if SAVE_FP_EXEC_68K
567	<	memcpy(&fpr(14), Mac2HostAddr(gpr(1)+56+194), sizeof(double)(32-14));
567	>	memcpy(&fpr(14), &saved_FPRs[0], sizeof(double)*(32-14));
568		#endif
569
570		// Cleanup stack
571	<	gpr(1) += 56 + 194 + 188;
571	>	gpr(1) += 56;
572
573		// Restore program counters and branch registers
574		pc() = saved_pc;
575		lr() = saved_lr;
576		ctr()= saved_ctr;
577	+	set_cr(saved_cr);
578	+
579	+	#if EMUL_TIME_STATS
580	+	exec68k_time += (clock() - exec68k_start);
581	+	#endif
582		}
583
584		// Call MacOS PPC code
585		uint32 sheepshaver_cpu::execute_macos_code(uint32 tvect, int nargs, uint32 const *args)
586		{
587	+	#if EMUL_TIME_STATS
588	+	macos_exec_count++;
589	+	const clock_t macos_exec_start = clock();
590	+	#endif
591	+
592		// Save program counters and branch registers
593		uint32 saved_pc = pc();
594		uint32 saved_lr = lr();
595		uint32 saved_ctr= ctr();
596
597		// Build trampoline with EXEC_RETURN
598	<	uint32 trampoline[] = { POWERPC_EMUL_OP \| 1 };
599	<	lr() = (uint32)trampoline;
598	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
599	>	lr() = trampoline.addr();
600
601		gpr(1) -= 64; // Create stack frame
602		uint32 proc = ReadMacInt32(tvect); // Get routine address
#	Line 454 \| Line 627 \| uint32 sheepshaver_cpu::execute_macos_co
627		lr() = saved_lr;
628		ctr()= saved_ctr;
629
630	+	#if EMUL_TIME_STATS
631	+	macos_exec_time += (clock() - macos_exec_start);
632	+	#endif
633	+
634		return retval;
635		}
636
#	Line 462 \| Line 639 \| inline void sheepshaver_cpu::execute_ppc
639		{
640		// Save branch registers
641		uint32 saved_lr = lr();
465	–	uint32 saved_ctr= ctr();
642
643	<	const uint32 trampoline[] = { POWERPC_EMUL_OP \| 1 };
643	>	SheepVar32 trampoline = POWERPC_EXEC_RETURN;
644	>	WriteMacInt32(trampoline.addr(), POWERPC_EXEC_RETURN);
645	>	lr() = trampoline.addr();
646
469	–	lr() = (uint32)trampoline;
470	–	ctr()= entry;
647		execute(entry);
648
649		// Restore branch registers
650		lr() = saved_lr;
475	–	ctr()= saved_ctr;
651		}
652
653		// Resource Manager thunk
479	–	extern "C" void check_load_invoc(uint32 type, int16 id, uint16 **h);
480	–
654		inline void sheepshaver_cpu::get_resource(uint32 old_get_resource)
655		{
656		uint32 type = gpr(3);
#	Line 488 \| Line 661 \| inline void sheepshaver_cpu::get_resourc
661
662		// Call old routine
663		execute_ppc(old_get_resource);
491	–	uint16 handle = (uint16 )gpr(3);
664
665		// Call CheckLoad()
666	+	uint32 handle = gpr(3);
667		check_load_invoc(type, id, handle);
668	<	gpr(3) = (uint32)handle;
668	>	gpr(3) = handle;
669
670		// Cleanup stack
671		gpr(1) += 56;
#	Line 503 \| Line 676 \| inline void sheepshaver_cpu::get_resourc
676		* SheepShaver CPU engine interface
677		**/
678
679	<	static sheepshaver_cpu *main_cpu = NULL; // CPU emulator to handle usual control flow
680	<	static sheepshaver_cpu *interrupt_cpu = NULL; // CPU emulator to handle interrupts
508	<	static sheepshaver_cpu *current_cpu = NULL; // Current CPU emulator context
679	>	// PowerPC CPU emulator
680	>	static sheepshaver_cpu *ppc_cpu = NULL;
681
682	<	static inline void cpu_push(sheepshaver_cpu *new_cpu)
682	>	void FlushCodeCache(uintptr start, uintptr end)
683		{
684	<	#if MULTICORE_CPU
685	<	current_cpu = new_cpu;
514	<	#endif
515	<	}
516	<
517	<	static inline void cpu_pop()
518	<	{
519	<	#if MULTICORE_CPU
520	<	current_cpu = main_cpu;
521	<	#endif
684	>	D(bug("FlushCodeCache(%08x, %08x)\n", start, end));
685	>	ppc_cpu->invalidate_cache_range(start, end);
686		}
687
688		// Dump PPC registers
689		static void dump_registers(void)
690		{
691	<	current_cpu->dump_registers();
691	>	ppc_cpu->dump_registers();
692		}
693
694		// Dump log
695		static void dump_log(void)
696		{
697	<	current_cpu->dump_log();
697	>	ppc_cpu->dump_log();
698		}
699
700		/*
701		* Initialize CPU emulation
702		*/
703
704	<	static sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
704	>	sigsegv_return_t sigsegv_handler(sigsegv_address_t fault_address, sigsegv_address_t fault_instruction)
705		{
706		#if ENABLE_VOSF
707		// Handle screen fault
#	Line 549 \| Line 713 \| static sigsegv_return_t sigsegv_handler(
713		const uintptr addr = (uintptr)fault_address;
714		#if HAVE_SIGSEGV_SKIP_INSTRUCTION
715		// Ignore writes to ROM
716	<	if ((addr - ROM_BASE) < ROM_SIZE)
716	>	if ((addr - (uintptr)ROMBaseHost) < ROM_SIZE)
717		return SIGSEGV_RETURN_SKIP_INSTRUCTION;
718
719	<	// Ignore all other faults, if requested
720	<	if (PrefsFindBool("ignoresegv"))
721	<	return SIGSEGV_RETURN_FAILURE;
719	>	// Get program counter of target CPU
720	>	sheepshaver_cpu * const cpu = ppc_cpu;
721	>	const uint32 pc = cpu->pc();
722	>
723	>	// Fault in Mac ROM or RAM?
724	>	bool mac_fault = (pc >= ROM_BASE) && (pc < (ROM_BASE + ROM_AREA_SIZE)) \|\| (pc >= RAMBase) && (pc < (RAMBase + RAMSize)) \|\| (pc >= DR_CACHE_BASE && pc < (DR_CACHE_BASE + DR_CACHE_SIZE));
725	>	if (mac_fault) {
726	>
727	>	// "VM settings" during MacOS 8 installation
728	>	if (pc == ROM_BASE + 0x488160 && cpu->gpr(20) == 0xf8000000)
729	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
730	>
731	>	// MacOS 8.5 installation
732	>	else if (pc == ROM_BASE + 0x488140 && cpu->gpr(16) == 0xf8000000)
733	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
734	>
735	>	// MacOS 8 serial drivers on startup
736	>	else if (pc == ROM_BASE + 0x48e080 && (cpu->gpr(8) == 0xf3012002 \|\| cpu->gpr(8) == 0xf3012000))
737	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
738	>
739	>	// MacOS 8.1 serial drivers on startup
740	>	else if (pc == ROM_BASE + 0x48c5e0 && (cpu->gpr(20) == 0xf3012002 \|\| cpu->gpr(20) == 0xf3012000))
741	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
742	>	else if (pc == ROM_BASE + 0x4a10a0 && (cpu->gpr(20) == 0xf3012002 \|\| cpu->gpr(20) == 0xf3012000))
743	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
744	>
745	>	// MacOS 8.6 serial drivers on startup (with DR Cache and OldWorld ROM)
746	>	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(16) == 0xf3012002 \|\| cpu->gpr(16) == 0xf3012000))
747	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
748	>	else if ((pc - DR_CACHE_BASE) < DR_CACHE_SIZE && (cpu->gpr(20) == 0xf3012002 \|\| cpu->gpr(20) == 0xf3012000))
749	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
750	>
751	>	// Ignore writes to the zero page
752	>	else if ((uint32)(addr - SheepMem::ZeroPage()) < (uint32)SheepMem::PageSize())
753	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
754	>
755	>	// Ignore all other faults, if requested
756	>	if (PrefsFindBool("ignoresegv"))
757	>	return SIGSEGV_RETURN_SKIP_INSTRUCTION;
758	>	}
759		#else
760		#error "FIXME: You don't have the capability to skip instruction within signal handlers"
761		#endif
762
763	<	printf("SIGSEGV\n");
764	<	printf(" pc %p\n", fault_instruction);
765	<	printf(" ea %p\n", fault_address);
565	<	printf(" cpu %s\n", current_cpu == main_cpu ? "main" : "interrupts");
763	>	fprintf(stderr, "SIGSEGV\n");
764	>	fprintf(stderr, " pc %p\n", fault_instruction);
765	>	fprintf(stderr, " ea %p\n", fault_address);
766		dump_registers();
767	<	current_cpu->dump_log();
767	>	ppc_cpu->dump_log();
768		enter_mon();
769		QuitEmulator();
770
#	Line 573 \| Line 773 \| static sigsegv_return_t sigsegv_handler(
773
774		void init_emul_ppc(void)
775		{
776	+	// Get pointer to KernelData in host address space
777	+	kernel_data = (KernelData *)Mac2HostAddr(KERNEL_DATA_BASE);
778	+
779		// Initialize main CPU emulator
780	<	main_cpu = new sheepshaver_cpu();
781	<	main_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
780	>	ppc_cpu = new sheepshaver_cpu();
781	>	ppc_cpu->set_register(powerpc_registers::GPR(3), any_register((uint32)ROM_BASE + 0x30d000));
782	>	ppc_cpu->set_register(powerpc_registers::GPR(4), any_register(KernelDataAddr + 0x1000));
783		WriteMacInt32(XLM_RUN_MODE, MODE_68K);
784
581	–	#if MULTICORE_CPU
582	–	// Initialize alternate CPU emulator to handle interrupts
583	–	interrupt_cpu = new sheepshaver_cpu();
584	–	#endif
585	–
586	–	// Install the handler for SIGSEGV
587	–	sigsegv_install_handler(sigsegv_handler);
588	–
785		#if ENABLE_MON
786		// Install "regs" command in cxmon
787		mon_add_command("regs", dump_registers, "regs Dump PowerPC registers\n");
788		mon_add_command("log", dump_log, "log Dump PowerPC emulation log\n");
789		#endif
790	+
791	+	#if EMUL_TIME_STATS
792	+	emul_start_time = clock();
793	+	#endif
794	+	}
795	+
796	+	/*
797	+	* Deinitialize emulation
798	+	*/
799	+
800	+	void exit_emul_ppc(void)
801	+	{
802	+	#if EMUL_TIME_STATS
803	+	clock_t emul_end_time = clock();
804	+
805	+	printf("### Statistics for SheepShaver emulation parts\n");
806	+	const clock_t emul_time = emul_end_time - emul_start_time;
807	+	printf("Total emulation time : %.1f sec\n", double(emul_time) / double(CLOCKS_PER_SEC));
808	+	printf("Total interrupt count: %d (%2.1f Hz)\n", interrupt_count,
809	+	(double(interrupt_count) * CLOCKS_PER_SEC) / double(emul_time));
810	+	printf("Total ppc interrupt count: %d (%2.1f %%)\n", ppc_interrupt_count,
811	+	(double(ppc_interrupt_count) * 100.0) / double(interrupt_count));
812	+
813	+	#define PRINT_STATS(LABEL, VAR_PREFIX) do { \
814	+	printf("Total " LABEL " count : %d\n", VAR_PREFIX##_count); \
815	+	printf("Total " LABEL " time : %.1f sec (%.1f%%)\n", \
816	+	double(VAR_PREFIX##_time) / double(CLOCKS_PER_SEC), \
817	+	100.0 * double(VAR_PREFIX##_time) / double(emul_time)); \
818	+	} while (0)
819	+
820	+	PRINT_STATS("Execute68k[Trap] execution", exec68k);
821	+	PRINT_STATS("NativeOp execution", native_exec);
822	+	PRINT_STATS("MacOS routine execution", macos_exec);
823	+
824	+	#undef PRINT_STATS
825	+	printf("\n");
826	+	#endif
827	+
828	+	delete ppc_cpu;
829	+	ppc_cpu = NULL;
830	+	}
831	+
832	+	#if PPC_ENABLE_JIT && PPC_REENTRANT_JIT
833	+	// Initialize EmulOp trampolines
834	+	void init_emul_op_trampolines(basic_dyngen & dg)
835	+	{
836	+	typedef void (*func_t)(dyngen_cpu_base, uint32);
837	+	func_t func;
838	+
839	+	// EmulOp
840	+	emul_op_trampoline = dg.gen_start();
841	+	func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_emul_op).ptr();
842	+	dg.gen_invoke_CPU_T0(func);
843	+	dg.gen_exec_return();
844	+	dg.gen_end();
845	+
846	+	// NativeOp
847	+	native_op_trampoline = dg.gen_start();
848	+	func = (func_t)nv_mem_fun(&sheepshaver_cpu::execute_native_op).ptr();
849	+	dg.gen_invoke_CPU_T0(func);
850	+	dg.gen_exec_return();
851	+	dg.gen_end();
852	+
853	+	D(bug("EmulOp trampoline: %p\n", emul_op_trampoline));
854	+	D(bug("NativeOp trampoline: %p\n", native_op_trampoline));
855		}
856	+	#endif
857
858		/*
859		* Emulation loop
#	Line 599 \| Line 861 \| void init_emul_ppc(void)
861
862		void emul_ppc(uint32 entry)
863		{
864	<	current_cpu = main_cpu;
865	<	current_cpu->start_log();
866	<	current_cpu->execute(entry);
864	>	#if 0
865	>	ppc_cpu->start_log();
866	>	#endif
867	>	// start emulation loop and enable code translation or caching
868	>	ppc_cpu->execute(entry);
869		}
870
871		/*
872		* Handle PowerPC interrupt
873		*/
874
611	–	// Atomic operations
612	–	extern int atomic_add(int *var, int v);
613	–	extern int atomic_and(int *var, int v);
614	–	extern int atomic_or(int *var, int v);
615	–
875		void TriggerInterrupt(void)
876		{
877	+	idle_resume();
878		#if 0
879		WriteMacInt32(0x16a, ReadMacInt32(0x16a) + 1);
880		#else
881	<	SPCFLAGS_SET( SPCFLAG_INT );
881	>	// Trigger interrupt to main cpu only
882	>	if (ppc_cpu)
883	>	ppc_cpu->trigger_interrupt();
884		#endif
885		}
886
887	<	static void HandleInterrupt(void)
887	>	void HandleInterrupt(powerpc_registers *r)
888		{
889	+	#ifdef USE_SDL_VIDEO
890	+	// We must fill in the events queue in the same thread that did call SDL_SetVideoMode()
891	+	SDL_PumpEvents();
892	+	#endif
893	+
894		// Do nothing if interrupts are disabled
895		if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0)
896		return;
897
898	<	// Do nothing if there is no interrupt pending
899	<	if (InterruptFlags == 0)
900	<	return;
901	<
635	<	// Disable MacOS stack sniffer
636	<	WriteMacInt32(0x110, 0);
898	>	// Update interrupt count
899	>	#if EMUL_TIME_STATS
900	>	interrupt_count++;
901	>	#endif
902
903		// Interrupt action depends on current run mode
904		switch (ReadMacInt32(XLM_RUN_MODE)) {
905		case MODE_68K:
906		// 68k emulator active, trigger 68k interrupt level 1
642	–	assert(current_cpu == main_cpu);
907		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
908	<	main_cpu->set_cr(main_cpu->get_cr() \| tswap32(kernel_data->v[0x674 >> 2]));
908	>	r->cr.set(r->cr.get() \| tswap32(kernel_data->v[0x674 >> 2]));
909		break;
910
911		#if INTERRUPTS_IN_NATIVE_MODE
912		case MODE_NATIVE:
913		// 68k emulator inactive, in nanokernel?
914	<	assert(current_cpu == main_cpu);
915	<	if (main_cpu->gpr(1) != KernelDataAddr) {
914	>	if (r->gpr[1] != KernelDataAddr) {
915	>
916		// Prepare for 68k interrupt level 1
917		WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
918		WriteMacInt32(tswap32(kernel_data->v[0x658 >> 2]) + 0xdc,
#	Line 657 \| Line 921 \| static void HandleInterrupt(void)
921
922		// Execute nanokernel interrupt routine (this will activate the 68k emulator)
923		DisableInterrupt();
660	–	cpu_push(interrupt_cpu);
924		if (ROMType == ROMTYPE_NEWWORLD)
925	<	current_cpu->interrupt(ROM_BASE + 0x312b1c, main_cpu);
925	>	ppc_cpu->interrupt(ROM_BASE + 0x312b1c);
926		else
927	<	current_cpu->interrupt(ROM_BASE + 0x312a3c, main_cpu);
665	<	cpu_pop();
927	>	ppc_cpu->interrupt(ROM_BASE + 0x312a3c);
928		}
929		break;
930		#endif
#	Line 671 \| Line 933 \| static void HandleInterrupt(void)
933		case MODE_EMUL_OP:
934		// 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0
935		if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) {
936	+	#if EMUL_TIME_STATS
937	+	const clock_t interrupt_start = clock();
938	+	#endif
939		#if 1
940		// Execute full 68k interrupt routine
941		M68kRegisters r;
942		uint32 old_r25 = ReadMacInt32(XLM_68K_R25); // Save interrupt level
943		WriteMacInt32(XLM_68K_R25, 0x21); // Execute with interrupt level 1
944	<	static const uint8 proc[] = {
944	>	static const uint8 proc_template[] = {
945		0x3f, 0x3c, 0x00, 0x00, // move.w #$0000,-(sp) (fake format word)
946		0x48, 0x7a, 0x00, 0x0a, // pea @1(pc) (return address)
947		0x40, 0xe7, // move sr,-(sp) (saved SR)
#	Line 684 \| Line 949 \| static void HandleInterrupt(void)
949		0x4e, 0xd0, // jmp (a0)
950		M68K_RTS >> 8, M68K_RTS & 0xff // @1
951		};
952	<	Execute68k((uint32)proc, &r);
952	>	BUILD_SHEEPSHAVER_PROCEDURE(proc);
953	>	Execute68k(proc, &r);
954		WriteMacInt32(XLM_68K_R25, old_r25); // Restore interrupt level
955		#else
956		// Only update cursor
#	Line 692 \| Line 958 \| static void HandleInterrupt(void)
958		if (InterruptFlags & INTFLAG_VIA) {
959		ClearInterruptFlag(INTFLAG_VIA);
960		ADBInterrupt();
961	<	ExecutePPC(VideoVBL);
961	>	ExecuteNative(NATIVE_VIDEO_VBL);
962		}
963		}
964		#endif
965	+	#if EMUL_TIME_STATS
966	+	interrupt_time += (clock() - interrupt_start);
967	+	#endif
968		}
969		break;
970		#endif
971		}
972		}
973
705	–	/*
706	–	* Execute NATIVE_OP opcode (called by PowerPC emulator)
707	–	*/
708	–
709	–	#define POWERPC_NATIVE_OP_INIT(LR, OP) \
710	–	tswap32(POWERPC_EMUL_OP \| ((LR) << 11) \| (((uint32)OP) << 6) \| 2)
711	–
712	–	// FIXME: Make sure 32-bit relocations are used
713	–	const uint32 NativeOpTable[NATIVE_OP_MAX] = {
714	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_PATCH_NAME_REGISTRY),
715	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_INSTALL_ACCEL),
716	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_VBL),
717	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_VIDEO_DO_DRIVER_IO),
718	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_IRQ),
719	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_INIT),
720	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_TERM),
721	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_OPEN),
722	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_CLOSE),
723	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_WPUT),
724	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_ETHER_RSRV),
725	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_NOTHING),
726	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_OPEN),
727	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_IN),
728	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_PRIME_OUT),
729	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CONTROL),
730	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_STATUS),
731	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_SERIAL_CLOSE),
732	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_RESOURCE),
733	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_RESOURCE),
734	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_IND_RESOURCE),
735	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_GET_1_IND_RESOURCE),
736	–	POWERPC_NATIVE_OP_INIT(1, NATIVE_R_GET_RESOURCE),
737	–	POWERPC_NATIVE_OP_INIT(0, NATIVE_DISABLE_INTERRUPT),
738	–	POWERPC_NATIVE_OP_INIT(0, NATIVE_ENABLE_INTERRUPT),
739	–	};
740	–
974		static void get_resource(void);
975		static void get_1_resource(void);
976		static void get_ind_resource(void);
977		static void get_1_ind_resource(void);
978		static void r_get_resource(void);
979
980	<	#define GPR(REG) current_cpu->gpr(REG)
981	<
749	<	static void NativeOp(int selector)
980	>	// Execute NATIVE_OP routine
981	>	void sheepshaver_cpu::execute_native_op(uint32 selector)
982		{
983	+	#if EMUL_TIME_STATS
984	+	native_exec_count++;
985	+	const clock_t native_exec_start = clock();
986	+	#endif
987	+
988		switch (selector) {
989		case NATIVE_PATCH_NAME_REGISTRY:
990		DoPatchNameRegistry();
#	Line 759 \| Line 996 \| static void NativeOp(int selector)
996		VideoVBL();
997		break;
998		case NATIVE_VIDEO_DO_DRIVER_IO:
999	<	GPR(3) = (int32)(int16)VideoDoDriverIO((void )GPR(3), (void )GPR(4),
763	<	(void *)GPR(5), GPR(6), GPR(7));
999	>	gpr(3) = (int32)(int16)VideoDoDriverIO(gpr(3), gpr(4), gpr(5), gpr(6), gpr(7));
1000		break;
1001	<	case NATIVE_GET_RESOURCE:
1002	<	get_resource();
1001	>	case NATIVE_ETHER_AO_GET_HWADDR:
1002	>	AO_get_ethernet_address(gpr(3));
1003		break;
1004	<	case NATIVE_GET_1_RESOURCE:
1005	<	get_1_resource();
1004	>	case NATIVE_ETHER_AO_ADD_MULTI:
1005	>	AO_enable_multicast(gpr(3));
1006		break;
1007	<	case NATIVE_GET_IND_RESOURCE:
1008	<	get_ind_resource();
1007	>	case NATIVE_ETHER_AO_DEL_MULTI:
1008	>	AO_disable_multicast(gpr(3));
1009		break;
1010	<	case NATIVE_GET_1_IND_RESOURCE:
1011	<	get_1_ind_resource();
1010	>	case NATIVE_ETHER_AO_SEND_PACKET:
1011	>	AO_transmit_packet(gpr(3));
1012	>	break;
1013	>	case NATIVE_ETHER_IRQ:
1014	>	EtherIRQ();
1015	>	break;
1016	>	case NATIVE_ETHER_INIT:
1017	>	gpr(3) = InitStreamModule((void *)gpr(3));
1018	>	break;
1019	>	case NATIVE_ETHER_TERM:
1020	>	TerminateStreamModule();
1021	>	break;
1022	>	case NATIVE_ETHER_OPEN:
1023	>	gpr(3) = ether_open((queue_t )gpr(3), (void )gpr(4), gpr(5), gpr(6), (void*)gpr(7));
1024		break;
1025	<	case NATIVE_R_GET_RESOURCE:
1026	<	r_get_resource();
1025	>	case NATIVE_ETHER_CLOSE:
1026	>	gpr(3) = ether_close((queue_t )gpr(3), gpr(4), (void )gpr(5));
1027	>	break;
1028	>	case NATIVE_ETHER_WPUT:
1029	>	gpr(3) = ether_wput((queue_t )gpr(3), (mblk_t )gpr(4));
1030	>	break;
1031	>	case NATIVE_ETHER_RSRV:
1032	>	gpr(3) = ether_rsrv((queue_t *)gpr(3));
1033	>	break;
1034	>	case NATIVE_SYNC_HOOK:
1035	>	gpr(3) = NQD_sync_hook(gpr(3));
1036	>	break;
1037	>	case NATIVE_BITBLT_HOOK:
1038	>	gpr(3) = NQD_bitblt_hook(gpr(3));
1039	>	break;
1040	>	case NATIVE_BITBLT:
1041	>	NQD_bitblt(gpr(3));
1042	>	break;
1043	>	case NATIVE_FILLRECT_HOOK:
1044	>	gpr(3) = NQD_fillrect_hook(gpr(3));
1045	>	break;
1046	>	case NATIVE_INVRECT:
1047	>	NQD_invrect(gpr(3));
1048	>	break;
1049	>	case NATIVE_FILLRECT:
1050	>	NQD_fillrect(gpr(3));
1051		break;
1052		case NATIVE_SERIAL_NOTHING:
1053		case NATIVE_SERIAL_OPEN:
#	Line 794 \| Line 1066 \| static void NativeOp(int selector)
1066		SerialStatus,
1067		SerialClose
1068		};
1069	<	GPR(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](GPR(3), GPR(4));
1069	>	gpr(3) = serial_callbacks[selector - NATIVE_SERIAL_NOTHING](gpr(3), gpr(4));
1070	>	break;
1071	>	}
1072	>	case NATIVE_GET_RESOURCE:
1073	>	case NATIVE_GET_1_RESOURCE:
1074	>	case NATIVE_GET_IND_RESOURCE:
1075	>	case NATIVE_GET_1_IND_RESOURCE:
1076	>	case NATIVE_R_GET_RESOURCE: {
1077	>	typedef void (*GetResourceCallback)(void);
1078	>	static const GetResourceCallback get_resource_callbacks[] = {
1079	>	::get_resource,
1080	>	::get_1_resource,
1081	>	::get_ind_resource,
1082	>	::get_1_ind_resource,
1083	>	::r_get_resource
1084	>	};
1085	>	get_resource_callbacks[selector - NATIVE_GET_RESOURCE]();
1086		break;
1087		}
1088	<	case NATIVE_DISABLE_INTERRUPT:
1089	<	DisableInterrupt();
1088	>	case NATIVE_MAKE_EXECUTABLE:
1089	>	MakeExecutable(0, gpr(4), gpr(5));
1090		break;
1091	<	case NATIVE_ENABLE_INTERRUPT:
1092	<	EnableInterrupt();
1091	>	case NATIVE_CHECK_LOAD_INVOC:
1092	>	check_load_invoc(gpr(3), gpr(4), gpr(5));
1093		break;
1094		default:
1095		printf("FATAL: NATIVE_OP called with bogus selector %d\n", selector);
1096		QuitEmulator();
1097		break;
1098		}
811	–	}
1099
1100	<	/*
1101	<	* Execute native subroutine (LR must contain return address)
1102	<	*/
816	<
817	<	void ExecuteNative(int selector)
818	<	{
819	<	uint32 tvect[2];
820	<	tvect[0] = tswap32(POWERPC_NATIVE_OP_FUNC(selector));
821	<	tvect[1] = 0; // Fake TVECT
822	<	RoutineDescriptor desc = BUILD_PPC_ROUTINE_DESCRIPTOR(0, tvect);
823	<	M68kRegisters r;
824	<	Execute68k((uint32)&desc, &r);
1100	>	#if EMUL_TIME_STATS
1101	>	native_exec_time += (clock() - native_exec_start);
1102	>	#endif
1103		}
1104
1105		/*
#	Line 832 \| Line 1110 \| void ExecuteNative(int selector)
1110
1111		void Execute68k(uint32 pc, M68kRegisters *r)
1112		{
1113	<	current_cpu->execute_68k(pc, r);
1113	>	ppc_cpu->execute_68k(pc, r);
1114		}
1115
1116		/*
#	Line 842 \| Line 1120 \| void Execute68k(uint32 pc, M68kRegisters
1120
1121		void Execute68kTrap(uint16 trap, M68kRegisters *r)
1122		{
1123	<	uint16 proc[2] = {trap, M68K_RTS};
1124	<	Execute68k((uint32)proc, r);
1123	>	SheepVar proc_var(4);
1124	>	uint32 proc = proc_var.addr();
1125	>	WriteMacInt16(proc, trap);
1126	>	WriteMacInt16(proc + 2, M68K_RTS);
1127	>	Execute68k(proc, r);
1128		}
1129
1130		/*
#	Line 852 \| Line 1133 \| void Execute68kTrap(uint16 trap, M68kReg
1133
1134		uint32 call_macos(uint32 tvect)
1135		{
1136	<	return current_cpu->execute_macos_code(tvect, 0, NULL);
1136	>	return ppc_cpu->execute_macos_code(tvect, 0, NULL);
1137		}
1138
1139		uint32 call_macos1(uint32 tvect, uint32 arg1)
1140		{
1141		const uint32 args[] = { arg1 };
1142	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1142	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1143		}
1144
1145		uint32 call_macos2(uint32 tvect, uint32 arg1, uint32 arg2)
1146		{
1147		const uint32 args[] = { arg1, arg2 };
1148	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1148	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1149		}
1150
1151		uint32 call_macos3(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3)
1152		{
1153		const uint32 args[] = { arg1, arg2, arg3 };
1154	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1154	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1155		}
1156
1157		uint32 call_macos4(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4)
1158		{
1159		const uint32 args[] = { arg1, arg2, arg3, arg4 };
1160	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1160	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1161		}
1162
1163		uint32 call_macos5(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5)
1164		{
1165		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5 };
1166	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1166	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1167		}
1168
1169		uint32 call_macos6(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6)
1170		{
1171		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6 };
1172	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1172	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1173		}
1174
1175		uint32 call_macos7(uint32 tvect, uint32 arg1, uint32 arg2, uint32 arg3, uint32 arg4, uint32 arg5, uint32 arg6, uint32 arg7)
1176		{
1177		const uint32 args[] = { arg1, arg2, arg3, arg4, arg5, arg6, arg7 };
1178	<	return current_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
898	<	}
899	<
900	<	/*
901	<	* Atomic operations
902	<	*/
903	<
904	<	int atomic_add(int *var, int v)
905	<	{
906	<	int ret = *var;
907	<	*var += v;
908	<	return ret;
909	<	}
910	<
911	<	int atomic_and(int *var, int v)
912	<	{
913	<	int ret = *var;
914	<	*var &= v;
915	<	return ret;
916	<	}
917	<
918	<	int atomic_or(int *var, int v)
919	<	{
920	<	int ret = *var;
921	<	*var \|= v;
922	<	return ret;
1178	>	return ppc_cpu->execute_macos_code(tvect, sizeof(args)/sizeof(args[0]), args);
1179		}
1180
1181		/*
#	Line 928 \| Line 1184 \| *int atomic_or(int var, int v)**
1184
1185		void get_resource(void)
1186		{
1187	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1187	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_RESOURCE));
1188		}
1189
1190		void get_1_resource(void)
1191		{
1192	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1192	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_RESOURCE));
1193		}
1194
1195		void get_ind_resource(void)
1196		{
1197	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1197	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_IND_RESOURCE));
1198		}
1199
1200		void get_1_ind_resource(void)
1201		{
1202	<	current_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1202	>	ppc_cpu->get_resource(ReadMacInt32(XLM_GET_1_IND_RESOURCE));
1203		}
1204
1205		void r_get_resource(void)
1206		{
1207	<	current_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1207	>	ppc_cpu->get_resource(ReadMacInt32(XLM_R_GET_RESOURCE));
1208		}

Diff Legend

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+Removed lines
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+Added lines
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+Changed lines
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+Changed lines

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents): Revision 1.3 by gbeauche, 2003-09-29T07:05:15Z vs. Revision 1.67 by gbeauche, 2006-01-21T17:18:53Z

Diff Legend

Comparing SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp (file contents):
Revision 1.3 by gbeauche, 2003-09-29T07:05:15Z vs.
Revision 1.67 by gbeauche, 2006-01-21T17:18:53Z